Chapter 3 (Module-3) : JUMP, LOOP AND CALL INSTRUCTIONS:

LOOP (none like 8086): repeating a sequence of instructions a certain number of times is called a loop.
- Loop action is performed by “DJNZ register, Label”.
- In this ins., the register is decremented and if it is not zero, it jumps to the target address referred to by Label.
- Prior to the start of loop == the register (R0 – R7) is loaded with the counter for the needed number of repetitions
Example 3-1: The following program adds value 1H to the ACC (register A) ten times
MOV A,#0 ; A=0, clear ACC
MOV R2,#0Ah ; load Note counter R2=10D=0AH ➔ maximum 0FFH=256D times
AGAIN: ADD A,#01 ; add 01 to ACC
DJNZ R2,AGAIN ; Decrement R2, Repeat (by jumping to label AGAIN) until R2≠0,
MOV R5,A ; save the final answer of A in R5 ➔ R5 = 0AH
Note: A LOOP can be repeated FFH (or 255) times. But Nested LOOPs can be used for more looping action.
Example 3-3: Write a program to (a) load the ‘A’ with the value 55H, and (b) complement the ‘A’ 700 times
MOV A,#55H ; A=55H
MOV R3,#10 ; R3=10, outer loop count
NEXT: MOV R2,#70 ; R2=70, inner loop count
AGAIN: CPL A ; complement A register ➔ 55H (01010101B) ➔ AAH (10101010B) …..
DJNZ R2, AGAIN ; Decrement R2, if R2≠0 jump to label AGAIN to repeat ‘CPA A’ 70 times
DJNZ R3, NEXT ; repeat inner LOOP 10 times for a total complement of 10x70=700 times
JUMP: (a) Conditional Jump, if only certain condition is met…… (b) Unconditional Jump, always jumps (sjmp)
Short Jumps (-128 to 127 Bytes) ➔ JZ instruction: By default only works with register “A” as a counter
Example of JZ (Jump if Zero): MOV A, #34H ; A=34h
JZ OVER ; jump to level OVER if A = 0 ➔ No jump here
MOV A, R1 ; A=R1
JZ OVER ; jump to level OVER if A = R1= 0
................
OVER: MOV A, B
• Notice that JZ and JNZ instructions by default checks if register A or accumulator is zero or not.
(1) JNC ➔ If CY = 0, will Jump .. CPU starts to fetch and execute instruction from the address of the label.
If CY = 1, it will not jump .. but will execute the next instruction below JNC
Example 3-5: Find the sum of values 79H, F5H, E2H. Put the sum in registers R0 (low byte) and R5 (high byte)
MOV A,#0 ;clear A or A=0
MOV R5,A ;clear R5
ADD A,#79H ;A=0+79H=79H and CF=’0’=NC
JNC N_1 ;if CY=0, add next number ;
INC R5 ;if CY=1, increment R5
N_1: ADD A,#0F5H ;A=79H+F5H=6EH and CF=1=CY
JNC N_2 ;jump if CY=0
INC R5 ;if CY=1,increment R5 (R5=1)
N_2: ADD A,#0E2H ;A=6EH+E2H=50H and CF=1=CY
JNC OVER ;jump if CY=0
INC R5 ;if CY=1, increment 5
OVER:MOV R0,A ;now R0=50H, and R5=02
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• Table below of 8051 conditional instructions. These short JUMPs have addresses within -128 to +127 bytes.
• Note again that JZ and JNZ instructions by default check if register A or accumulator is zero or not.

Instructions Actions
JZ line-number Jump if A ＝ 0 ➔ bydefault
JNZ line-number Jump if A ≠ 0
DJNZ register, line-number Decrement & Jump if register R0-R7≠ 0
CJNE A, byte address , line-no. Jump if A ≠ content of byte address
CJNE Rn, #data, line-no. Jump if byte stored in Rn≠ #data
CJNE @Ri(i=0,1), #data, line-no. Jump if byte stored in Ri ≠ #data
JC line-number Jump if CF ＝ 1 = CY
JNC line-number Jump if CF ＝ 0 = NC
JB bit, line-number Jump if bit ＝ 1 (ex: JB PSW.0 ➔to check PF)
JNB bit, line-number Jump if bit ＝ 0
JBC bit, line-number Jump if bit ＝ 1 and clear bit

The Unconditional JUMP instructions: (1) LJMP (long jump) and (2) SJMP (short jump).
• LJMP is a three-byte instruction with a 2-byte target address that allows a jump to any Mem. location within
PA= 0000 to FFFFH (64Kbyte). The 1st byte is op-code and 2nd and 3rd byte represent the 16-bit target address.
• SJMP is a two-byte instruction with 1-byte op-code and 1-byte target address that allows a jump to any Mem.
location with PA= 00 to FFH (-128 to 127 = 255 byte). Original 8051 has only 4Kbyte of on-chip ROM.
• To calculate the target address of a short jump (SJMP, JNC, JZ, DJNZ, etc.), the second byte is added to the
program counter (PC) of the instruction, immediately below the jump. If the target address is more than -128 to
+127 bytes from the address, below the short jump instruction address: the assembler will generate an error
stating the jump is out of range. Figure below shows the calculation process of the target address:
• How the Program executes Jump

F2H+15H=107H➔
drop carry➔ 07H

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CALL subroutine: - Subroutines are often used to perform tasks that need to be performed frequently
- This makes a program more structured in addition to saving memory space
- The program counter has to return to the main program after executing the subroutine

• (1) LCall (long call➔ 2-byte (16 bit) address➔ can access 64Kbytes) or
• (2) ACALL (absolute call➔ 11-bits of address out of 2-byte instruction ➔ can access 2Kbyte = 2048D=7FFH)
• The only difference between ACALL and LCALL is: (a) the target address for LCALL can be anywhere within
the 64K byte address, (b) the target address for ACALL can be anywhere within the 2K byte address.
• For MC with a small ROM, using ACALL can save a number of bytes of program ROM space (as code=2byte)
• Additional example on CALL instruction: LCALL ➔ 3-byte, ACALL➔ 2BYTE
CALL instruction: When a subroutine is called, control is transferred to that subroutine. The process involves:
• (1) Save on the stack the Physical address of the instruction immediately below the LCALL
• (2) Begins to fetch/execute instructions from the new location (target address mentioned in LCALL)

RET instruction: is executed after the subroutine is executed to pop the pushed address return PA to PC. The
pushed physical address points to the instructor immediately after the LCALL instruction.
• Thus every subroutine needs RET as the last instruction.
• So CALL instruction needs multiple PUSH instructions and RET instruction needs a POP instruction
• The following Example demonstrates the use of LCALL instructions to generate time-delay

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• Note that in the above the DELAY subroutine produces a time-delay that is dependent on the speed of MC.
• The following program is an example of PUSH within CALL instruction and how it uses STACK segment :

• So in the above example, note that the CALL instruction initiates a “PUSH next program counter (PC) value”
before loading the target subroutine address to the program counter (PC) of the MC
• The following example will demonstrate the use of PUSH and POP instructions within CALL instruction
• Since the stack pointer (SP) is disturbed, using PUSH with subroutine needs to re-adjust the SP to return to the
desired part of the main program.

Case1: RET here, Error

Case2: RET here, No error

• FOR CASE-1 (RED in the above picture), calculate the value in SP register after executing “DJNZ R4, NEXT”
• FOR CASE-2 (RED in the above picture), calculate the value in SP register after executing “POP 4” instruction
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• The following program is an example of CALLing SUBROUTINE in a structured MC program
• Remember that CALL ➔by default has a PUSH and RET ➔by default has a POP
• The only difference between ACALL and LCALL is: (a) the target address for LCALL (as code=3byte) can be
within the 64K byte address, (b) target address for ACALL (as code=2byte) can be within the 2K byte address.
• ACALL is a 2-byte instruction. But the target address of the subroutine must be within 2K bytes because only
11 bits (000-FFFH) of the 2 bytes are used for the physical address (to jump to)

• Clock cycles are needed to Mic. Cont. CPU to execute an instruction.

• These are referred to as machine cycles and the length of the machine cycle depends on the frequency of the
crystal oscillator connected to 8051.
• In original 8051, one machine cycle = 12 oscillator/clock pulses/periods
• Example: Find the period of the machine cycle for 11.0592 MHz crystal frequency
• Solution: CLK pulse of OSC.= f = 11.0592/12 = 921.6 kHz; Machine cycle is T=1/921.6 kHz = 1.085μs
• OR T=1/f=1/11.0592 MHz = 0.09042 micro-sec ➔ Machine Cycle = 12*T = 1.085 micro-sec
• OR T=1/f; Machine Cycle (MC) =12*T, where T=1/crystal or xtal freq
• The following example will find the time needed to execute instructions:

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• Note that the time duration also depends on the speed of the CPU …...
• The following program will help to generate the required delay for practical application:

• Increasing the time delay (if needed in application) using NOP instructions

• Normally two factors can affect the accuracy of the time delay of various 8051 family MC’s:
(1) Crystal frequency: the duration of the “period of the machine cycle” is a function of crystal frequency
(2) 8051 Design: 12-Clocks was the original machine cycle duration of 8051. The recent 8051 family with
improved IC and CPU design has made the 1-Clock machine cycle a common feature

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Example: Delay calculation without ignoring overhead: Execute the following program. Assume the crystal
frequency is 11.0592 MHz and the system uses 8051 microcontroller (MC). When calculating delay,
don’t ignore overhead (delays due to instructions outside the main loop)

00H: MOV R2, #05H

02H: MOV A, #0AAH
04H: MOV P0, A
06H: ACALL DELAY ; DELAY is address 0DH
08H: CPL A
09H: DJNZ R2, 02H
0BH: SJMP $
0DH: MOV R5, #0FH ; 1 MC****
Error in
CALL ?? 0FH: PUSH 05H ; 2 MC****
11H: MOV R4, #18H ; 24dec 1 MC***
13H: MOV R3, #25H ; 37dec 1 MC**
15H: DJNZ R3, 15 ; 15dec 2 MC*
17H: DJNZ R4, 13H ; 2 MC**
19H: DJNZ R5, 11H ; 2 MC***
1BH: RET ; 2 MC****

SOLUTION:

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Practice problem 2: Execute the following program and find the total time delay produced by the DELAY
subroutine. Assume the crystal frequency is 11.0592 MHz of the original 8051 microcontroller. (Show the
equations used to calculate the time delay)

ORG 02H
02H: MOV A, #0AAH
04H: MOV P1, A
06H: ACALL DELAY ; Physical Address for DELAY subroutine ➔0BH
08H: CPL A
09H: SJMP $
0BH: MOV R5, #09H ; 1 MC
0DH: MOV R4, #0F2H ; 1 MC
0FH: JZ 19H ; 2 MC
11H: MOV R3, #0FFH ; 1 MC
13H: DJNZ R3, 13H ; 2 MC
15H: DJNZ R4, 11H ; 2 MC
17H: DJNZ R5, 0DH ; 2 MC
19H: RET ; 2 MC
1AH: END

(1) Calculated the total time-delay: __________________________ S (10-6)

(2) Draw the output signal from P1.0 for a time duration of 1000 S

Output signal from Port-pin

time

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For other microcontrollers:

The TABLE below shows the clock-pulses needed per machine-cycle for non-intel microcontrollers:

Chip/Maker Clocks per Machine Cycle

AT89C51 Atmel and original 8051 of intel 12 ➔ 1.085 microsec
P89C54X2 Philips 6
DS5000 Dallas Semi 4
DS89C420/30/40/50 Dallas Semi 1 ➔ 90 nanosec

• TIME DELAY calculation process: Here given is the Machine Cycle of MC ( Bus-cycle for M.P.)
(Hint: 12 CLK pulses per machine cycle with frequent of fXTAL….. Frequency of CLK (per M. Cycle)
f=fXTAL/12, ….. Time duration of the Machine Cycle,T=1/f ) OR M.C.=12*T; T=1/fXTAL

• Different MC for same ins. per microprocessor