By

Muktesh P. Shah
Lecturer, EC Department
BBIT, V. V. Nagar
Characteristic of Intel processor from 4 bit (4004) to i7
 Intel Corporation, one of the world's largest
semiconductor companies, which is widely used in
personal computers, servers, laptops, and different
types of computing devices.
 Intel's processors have continued to evolve with each
generation brought improvements in architecture,
performance, and features to meet the demands of
modern computing tasks and applications.
 Intel processors are also famous for their reliability and
low power consumption, making them ideal for laptops
and other mobile devices.
 Intel processors have evolved significantly over the
years, from the early 4-bit 4004 microprocessor to the
more recent i7 series (sophisticated multicore
processors).
 Intel's processors have continued to evolve with each
generation brought improvements in architecture,
performance, and features to meet the demands of
modern computing tasks and applications.
 Here are some key characteristics of Intel processors across
this range:
Size of the microprocessor – 4 bit
Year of Number of
Name Clock speed Inst. per sec
Invention transistors

1971 by Ted
INTEL Hoff and
740 kHz 2300 60,000
4004/4040 Stanley
Mazor
Size of the microprocessor – 8 bit
Year of Number of
Name Clock speed Inst. per sec
Invention transistors

8008 1972 500 kHz 3500 50,000

10 times
8080 1974 2 MHz 6000 faster than
8008

1976 (16-bit
8085 3 MHz 6500 769230
address bus)
Size of the microprocessor – 16 bit
Clock Number of Inst. per
Name Year of Invention
speed transistors sec

1978 (multiply and divide 4.77 MHz, 8

instruction, 16-bit data 2.5
8086 MHz, 10 29000
bus and 20-bit address Million
bus) MHz

1979 (cheaper version

2.5
8088 of 8086 and 8-bit
Million
external bus)

1982 (80188 cheaper

version of 80186, and
80186/ additional components
6 MHz
80188 like interrupt controller,
clock generator, local bus
controller, counters)

1982 (data bus 16bit and 4

80286 8 MHz 134000
address bus 24 bit) Million
Size of the microprocessor – 32 bit
Clock Number of Inst. per
Name Year of Invention
speed transistors sec

1986 (other versions

80386DX, 80386SX,
INTEL 16 MHz –
80386SL , and data bus 275000
80386 33 MHz
32-bit address bus 32
bit)

1986 (other versions 8 KB of

INTEL 16 MHz – 1.2 Million
80486DX, 80486SX, cache
80486 100 MHz transistors
80486DX2, 80486DX4) memory

Cache
memory
8 bit for
PENTIUM 1993 66 MHz
instructi
ons 8 bit
for data
 Size of the microprocessor – 64 bit
Clock Number of Inst. per
Name Year of Invention
speed transistors sec

64 KB of
2006 (other versions L1 cache
INTEL 1.2 GHz to 291 Million
core2 duo, core2 quad, per core
core 2 3 GHz transistors
core2 extreme) 4 MB of
L2 cache

2.2GHz –
3.3GHz,
2.4GHz –
i3, i5, i7 2007, 2009, 2010
3.6GHz,
2.93GHz –
3.33GHz
 Basic CPU Structure
 The basic structure of a Central Processing Unit (CPU)
consists of several key components that work together
to execute instructions and perform computations.
 These components include the Control Unit (CU),
Arithmetic Logic Unit (ALU), and Memory Unit (MU).
 These components enable it to perform the complex
tasks required by modern computing systems.
1. Control Unit (CU):
 Responsible for coordinating and managing the execution
of instructions within the CPU.
 It fetches instructions from memory, decodes them to
understand their operations, and then controls the flow of
data between various components to carry out those operations.
 The CU generates control signals that direct the activities of
other parts of the CPU and ensures that instructions are
executed in the correct sequence.
2. Arithmetic Logic Unit (ALU):
 Performs arithmetic and logical operations.
 Perform basic arithmetic calculations (like addition,
subtraction, multiplication, and division) Additionally, the
handles logical operations (Like AND, OR, NOT, and
comparisons (e.g., greater than, less than)).
3. Memory Unit (MU):
 Responsible for storing data and instructions.
 Consists of various types of memory, including registers, cache,
and main memory (RAM).
 Registers are the fastest but smallest type of memory and
are used for temporary storage of data during computation.
 Cache memory is a slightly larger and faster memory that
stores frequently used data to reduce the time it takes to
access main memory.
 Main memory, such as RAM, holds the data and
instructions that the CPU needs to perform tasks.
The basic operation of the CPU involves the following
steps:
 Fetch: The Control Unit fetches the next instruction from
memory.
 Decode: The Control Unit decodes the instruction to
understand what operation needs to be performed.
 Execute: The ALU carries out the arithmetic or logical
operation as instructed.
 Memory Access: If needed, data is accessed from memory
or stored back to memory.
 Write Back: The result of the operation is written back to
registers or memory, as required.
Various Registers used in CPU
 A Register is a small, high speed storage unit located
within computer’s CPU or a digital circuit.
 These registers work together to facilitate the execution of
instructions and data manipulation within the CPU.
 They help store and manage data movement, memory
access, instruction decoding, and arithmetic/logical
operations.
1. AC (Accumulator):
 The Accumulator is a general-purpose register that is used
to store intermediate results of arithmetic and logical
operations.
 It's often a part of the Arithmetic Logic Unit (ALU) and is
central to many computations within the CPU.
 The AC holds the result before it's written back to memory
or used in subsequent calculations.
2. DR (Data Register):
 The Data Register is used to temporarily hold data that is
being transferred between the CPU and memory.
 It acts as a buffer when data is read from or written to
memory.
 The DR holds the actual data that needs to be stored in
memory or processed by the CPU.

3. AR (Address Register):
 The Address Register is used to hold the memory address of
the data or instruction that needs to be accessed from or
written to memory.
 It's involved in the memory access cycle, where the CPU
specifies the location in memory it wants to interact with.
4. PC (Program Counter):
 The Program Counter is a special register that stores the
memory address of the next instruction to be fetched and
executed.
 It keeps track of the program's execution progress by
pointing to the address of the next instruction in
memory.
 After an instruction is fetched, the PC is updated to point
to the next instruction's address.
5. MAR (Memory Address Register):
 The Memory Address Register holds the memory address
that is currently being accessed.
 When the CPU needs to read or write data to memory, it
places the desired memory address in the MAR.
 This register essentially tells the memory module which
location is being targeted for data transfer.
6. MBR (Memory Buffer Register):
 The Memory Buffer Register temporarily holds data that has
been read from memory or data that is about to be written
to memory.
 It acts as an intermediate storage point between memory
and the CPU's internal registers.

7. IR (Instruction Register):
 The Instruction Register holds the currently fetched
instruction.
 It's responsible for storing the binary representation of
the instruction being executed.
 The Control Unit decodes the instruction stored in the IR
to determine which operation needs to be performed.
Common/Shared Bus System
 A common bus system, also known as a shared bus
system or a single bus architecture, is a type of computer
system architecture where multiple components within
the system share a single communication pathway or bus
for transferring data, addresses, and control signals
between different components.
 This architecture is commonly found in microcontrollers,
embedded systems, and some older computer systems.
 It simplifies the design and reduces costs but may limit
performance due to potential bottlenecks.
 Common buses can be classified into three main
categories
1. Address Bus 2. Data Bus 3. Control Bus
1. Address Bus:
 It carries the memory addresses from the CPU to the
memory subsystem or other devices.
 It determines the location in memory or device where
data is read from or written to.

2. Data Bus:
 It transfers the actual data between the CPU, memory,
and I/O devices.
 The width of the data bus determines the maximum
amount of data that can be transferred in parallel.

3. Control Bus:
 It carries control signals that coordinate and control the
activities of various components in the system.
 Control s1gnals include read/write signals, interrupt
signals, clock signals, and more.
Advantages of Common/Shared Bus System:
 Simplicity: The architecture is straightforward to design
and implement, making it suitable for simple systems.
 Cost-Effective: Fewer communication pathways are
required, reducing hardware costs.
 Compact: Well-suited for systems with limited space, like
embedded systems.
Disadvantages of Common/Shared Bus System:
 Limited Bandwidth: Multiple components sharing the
same bus can lead to congestion and reduced data transfer
rates, limiting performance.
 Bottlenecks: Since all components share the same
pathway, if one component is active, others might have to
wait, leading to bottlenecks.
 Scalability: It can be challenging to scale up the system's
performance without running into bandwidth limitations.
Dedicated Bus:
 A dedicated bus, as the name suggests, is a separate
communication pathway dedicated to a specific set of
components within a computer system or a specific type
of data transfer.
 Each component has its own dedicated bus for
communication, reducing contention and providing
higher bandwidth for the connected components.
 Dedicated buses are commonly used in high performance
systems or for critical communications requiring higher
bandwidth and low latency.
 Dedicated buses can be designed to meet specific
requirements such as connecting the CPU and Cache,
CPU and graphics processing unit (GPU), or CPU and
memory.
Advantages of Dedicated bus :
 Higher Bandwidth: Each component has its own dedicated
communication pathway, resulting in faster data transfer.
 Reduced contention: Since components have their own
dedicated buses, there is less contention for access.
 Suitable for high-performance systems with complex
communication requirements, like graphics-intensive
applications.
Disadvantages of Dedicated bus:
 Complexity: Dedicated buses require more physical
connections and are generally more complex to implement..
 Increased cost: More traces on the motherboard and
additional hardware can increase manufacturing costs.
 May not be suitable for simple systems where the added
complexity is unnecessary.
Common/Shared Bus v/s Dedicated Bus:
 In modern computer systems, you often find a
combination of both common/shared buses and
dedicated buses.
 For example, a system might have a common memory bus
shared among the CPU and main memory, while also
having dedicated buses for high-speed communication
with components like graphics cards, storage devices,
and network interfaces.
 The choice of bus architecture depends on the system's
intended use, performance requirements, and overall
design considerations.
Serial Bus:
 A serial bus transmits data sequentially, bit by bit, over a
single communication line. The bits are sent one after
the other in a serial fashion.
 This type of communication is common in modern
computing and communication systems. Examples of
serial buses include USB (Universal Serial Bus), SATA (Serial
Advanced Technology Attachment), and Ethernet.
Advantages of Serial Bus :
 Simplified wiring: Since only one communication line is
required, the physical wiring is less complex.
 Longer distances: Serial communication is more suitable
for long-distance communication due to the reduced
susceptibility to signal degradation.
 Scalability: Adding new devices to a serial bus is relatively
easy because it involves connecting them serially.
Disadvantages of Serial Bus :
 Slower data transfer: Transmitting data bit by bit can
result in slower data transfer rates compared to parallel
buses.
 Limited bandwidth: Serial communication has
limitations on the maximum data rate due to the sequential
nature of data transmission.
Parallel Bus:
 A parallel bus transmits multiple bits simultaneously over
multiple communication lines.
 Each line carries a single bit of data, and multiple lines
are used in parallel to transmit a full data word.
 Historically, parallel buses were more common in older
computer systems, but they have become less prevalent
due to the limitations they pose in terms of signal
integrity and complexity.
 Examples of parallel buses include the memory bus in
older computers and some internal data transfer
connections.
Advantages of Parallel Bus :
 Faster data transfer: Transmitting multiple bits
simultaneously allows for higher data transfer rates
compared to serial buses.
 Simultaneous communication: Parallel buses enable
multiple bits of data to be communicated simultaneously,
reducing latency.
 Suitable for short distances: Parallel buses are better
suited for short-distance communication within a device.
Disadvantages of Parallel Bus:
 Complex wiring: Multiple lines require more complex
and precise wiring, leading to manufacturing challenges
and increased costs.
 Signal integrity: As the number of lines increases,
maintaining signal integrity becomes more challenging
due to issues like crosstalk and skew.
 Limited scalability: Adding new devices to a parallel
bus can be more complex because each device needs to
be connected to all the individual lines.
 In modern computing, there has been a shift towards
using serial buses due to their advantages in terms of
simplicity, longer distances, and the ability to achieve
higher speeds through technologies like serial data
serialization.
 However, there are still cases where parallel buses are
used, such as certain high-performance computing
applications or scenarios where short-distance
communication is critical.
Thank you