Ijser: Single Phase PV Cell Fed H-Bridge Multilevel Inverter Using Boost Converter
Ijser: Single Phase PV Cell Fed H-Bridge Multilevel Inverter Using Boost Converter
ISSN 2229-5518
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Keywords— Photovoltaic Cells, Maximum Power Point
Tracking, Boost Converter, Cascaded H-Bridge Multilevel
inverter whose output voltage can be represented in the
Inverter . following five levels: zero, +V dc /2, V dc , −V dc /2, and −V dc .
As the number of output levels increases, the harmonic
1. INTRODUCTION content can be reduced. This inverter topology uses two
The demand for renewable energy has increased reference signals, instead of one reference signal, to generate
significantly over the years because of shortage of fossil fuels PWM signals for the switches. Both the reference signals
and greenhouse effect. Among various types of renewable Vref1 and
V ref2 are identical to each other, except for an offset value
energy sources, solar energy and wind energy have become
equivalent to the amplitude of the carrier signal V carrier .
very popular and demanding due to modern technology
Because the inverter is used in a PV system, a PI current
world. PV sources are used today in many advantages such
control scheme is employed to keep the output current
as fr e e fr om p ol l u t i on .Solar-electric-energy demand has
sinusoidal and to have high dynamic performance under
grown consistently by 20% - 25% per annum over the past 20
rapidly changing atmospheric conditions and to maintain the
years, which is mainly due to the decreasing costs and prices
power factor at near unity. Simulation results are presented to
[1]. PV inverter is used to convert dc power obtained from PV
validate the proposed inverter configuration.
modules into ac power to be fed into the load. Improving the
output waveform and performance of the inverter reduces its
respective harmonic content and, hence the size of the 2. PROPOSED CONCEPT
The proposed concept consists of the single phase
filter used and the level of electromagnetic interference (EMI) PV cell are connected to a H-Bridge Multilevel Inverter
generated by switching operation of the inverter [2].In recent using a boost converter. Maximum Power Point Tracking
years, multilevel inverters have become more attractive for (MPPT) is implemented in solar array power system with
researchers and manufacturers due to their advantages over direct control method. The incremental conductance
conventional three-level pulse width-modulated (PWM) algorithm is used to track the Maximum Power Point
inverters. They offer improved output waveforms, smaller tracking, as it performs better control under rapidly
alter size, lower EMI, lower total harmonic distortion (THD) changing atmospheric condition. Boost converter can step
[3- 4]. up the voltage without using a transformer. In multilevel
inverter use of two dc sources with the 8 switches instead of
The three common topologies for multilevel inverter are: 16 switches for conventional H bridge inverter to get required
1) Diode clamped (neutral clamped) five level output voltage and to reduce the harmonics. The
main disadvantage of conventional H bridge inverter is input
2) Capacitor clamped (dying capacitors)
voltage is fixed to over this problem, in the proposed
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function Ia=solar(Va,Suns,TaC)
k = 1.38e-23;
q = 1.60e-19;
n=2;
vg= 1.12;
Ns = 36;
T1 = 273 + 25;
Voc_T1 = 21.06/Ns;
Isc_T1 = 3.80;
T2 = 273 + 75;
Voc_T2 = 17.05/Ns;
Isc_T2 = 3.92;
multilevel inverter.The general configuration of proposed TaC=25;
circuit is shown in Fig 1. Suns=1;
TaK = 273 + TaC;
KO = (Isc_T2 - Isc_T1)/(T2 - T1);
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IL_T1 = Isc_T1 * Suns;
Fig 1: General Configuration of proposed circuit IL = IL_T1 + KO*(TaK - T1);
3. Methodology IO_T1 = Isc_T1/(exp(q*Voc_T1/(n*k*T1))-1);
IO= IO_T1*(TaK/T1).^(3/n).*exp(-q*vg/(n*k).*((1./TaK)-(1/T1)));
Xv = IO_T1*q/(n*k*T1) * exp(q*Voc_T1+T1/(n*k*T1));
3.1 PV ARRAY dVdI_V0c = - 1.15/Ns /2;
Photons of light with energy higher than the band- Rs = - dVdI_V0c - 1/Xv;
gap energy of PV material can make electrons in the material A=0.8
Va=0:8
break free from atoms that hold them and create electron and Vt_Ta =A * k * TaK / q; % = A* kT/q
hole pairs. These electrons however, will soon fall back into Vc = Va/Ns;
holes causing charge carriers to disappear. If a nearby electric Ia = zeros(size(Vc));
field is provided, those in the conduction band can be for j=1:5;
Ia = Ia-(IL - Ia -IO.*(exp((Vc + Ia.*Rs)./Vt_Ta)-1)) /
continuously swept away from holes toward a metallic (-1 - (IO.*(exp((Vc+Ia.*Rs)./Vt_Ta) -1)).*Rs./Vt_Ta);
contact where they will emerge as an electric current. The end
electric field with in the semiconductor itself at the plot(Ia)
junction between two regions of crystals of different type, for i=1:8
P(i)=Va(i)*Ia(i);
called a p-n junction. The PV cell has electrical contacts on End
its top and bottom to capture the electrons. When the PV
cell delivers power to the load, the electrons flow out of the where
n-side into the connecting wire, through the load, and back R s = Series Resistance of the cell
to the p-side where they recombine with holes [4]. Note that V tc = Thermal potential at working temperature
conventional current flows in the opposite direction from I o = Reverse saturation current at
electrons. working temperature
V c = cell voltage per cell
3.2 PV Model I a = output current of the cell
The use of equivalent electric circuits makes it I sc = short circuit current
possible to model characteristics of a PV cell. The m-file I sck = short circuit current at reference temperature
coding are implemented in MATLAB programs for T ak = Cell temperature in Kelvin
simulations. The below Fig. 2 shows M-File coding model of Tr ef = Reference Temperature (25 C) in Kelvin
solar cell. It is used to vary the input voltage according to I ok = Reverse saturation current
variation in temperature. at reference temperature
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The MPPT V-I curve in varying in sunlight is shown
in Fig. 5. Photovoltaic cells have a complex relationship
between their operating environment and the maximum power
they can produce. The fill factor, abbreviated FF, is a
parameter which characterizes the non-linear electrical
behavior of the solar cell. Fill factor is defined as the ratio of
Fig. 4: P-V characteristics of Solar cell the maximum power from the solar cell to the product of
Open Circuit Voltage V oc and Short-Circuit Current I sc . In
The output characteristics of a solar cell is tabulated data it is often used to estimate the maximum power
shown in Fig. 3 and the Fig. 4 shows the typical Power that a cell can provide with an optimal load under given
versus Voltage curve of the PV array. In this figure, P conditions, P=FF*V oc *I sc . For most purposes, FF, V oc , and Isc
is the power extracted from PV array and V is the are enough information to give a useful approximate model of
voltage across the terminals of the PV array. The
characteristics have different slopes at various points. the electrical behavior of a photovoltaic cell under typical
When maximum power is extracted from PV array the conditions. For any given set of operational conditions, cells
system is operating at MPPT where slope is zero. have a single operating point where the values of the current (I)
and Voltage (V) of the cell result in a maximum power output.
4. MPPT These values correspond to a particular load resistance, which
Maximum power point tracking (MPPT) is a is equal to V / I as specified by Ohm's Law. The power P is
technique that grid-tie inverters, solar battery chargers and given by P=V*I.
similar devices use to get the maximum possible power from
one or more photovoltaic devices, typically solar panels, A photovoltaic cell, for the majority of its useful curve,
though optical power transmission systems can benefit from acts as a constant current source. However, at a photovoltaic
similar technology. Solar cells have a complex relationship cell's MPP region, its curve has an approximately inverse
between solar irradiation, temperature and total resistance that exponential relationship between current and voltage. From
produces a non-linear output efficiency known as the I-V basic circuit theory, the power delivered from or to a device is
curve. It is the purpose of the MPPT system to sample the optimized where the derivative (graphically, the slope) dI/dV
output of the cells and apply the proper resistance (load) to of the I-V curve is equal and opposite the I/V ratio (where
obtain maximum power for any given environmental dP/dV=0). This is known as the maximum power point (MPP)
conditions. MPPT devices are typically integrated into and corresponds to the "knee" of the curve.
an electric power converter system that provides voltage or
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A load with resistance R=V/I equal to the reciprocal of sensor, to sense the PV array voltage and so the cost of
this value draws the maximum power from the device. This is implementation is less and hence easy to implement. The time
sometimes called the characteristic resistance of the cell. This complexity of this algorithm is very less but on reaching very
is a dynamic quantity which changes depending on the level close to the MPP it doesn’t stop at the MPP and keeps on
of illumination, as well as other factors such as temperature perturbing in both the directions. When this happens the
and the age of the cell. algorithm has reached very close to the MPP and we can set an
appropriate error limit or can use a wait function which ends
If the resistance is lower or higher than this value, the up
power drawn will be less than the maximum available, and
thus the cell will not be used as efficiently as it could be.
Maximum power point trackers utilize different types of
control circuit or logic to search for this point and thus to
allow the converter circuit to extract the maximum power
available from a cell.
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1. Perturb and observe (P&O) method
2. Incremental conductance method
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5 DC-DC CONVERTERS
The DC-DC converters are used as switching mode MODE 1 :
regulators to convert an unregulated dc voltage to a The basic operation of boost converter when switches
regulated dc output voltage. The regulation is normally is closed is shown in Fig 1.8 (a).When the switch is closed
achieved by PWM at a fixed frequency and the switching the inductor gets charged through the battery and stores the
device is generally BJT, MOSFET or IGBT. The energy. In this modes inductor current rises but for simplicity
minimum oscillator frequency should be about 100 times
longer than the transistor switching time to maximize
efficiency. This limitation is due to the switching loss in
the transistor. The transistor switching loss increases with
the switching frequency and thereby, the efficiency
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decreases. The core loss of the inductors limits the high
frequency operation. Control voltage Vc is obtained by
comparing the output voltage with its desired value. Then
the output voltage can be compared with its desired value
to obtain the control voltage Vcr. The PWM control
signal for the dc converter is generated by comparing Vcr
with a saw tooth voltage Vr[8]. There are four topologies
for the switching regulators: buck converter, boost
converter, buck-boost converter, cuk converter. However
my project work deals with the boost regulator and further
discussions will be concentrated towards this one . Fig. 5
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we assume that the charging and the discharging of the The Duty cycle (D) can be given as,
inductor are linear. The diode blocks the current flowing and
so the load current remains constant which is being supplied
due to the discharging of the capacitor . D= 1−
Vin(min)*η
Vout
MODE 2 :
(1)
Where V in (min) is the minimum input voltage,
The basic operation of boost converter when switches is V out is the desired output voltage, and η is the efficiency of the
open is shown in Fig 1.8 (b).In mode 2 the switch is open and converter.
so the diode becomes short circuited. The energy stored in the
The inductor ripple current (ΔI L ) can be given as
inductor gets discharged through opposite polarities with
Vout
charge the capacitor. The load current remains constant
throughout the operation.
∆IL =(0.2 to 0.4) * IOUT (max) *
Fig 1.8: basic operation of boost converter
Vin (2)
5.2 WAVEFORM OF BOOST CONVERTER The inductor (L) can be given as,
The output for the boost converter is given in the Fig 1.9The Vin * (Vout − Vin)
boost converter is a popular non-isolated power stage L=
topology, sometimes called a step-up power stage. Power ∆IL * fs *Vout (3)
supply designers choose the boost power stage because the
required output is always higher than the input voltage. The 6 CACADED H BRIDGE MULTILEVEL
input current for a boost power stage is continuous, or non-
INVERTER
pulsating, because the output diode conducts only during a
portion of the switching cycle. The output capacitor supplies
the entire load current for the rest of the switching cycle.
Inductor L and capacitor C make up the effective output filter.
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The capacitor equivalent series resistance (ESR), RC , and the
inductor dc resistance, RL , are included in the analysis.
Resistor(R) represents the load seen by the power supply
output. A power stage can operate in continuous or
discontinuous inductor current mode. In continuous inductor
current mode, current flows continuously in the inductor
during the
entire
switching
cycle in
steady-state
Fig. 10 : Cascaded H-bridge multilevel inverter
operation. In
discontinuous The diagrammatic representation for the cascaded H-
inductor bridge multilevel inverter is shown in the Fig 1.10. The output
current mode,
waveform of five level multilevel inverter is shown in Fig1.11
inductor
The main advantages of the cascaded multilevel inverter are
current is
that the regulation of the DC buses is simple. Modularity of
zero for a portion
control can be achieved. Unlike the diode clamped and
of the switching
capacitor clamped inverter where the individual phase legs
cycle. It starts at zero,
must be modulated by a central controller, the full-bridge
Fig.1.9: Output for Boost converter
inverters of a cascaded structure can be modulated separately.
reaches peak value, and return to zero during each switching
Requires the least number of components among all multilevel
cycle. It is desirable for a power stage to stay in only one
converters to achieve the same number of voltage levels.
mode over its expected operating conditions because the
Soft-switching can be used in this structure to avoid bulky and
power stage frequency response changes significantly
lossy resistor-capacitor-diode snubbers. To overcome the
between the two modes of operation.
demerits of the other types of the multilevel inverter the
cascaded H-bridge multilevel inverter have been used in this
5.3 DESIGN OF BOOST CONVERTER
work.
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OPERATION 0 V DC 2V DC -V DC -2V DC
S1 OFF ON OFF OFF OFF
S2 0FF ON OFF OFF OFF
S3 OFF OFF ON OFF OFF
S4 OFF OFF ON OFF OFF
S5 OFF OFF OFF ON OFF
S6 OFF OFF OFF ON OFF
S7 OFF OFF OFF OFF ON
S8 OFF OFF OFF OFF ON
(
a
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For each full bridge inverter the output voltage is given by where Ti is the integral time constant of PI controller. This
V 0i = Vdc (S1i − S 2i) (4) can be graphically shown in the Fig. 1.11 by assuming K=1
And the input dc current is K
and Ti=1. Constant Ki = is called “reset mode”. Integral
Idci = Ia (S1i − S 2i) (5) Ti
Where, controller is also sometimes called as reset control.
(a) i =1…5 (number of full bridge inverters
employed) for the 5 level type.
(c) S1i and S2i is the upper switch of each full bridge
inverter.
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is the ratio of reference amplitude (aM) to carrier
amplitude (Ac). Fig.1.15: PI controller signal generation
ma = Am / (m −1) Ac (7) The waveform PI controller signal generation is
given in the Fig. 1.11.The name comes from the term "manual
reset" which marks a manual change of operating point or of
The frequency ratio (mf) is ratio of carrier frequency (fc) to
"bias" u0 in order to eliminate error. PI controller performs
reference frequency (fm). this function automatically. If control signal of P controller in
mf = fc / fm (8) proportional area is compared with PI controller output signal
it can be seen that constant signal u0 is replaced with signal
7. CONTROLLERS proportional with the area under error curve.
t
A controller is a device that generates an output u 0 = K e(τ )dτ ∫ (10)
signal based on the input signal it receives. The input signal is
Ti 0
actually an error signal, which is the difference between the The fact that u 0 is replaced with an integral allows PI
measured variable and the desired value or set point. The controller to eliminate steady state error. On the other hand, P
basic block diagram of controllers is shown in Fig 1.14 . controller cannot eliminate steady state error since it does not
have any algorithm that would allow for the controller to
increase control signal u(t) in order to increase controlled
variable y(t) (assuming positive process gain) if in some
moment t1 error e(t1) = const. > 0. Proportional control law
stays constant in this case and it will not try to change a
controlled variable in such manner that control error is
diminished.
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Assuming positive process gain, increase in control PV simulation is given in the Fig 1.19. PDPWM switching
signal will result in increase in controlled variable and error strategy used in this paper. It consists of four reference
will tend toward zero. When e(t) < 0, control signal will signals are compared with the triangular carrier signal to
decrease, control variable will also decrease and error will produce P D PWM switching signals for switches S1-S8.
tend toward zero. PI controller will not be active only when The inverter adopts a full-bridge configuration with an
e(t) = 0. In all other situations PI controller will act to lead auxiliary circuit. PV arrays are connected to the inverter via a
steady state control error to zero. It can be concluded that PI dc–dc boost converter.
controller will eliminate forced oscillations and steady state
error resulting in operation of on-off controller and P
controller respectively. However, introducing integral mode
has a negative effect on speed of the response and overall
stability of the system. PI controllers are very often used in
industry, especially when speed of the response is not an issue.
Deceleration of response can be seen from transfer function of
integrator shown in Fig. 1.16
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the modulating or reference signal. The carrier has constant
period; therefore, the switches have constant switching
frequency. The switching instant is determined from the
crossing of the carrier and modulating signal. The power
(a)Transfer functions of integrator circuits for open loop is given in Fig 1.20 and the Power
circuit for the closed loop model is given in the Fig 1.21.
(b) PI controller transfer function Fig.1.18 : closed loop for the boost converter
Fig.1.16:Transfer functions of integrator and PI controller
8. Simulation Result and discussion
Simulations were performed by using MATLAB
SIMULINK and it also helps to confirm the PWM
switching strategy. Fig 1.17 shows the MATLAB simulation
for boost converter. Fig 1.18 shows the diagram of closed
loop of boost converter. Solar M-file coding for MPPT and
Fig1.19: M-file coding for MPPT and PV simulation
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Fig.1.24: THD for closed loop mode
Fig.1.22: Inverter output voltage
The simulated Inverter output voltage (V inv) for 0.5≤ COMPARSION BEETWEEN THD VALUE FOR OPEN
M ≤ 1. is shown in Fig 1.22 This output was observed from LOOP AND CLOSED LOOP MODEL
single phase five-level inverter. The Total Harmonic OPEN LOOP MODEL CLOSED LOOP MODEL
Distortion for the open loop model is shown in Fig.
1.23.and the THD for the closed loop model is shown in the 23.90% 1.13%
Fig. 1.24 and the harmonics are reduced from 23.90 to
1.13%. (1) Analysis of photovoltaic model
Insolation = 1000 w/m2
Ratings of PV cell (with bypass diode)
Voc = 22.2 volts, Isc = 5.45 Amp
Voltage at Pmax =17.2 volts, Current at Pmax = 4.95 Amp
Output dc voltage = 103.2 volts
(2) Analysis of boost converter
Input dc voltage = 103.2 volts
Inductance (L) = 2mH
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Load Resistance (Rl) =2K International Power Electronics an d Motion Control Conference EPE-
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