21-08-2025

Foundation of Computer
Systems
Dr. Joydeep Chandra
Associate Professor,
1 Department of Computer Science & Engg.,
IIT Patna
https://www.iitp.ac.in/~joydeep
Teaching Assistant

Name Email
Shivani Gupta shivani_2221cs18@iitp.ac.in
Evaluation

To be Announced
Text books

Computer Organization and Design, David A.

Petterson and John L. Hennessy, 6th Edition
Computer Organization and Architecture, William
Stallings, 10th or 11th Edition.
5
21-08-2025

Computer Systems
• Defined as a
• Combination of components designed to process data and store files
• A computer system requires
• Hardware, software and a user to fully function

Source: Javatpoint
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Hardware Components

Source: Javatpoint
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Computer Abstraction Hierarchy

Computer Architecture and Organization

•Attributes of a system visible to •Instruction set, number

the programmer of bits used to represent
various data types, I/O
mechanisms,
•Have a direct impact on the techniques for
logical execution of a program addressing memory
Architectural
Computer
attributes
Architecture
include:

attributes include:
Organizational
Computer
Organization

•Hardware details transparent to •The operational units

the programmer, control signals, and their
interfaces between the computer interconnections that
and peripherals, memory realize the architectural
technology used specifications

/36 Indian Institute of Technology Patna

Structure and Function

◼ Structure ◼ Hierarchical structure

◼ The way in which ◼ Set of interrelated subsystems
components relate to each
other ◼ Hierarchical nature of complex
systems is essential to both their
◼ Function design and their description
◼ The operation of individual
◼ Designer need only deal with a
components as part of the
particular level of the system at a
structure
time
◼ Concerned with structure and
function at each level

/36 Indian Institute of Technology Patna

Function
◼ There are four basic functions that a computer can perform:
◼ Data processing
◼ Data may take a wide variety of forms and the range of processing
requirements is broad
◼ Data storage
◼ Short-term

◼ Long-term
◼ Data movement
◼ Input-output (I/O) - when data are received from or delivered to a device
(peripheral) that is directly connected to the computer
◼ Data communications – when data are moved over longer distances, to or
from a remote device
◼ Control
◼ A control unit manages the computer’s resources and orchestrates the
performance of its functional parts in response to instructions
/36 Indian Institute of Technology Patna
Structural Components of the Computer

THERE ARE FOUR MAIN STRUCTURAL COMPONENTS OF THE COMPUTER :

 CPU – controls the operation of the computer and performs its data
processing functions

 Main Memory – stores data

 I/O – moves data between the computer and its external environment
 System Interconnection – some mechanism that provides for
communication among CPU, main memory, and I/O

/36 Indian Institute of Technology Patna

Structure
COMPUTER

Main
I/O
memory

System
Bus

CPU

CPU

Registers ALU

Internal
Bus

Contr ol
Unit

CONTROL
UNIT
Sequencing
Logic

Contr ol Unit
Registers and
Decoders

Contr ol
Memory

Figure 1.1 A Top-Down View of a Computer

/36 Indian Institute of Technology Patna
Multicore Computer Structure

◼ Central processing unit (CPU)

◼ Portion of the computer that fetches and executes instructions
◼ Consists of an ALU, a control unit, and registers
◼ Referred to as a processor in a system with a single processing unit

◼ Core
◼ An individual processing unit on a processor chip
◼ May be equivalent in functionality to a CPU on a single-CPU system
◼ Specialized processing units are also referred to as cores

◼ Processor
◼ A physical piece of silicon containing one or more cores
◼ Is the computer component that interprets and executes instructions
◼ Referred to as a multicore processor if it contains multiple cores

/36 Indian Institute of Technology Patna

Cache Memory

◼ Multiple layers of memory between the processor and main memory

◼ Is smaller and faster than main memory

◼ Used to speed up memory access by placing in the cache data from main
memory that is likely to be used in the near future

◼ A greater performance improvement may be obtained by using multiple levels

of cache, with level 1 (L1) closest to the core and additional levels (L2, L3, etc.)
progressively farther from the core

/36 Indian Institute of Technology Patna

 MOTHERBOARD
Main memory chips

Processor
I/O chips chip

PROCESSOR CHIP

Core Core Core Core

L3 cache L3 cache

Core Core Core Core

CORE
Arithmetic
Instruction and logic Load/
logic unit (ALU) store logic

L1 I-cache L1 data cache

L2 instruction L2 data
cache cache

Figure 1.2 Simplified view of major elements of a Multi-core Computer

/36 Indian Institute of Technology Patna
 DF
Fig 1.3 Motherboard with two Intel Quad-Core Xeon Processors

/36 Indian Institute of Technology Patna

History of Computers
First Generation: Vacuum Tubes

◼ Vacuum tubes were used for digital logic elements and memory
◼ IAS computer
◼ Fundamental design approach was the stored program concept
◼ Attributed to the mathematician John von Neumann

◼ First publication of the idea was in 1945 for the EDVAC

◼ Design began at the Princeton Institute for Advanced Studies
◼ Completed in 1952
◼ Prototype of all subsequent general-purpose computers

/36 Indian Institute of Technology Patna

 Arithmetic-logic unit (CA)

AC MQ

Input-
Arithmetic-logic output
circuits
equipment
(I, O)

MBR

Instructions
and data

Instructions
and data
M(0)
M(1)
M(2)
M(3) PC IBR
M(4) AC: Accumulatorregister
MQ: multiply-quotient register
MBR: memory buf fer register
IBR: instruction buf
fer register
MAR IR PC: program counter
Main MAR: memory address register
IR: insruction register
memory
(M)
Control
Control
circuits
signals
M(4092)
M(4093) Fig 1.4 IAS Architecture
M(4095)
Pr
ogram control unit (CC)

Addresses

/36 Indian Institute of Technology Patna

 0 1 39

sign bit (a) Number word

left instruction (20 bits) right instruction (20 bits)

0 8 20 28 39

opcode (8 bits) addr

ess (12 bits) opcode (8 bits) addr
ess (12 bits)

(b) Instruction word

Fig 1.5 IAS Memory Formats

/36 Indian Institute of Technology Patna

Registers

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 Start

Yes Is next No
instruction MAR PC
No memory in IBR?
Fetch access
cycle required
MBR M(MAR)

Left
No instruction Yes IBR MBR (20:39)
IR IBR (0:7) IR MBR (20:27)
IR MBR (0:7)
MAR IBR (8:19) MAR MBR (28:39) required?
MAR MBR (8:19)

PC PC + 1

Decode instruction in IR

AC M(X) Go to M(X, 0:19) IfAC > 0 then AC AC + M(X)

go to M(X, 0:19)

Execution Yes
Is AC > 0?
cycle

MBR M(MAR) PC MAR No MBR M(MAR)

AC MBR AC AC + MBR Fig 1.6 Partial flowchart of IAS Operation

M(X) = contents of memory location whose addr ess is X

(i:j) = bits i thr ough j

/36 Indian Institute of Technology Patna

 Table 1.1 The IAS Instruction Set
Symbolic
Instruction Type Opcode Representation Description
00001010 LOAD MQ Transfer contents of register MQ to the
accumulator AC
00001001 LOAD MQ,M(X) Transfer contents of memory location X to
MQ
00100001 STOR M(X) Transfer contents of accumulator to memory
Data transfer location X
00000001 LOAD M(X) Transfer M(X) to the accumulator
00000010 LOAD –M(X) Transfer –M(X) to the accumulator
00000011 LOAD |M(X)| Transfer absolute value of M(X) to the
accumulator
00000100 LOAD –|M(X)| Transfer –|M(X)| to the accumulator
Unconditional 00001101 JUMP M(X,0:19) Take next instruction from left half of M(X)
branch 00001110 JUMP M(X,20:39) Take next instruction from right half of M(X)
00001111 JUMP+ M(X,0:19) If number in the accumulator is nonnegative,
take next instruction from left half of M(X)
0 JU If number in the
0 MP accumulator is nonnegative,
Conditional branch 0 + take next instruction from
1 M(X right half of M(X)
0 ,20:
0 39)
0
0
00000101 ADD M(X) Add M(X) to AC; put the result in AC
00000111 ADD |M(X)| Add |M(X)| to AC; put the result in AC
00000110 SUB M(X) Subtract M(X) from AC; put the result in AC
00001000 SUB |M(X)| Subtract |M(X)| from AC; put the remainder
in AC
00001011 MUL M(X) Multiply M(X) by MQ; put most significant
bits of result in AC, put least significant bits
Arithmetic
in MQ
00001100 DIV M(X) Divide AC by M(X); put the quotient in MQ
and the remainder in AC
00010100 LSH Multiply accumulator by 2; i.e., shift left one
bit position
00010101 RSH Divide accumulator by 2; i.e., shift right one
position
00010010 STOR M(X,8:19) Replace left address field at M(X) by 12
rightmost bits of AC
Address modify
00010011 STOR M(X,28:39) Replace right address field at M(X) by 12
/36 rightmost bits of AC Indian Institute of Technology Patna
History of Computers

Second Generation: Transistors

◼ Smaller

◼ Cheaper

◼ Dissipates less heat than a vacuum tube

◼ Is a solid state device made from silicon

◼ Was invented at Bell Labs in 1947

◼ It was not until the late 1950’s that fully transistorized computers were
commercially available

/36 Indian Institute of Technology Patna

Computer Generations

Approximate Typical Speed

Generation Dates Technology (operations per second)
1 1946–1957 Vacuum tube 40,000
2 1957–1964 Transistor 200,000
3 1965–1971 Small and medium scale 1,000,000
integration
4 1972–1977 Large scale integration 10,000,000
5 1978–1991 Very large scale integration 100,000,000
6 1991- Ultra large scale integration >1,000,000,000

/36 Indian Institute of Technology Patna

Second Generation Computers

◼ Introduced:
◼ More complex arithmetic and logic units and control units
◼ The use of high-level programming languages
◼ Provision of system software which provided the ability to:
◼ Load programs
◼ Move data to peripherals
◼ Libraries perform common computations

/36 Indian Institute of Technology Patna

 IBM 7094 computer Peripheral devices

Mag tape
units
CPU
Card
punch
Data
channel Line
printer

Card
reader

Drum
Multi- Data
plexor channel
Disk

Data
Disk
channel

Hyper-
tapes

Memory Data Teleprocessing

channel equipment

Figure 1.9 An IBM 7094 Configuration

/36 Indian Institute of Technology Patna
History of Computers
Third Generation: Integrated Circuits

◼ 1958 – the invention of the integrated circuit

◼ Discrete component
◼ Single, self-contained transistor
◼ Manufactured separately, packaged in their own containers, and soldered or
wired together onto masonite-like circuit boards
◼ Manufacturing process was expensive and cumbersome

◼ The two most important members of the third generation were the IBM
System/360 and the DEC PDP-8

/36 Indian Institute of Technology Patna

 Boolean Binary
Input logic Output Input storage Output
function cell

Read

Activate Write
signal

(a) Gate (b) Memory cell

Figure 1.10 Fundamental Computer Elements

/36 Indian Institute of Technology Patna

Integrated Circuits
◼ A computer consists of gates,
memory cells, and
◼ Data storage – provided by
interconnections among these
memory cells
elements
◼ Data processing – provided by
◼ The gates and memory cells are
gates
constructed of simple digital
electronic components ◼ Data movement – the paths among
◼ Exploits the fact that such
components as transistors, resistors, components are used to move data
and conductors can be fabricated from memory to memory and from
from a semiconductor such as silicon memory through gates to memory
◼ Many transistors can be produced at
the same time on a single wafer of ◼ Control – the paths among
silicon components can carry control
signals
◼ Transistors can be connected with a
processor metallization to form
circuits

/36 Indian Institute of Technology Patna

 Wafer

Chip

Gate

Packaged
chip

Figure 1.11 Relationship Among Wafer, Chip, and Gate

/36 Indian Institute of Technology Patna
 t
ui
g

ed of
rc
or in

ga w
d
st rk

ci

ul l a
at n

te
gr tio
si o

’s
an w

om e
te n

r
tr irst

in ve

p r oo
In

M
F
100 bn
10 bn
1 bn
100 m
10 m
100,000
10.000
1,000
100
10
1
1947 50 55 60 65 70 75 80 85 90 95 2000 05 11

Figure 1.12 Growth in Transistor Count on Integrated Circuits

(DRAM memory)
/36 Indian Institute of Technology Patna
Moore’s Law

/30 Indian institute of technology Patna

IBM System/360
◼ Announced in 1964

◼ Product line was incompatible with older IBM machines

◼ Was the success of the decade and cemented IBM as the overwhelmingly dominant
computer vendor

◼ The architecture remains to this day the architecture of IBM’s mainframe computers

◼ Was the industry’s first planned family of computers

◼ Models were compatible in the sense that a program written for one model should be
capable of being executed by another model in the series

/36 Indian Institute of Technology Patna

Family Characteristics

Similar or identical Similar or identical

instruction set operating system

Increasing number
Increasing speed
of I/O ports

Increasing memory
Increasing cost
size

/36 Indian Institute of Technology Patna

Microprocessors

◼ The density of elements on processor chips continued to rise

◼ More and more elements were placed on each chip so that fewer and fewer
chips were needed to construct a single computer processor

◼ 1971 Intel developed 4004

◼ First chip to contain all of the components of a CPU on a single chip
◼ Birth of microprocessor

◼ 1972 Intel developed 8008

◼ First 8-bit microprocessor

◼ 1974 Intel developed 8080

◼ First general purpose microprocessor
◼ Faster, has a richer instruction set, has a large addressing capability

/36 Indian Institute of Technology Patna

Evolution of Intel Microprocessors

4004 8008 8080 8086 8088

Introduced 1971 1972 1974 1978 1979
5 MHz, 8 MHz, 10
Clock speeds 108 kHz 108 kHz 2 MHz 5 MHz, 8 MHz
MHz
Bus width 4 bits 8 bits 8 bits 16 bits 8 bits
Number of
2,300 3,500 6,000 29,000 29,000
transistors
Feature size
10 8 6 3 6
(µm)
Addressable 640 Bytes 16 KB 64 KB 1 MB 1 MB
memory

(a) 1970s Processors

/36 Indian Institute of Technology Patna

Evolution of Intel Microprocessors

80286 386TM DX 386TM SX 486TM DX

CPU
Introduced 1982 1985 1988 1989
Clock speeds 6 MHz - 12.5 16 MHz - 33 16 MHz - 33 25 MHz - 50
MHz MHz MHz MHz
Bus width 16 bits 32 bits 16 bits 32 bits
Number of transistors
134,000 275,000 275,000 1.2 million
Feature size (µm) 1.5 1 1 0.8 - 1
Addressable
16 MB 4 GB 16 MB 4 GB
memory
Virtual
1 GB 64 TB 64 TB 64 TB
memory
Cache — — — 8 kB

(b) 1980s Processors

/36 Indian Institute of Technology Patna
Evolution of Intel Microprocessors

486TM SX Pentium Pentium Pro Pentium II

Introduced 1991 1993 1995 1997
Clock speeds 16 MHz - 33 60 MHz - 166 150 MHz - 200 200 MHz - 300
MHz MHz, MHz MHz
Bus width 32 bits 32 bits 64 bits 64 bits
Number of 1.185 million 3.1 million 5.5 million 7.5 million
transistors
Feature size (µm) 1 0.8 0.6 0.35
Addressable
4 GB 4 GB 64 GB 64 GB
memory
Virtual memory 64 TB 64 TB 64 TB 64 TB
512 kB L1 and 1
Cache 8 kB 8 kB 512 kB L2
MB L2

(c) 1990s Processors

/36 Indian Institute of Technology Patna

Evolution of Intel Microprocessors
Core 2 Duo Core i7 EE
Pentium III Pentium 4
4960X
Introduced 1999 2000 2006 2013
Clock speeds 450 - 660 MHz 1.3 - 1.8 GHz 1.06 - 1.2 GHz 4 GHz
Bus
wid 64 bits 64 bits 64 bits 64 bits
th
Number of 9.5 million 42 million 167 million 1.86 billion
transistors
Feature size (nm) 250 180 65 22
Addressable
64 GB 64 GB 64 GB 64 GB
memory
Virtual memory 64 TB 64 TB 64 TB 64 TB
Cache 512 kB L2 256 kB L2 2 MB L2 1.5 MB L2/15
MB L3
Number of cores 1 1 2 6

(d) Recent Processors

/36 Indian Institute of Technology Patna
The Evolution of the Intel x86 Architecture

◼ Two processor families are the Intel x86 and the ARM architectures

◼ Current x86 offerings represent the results of decades of design effort on

complex instruction set computers (CISCs)

◼ An alternative approach to processor design is the reduced instruction set

computer (RISC)

◼ ARM architecture is used in a wide variety of embedded systems and is one

of the most powerful and best-designed RISC-based systems on the market

/36 Indian Institute of Technology Patna

Highlights of the Evolution of the Intel Product Line:
8080 8086 80286 80386 80486
•World’s first •A more • Extension of the • Intel’s first 32-bit • Introduced the use
general-purpose powerful 16-bit 8086 enabling machine of much more
microprocessor machine addressing a 16- • First Intel sophisticated and
MB memory processor to powerful cache
•8-bit machine, •Has an instead of just support technology and
8-bit data path instruction 1MB multitasking sophisticated
to memory cache, or queue, instruction
•Was used in the that prefetches a pipelining
first personal few instructions • Also offered a
computer before they are built-in math
executed coprocessor
(Altair)
•The first
appearance of
the x86
architecture
•The 8088 was a
variant of this
processor and
used in IBM’s
first personal
computer
(securing the
success of Intel
/36 Indian Institute of Technology Patna
Highlights of the Evolution of the Intel Product Line:
Pentium
• Intel introduced the use of superscalar techniques, which allow multiple instructions to execute in parallel
Pentium Pro
• Continued the move into superscalar organization with aggressive use of register renaming, branch
prediction, data flow analysis, and speculative execution
Pentium II
• Incorporated Intel MMX technology, which is designed specifically to process video, audio, and graphics
data efficiently
Pentium III
•Incorporated additional floating-point instructions
•Streaming SIMD Extensions (SSE)
Pentium 4
• Includes additional floating-point and other enhancements for multimedia
Core
• First Intel x86 micro-core
Core 2
• Extends the Core architecture to 64 bits
• Core 2 Quad provides four cores on a single chip
• More recent Core offerings have up to 10 cores per chip
• An important addition to the architecture was the Advanced Vector Extensions instruction set

/36 Indian Institute of Technology Patna