COMPUTER ORGANIZATION AND
ARCHITECTURE
Dr.M.Sindhuja
Assistant Professor(Senior Grade)
School of Electronics
VIT, Chennai
MODULE 1
INTERCONNECTION OF COMPONENTS
• A computer has set of three basic components or modules (processor,
memory, I/O) that communicate with each other.
• Need a paths for connecting the modules.
•Collection of paths connecting the various modules is called the
interconnection structure.
•The interconnection structure must support the transfers between various
components
MEMORY CONNECTION
• Receives and sends data
• Receives addresses (of locations)
• Receives control signals
• Read
• Write
• Timing
I/O CONNECTION
• I/O module control more than one external
device
• Each of the interface to an device is referred
as a port and given each a unique address
( e.g. 0, 1,…. M-1).
• I/O module may be able to send interrupt
signals to the processor
I/O CONNECTION
• I/O Connection
• Similar to memory from computer’s view
point
• Output
• Receive data from computer
• Send data to peripheral
• Input
• Receive data from peripheral
• Send data to computer
• Receive control signals from computer
• Send control signals to peripherals
• eg. spin disk
• Receive addresses from computer
• eg. port number to identify peripheral
• Send interrupt signals (control)
CPU CONNECTION
• Reads instruction and data
• Writes out data (after processing)
• Sends control signals to other units
• Receives (& acts on) interrupts
Interconnections
The interconnection structure support the following types of transfers:
Memory to processor:
processor reads an instruction or data from memory.
Processor to memory:
The processor writes a data to memory.
I/O to processor:
The processor reads data from an I/O device via an I/O module.
Processor to I/O:
The processor sends data to the I/O device.
I/O to or from memory:
I/O module exchange data directly with memory, without going through processor,
using direct memory access.
BUS INTERCONNECTION
• The most common interconnection structure is BUS
• Bus structures are still commonly used for Embedded systems, particularly
Microcontroller
• Communication pathway connecting two or more devices
• Characteristic of a bus is a shared transmission medium
•Bus has multiple communication pathways or lines.
•Each line capable of transmit signals representing binary 1 and 0
•8 bit unit of data can transmit over eight bus lines
BUS INTERCONNECTION SCHEME
• A bus which connects major computer components is called a system Bus.
• Most common computer interconnection structures are based on use of one or
more system bus
• It has 50 to 100s of separate lines. Each line is assigned a particular function.
DATA LINES
• Data lines provide a path for moving data among system modules, called data
bus
• Data bus has 8, 16, 32 or even more separate lines,
No of lines =width of the data bus
Key factor is the width of the data bus
Example,
Width of data bus = 32 bits, instruction =64 bits long
Processor access the memory module twice during each instruction cycle
ADDRESS LINES
• designate the source or destination of the data on the data bus.
• For example,
if processor wishes to read a word (8, 16, or 32 bits) of data from memory,
it puts the address of the desired word on the address lines.
•Width of address bus determine maximum possible memory capacity
•Address lines are also used to address I/O ports.
CONTROL LINES
• Control the access to and the use of the data and address lines.
• Transmit both command and timing information among system modules.
• Timing signals indicate validity of data and address information.
• Command signals specify operations to be performed.
• Control signals:
Memory write/Read, Interrupt request, Interrupt ack, I/O write/Read
REGISTER AND REGISTER FILES
REGISTERS
Depending on the roles played by the registers they can be categorized into
two types
User-visible registers:
visible to machine- or assembly-language programmer
They use these registers to minimize main memory references in the
instructions.
registers can only be referenced using the machine or assembly language.
Control and status registers:
These registers are utilized by the control unit to control the operation of the CPU
and by OS programs to manage the execution of programs.
Not visible to user
USER-VISIBLE REGISTERS
GENERAL PURPOSE REGISTER (GPR)
Hold both the addresses or the data.
Accepts intermediate results in course of program execution
Programmers can restrict some of GPR to specific functions (Eg: for stack operations
and floating point operations)
Also employed for addressing functions
DATA REGISTERS
Used to Hold data
Programmers cant use these registers for calculating operand address
ADDRESS REGISTERS
It has address of an operand or it can also act as GPR register
dedicated to certain addressing mode
Address registers must be long enough to hold the largest address.
Examples:
Segment pointer register:
In order to support segmentation, the address issued by the processor should consist of
a segment number (base) and a displacement (or an offset) within the segment.
segment register holds the base address of the segment.
Index registers:
the address of the operand is obtained by adding a constant to the content of a
register, called the index register.
The index register holds an address displacement.
Index addressing is indicated in the instruction by including the name of the index
register in parentheses and using the symbol X to indicate the constant to be added.
Stack pointer register:
Two specific operations can be performed on a stack. These are the Push and the Pop
operations.
A specific register, called the stack pointer (SP), is used to indicate the stack location
that can be addressed.
In the stack push operation, the SP value is used to indicate the location (called the
top of the stack).
After storing (pushing) this value, the SP is incremented (in some architectures, e.g.
X86, the SP is decremented as the stack grows low in memory)
CONDITION CODES or Condition Register:
Condition registers, or flags, are used to maintain status information
Some architecture have a register termed as Program Status Word (PSW).
The PSW contains bits that are set by the CPU to indicate the current status of an
executing program.
Sign: This field has the resultant sign bit of the last arithmetic operation performed.
Zero: This field is set when the result of the operation is zero.
Carry: This field is set when an arithmetic operation results in a carry into or borrow
out.
Equal: If a logical operation results in, equality the Equal bit is set.
Overflow: This bit indicates the arithmetic overflow.
Interrupt: This bit is set to enable or disable the interrupts.
Supervisor: This bit indicates whether the processor is executing in the supervisor
mode or the user mode .
CONTROL AND STATUS REGISTER
Program Counter
The program counter is a processor register that holds the address of the
instruction that has to be executed next.
program counter gets incremented with the address of the next instruction to be
fetched for execution.
Instruction Register
Instruction register has the instruction that is currently fetched. It helps in
analyzing the opcode and operand present in the instruction.
Memory Address Register (MAR) and Memory Buffer Register (MBR ):
MBR and MAR are used exclusively by the CPU and are not directly accessible to
programmers.
In order to perform a write operation into a specified memory location, the MBR and
MAR are used as follows:
1. The word to be stored into the memory location is first loaded by the CPU into
MBR.
2. The address of the location into which the word is to be stored is loaded by the
CPU into a MAR.
3. A write signal is issued by the CPU.
Similarly, to perform a memory read operation, the MBR and MAR are used as
follows:
1. The address of the location from which the word is to be read is loaded into
the MAR.
2. A read signal is issued by the CPU.
3. The required word will be loaded by the memory into the MBR ready for use
by the CPU.
EXAMPLES OF REGISTER ORGANIZATION
REGISTER FILES
REGISTER FILE WITH THREE ACCESS PORT-SYMBOL
REGISTER FILE WITH THREE ACCESS PORT-LOGIC DIAGRAM
