TPS2061, TPS2062, TPS2063

D−8 DGN−8 D−16

TPS2065, TPS2066, TPS2067
www.ti.com SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES

FEATURES APPLICATIONS
• 70-mΩ High-Side MOSFET • Heavy Capacitive Loads
• 1-A Continuous Current • Short-Circuit Protections
• Thermal and Short-Circuit Protection TPS2061/TPS2065 TPS2062/TPS2066
D AND DGN PACKAGE D AND DGN PACKAGE
• Accurate Current Limit (1.1 A min, 2.1 A max) (TOP VIEW) (TOP VIEW)

• Operating Range: 2.7 V to 5.5 V GND 1 8 OUT GND 1 8 OC1

• 0.6-ms Typical Rise Time IN 2 7 OUT IN 2 7 OUT1
IN 3 6 OUT EN1† 3 6 OUT2
• Undervoltage Lockout EN† 4 5 OC EN2† 4 5 OC2

• Deglitched Fault Report (OC)

TPS2063/TPS2067
• No OC Glitch During Power Up D PACKAGE
(TOP VIEW)
• 1-µA Maximum Standby Supply Current
GND 1 16 OC1
• Bidirectional Switch IN1 2 15 OUT1
EN1† 3 14 OUT2
• Ambient Temperature Range: -40°C to 85°C EN2† 4 13 OC2

• GND 5 12 OC3
ESD Protection IN2 6 11 OUT3
• UL Listed - File No. E169910 EN3† 7 10 NC
NC 8 9 NC

† All Enable Inputs Are Active High For TPS2065, TPS2066, and TPS2067

DESCRIPTION
The TPS206x power-distribution switches are intended for applications where heavy capacitive loads and
short-circuits are likely to be encountered. This device incorporates 70-mΩ N-channel MOSFET power switches
for power-distribution systems that require multiple power switches in a single package. Each switch is controlled
by a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch
rise times and fall times to minimize current surges during switching. The charge pump requires no external
components and allows operation from supplies as low as 2.7 V.
When the output load exceeds the current-limit threshold or a short is present, the device limits the output current
to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When
continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the junction
temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal
shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remains
off until valid input voltage is present. This power-distribution switch is designed to set current limit at 1.5 A
typically.

GENERAL SWITCH CATALOG

TPS2042B 500 mA
80 mΩ, dual TPS2052B 500 mA
33 mΩ, single TPS201xA 0.2 A − 2 A 80 mΩ, dual 80 mΩ, triple 80 mΩ, quad 80 mΩ, quad
TPS202x 0.2 A − 2 A TPS2046 250 mA
TPS203x 0.2 A − 2 A TPS2056 250 mA
TPS2062 1A
TPS2066 1A

80 mΩ, single TPS2014 600 mA 260 mΩ TPS2100/1 TPS2080 500 mA

TPS2015 1A IN1 500 mA TPS2081 500 mA TPS2043 500 mA
IN1 TPS2082 500 mA TPS2085 500 mA
TPS2041B 500 mA IN2 10 mA TPS2053B 500 mA
IN2 OUT TPS2044B 500 mA
TPS2051B 500 mA TPS2090 250 mA TPS2047 250 mA TPS2086 500 mA
TPS2102/3/4/5 TPS2054B 500 mA
TPS2091 250 mA TPS2087 500 mA
TPS2045 250 mA 1.3 Ω IN1 500 mA TPS2057 250 mA TPS2048 250 mA
TPS2055 250 mA IN2 100 mA TPS2092 250 mA TPS2063 1A TPS2095 250 mA
TPS2058 250 mA
TPS2061 1A TPS2067 1A TPS2096 250 mA
TPS2065 1A TPS2097 250 mA

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright © 2003–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTION AND ORDERING INFORMATION

RECOMMENDED TYPICAL PACKAGED
MAXIMUM SHORT-CIRCUIT NUMBER OF DEVICES (1)
TA ENABLE
CONTINUOUS CURRENT LIMIT SWITCHES
LOAD CURRENT AT 25°C MSOP (DGN) SOIC(D)
Active low TPS2061DGN TPS2061D
Single
Active high TPS2065DGN TPS2065D
Active low TPS2062DGN TPS2062D
-40°C to 85°C 1A 1.5 A Dual
Active high TPS2066DGN TPS2066D
Active low - TPS2063D
Triple
Active high - TPS2067D

(1) The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2062DR).

LEAD (PB-FREE) ORDERING INFORMATION

TA SOIC(D) STATUS (1) ECO-STATUS (2) MSOP (DGN) STATUS (1) ECO-STATUS (2)
TPS2061DG4 Active TPS2061DGNG4 Active
TPS2062DG4 Active TPS2062DGNG4 Active
-40°C to 85°C Green Green
TPS2065DG4 Active TPS2065DGNG4 Active
TPS2066DG4 Active TPS2066DGNG4 Active

(1) The marketing status values are defined as follows:

• LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
• NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend
using this part in a new design.
• PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
• OBSOLETE: TI has discontinued production of the device.
(2) Eco-Status information - Additional details including specific material content can be accessed at www.ti.com/leadfree
• N/A: Not yet available Lead (Pb)-Free, for estimated conversion dates go to www.ti.com/leadfree.
• Pb-Free: TI defines “Lead (Pb)-Free” or “Pb-Free” to mean RoHS compatible, including a lead concentration that does not exceed
0.1% of total product weight, and, if designed to be soldered, suitable for use in specified lead-free soldering processes.
• Green: TI defines “Green” to mean Lead (Pb)-Free and in addition, uses package materials that do not contain halogens, including
bromine (Br), or antimony (Sb) above 0.1% of total product weight.

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 TPS2061, TPS2062, TPS2063
www.ti.com
TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted (1)
UNIT
Input voltage range, VI(IN) (2) -0.3 V to 6 V
Output voltage range, VO(OUT) (2), VO(OUTx) -0.3 V to 6 V
Input voltage range, VI(/EN), VI(EN), VI(/ENx), VI(ENx) -0.3 V to 6 V
Voltage range, VI(/OC), VI(/OCx) -0.3 V to 6 V
Continuous output current, IO(OUT), IO(OUTx) Internally limited
Continuous total power dissipation See Dissipation Rating Table
Operating virtual junction temperature range, TJ -40°C to 125°C
Storage temperature range, Tstg -65°C to 150°C
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds 260°C
Human body model MIL-STD-883C 2 kV
Electrostatic discharge (ESD) protection
Charge device model (CDM) 500 V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND.

DISSIPATING RATING TABLE

TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C
PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING
D-8 585.82 mW 5.8582 mW/°C 322.20 mW 234.32 mW
DGN-8 1712.3 mW 17.123 mW/°C 941.78 mW 684.33 mW
D-16 898.47 mW 8.9847 mW/°C 494.15 mW 359.38 mW

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT
Input voltage, VI(IN) 2.7 5.5 V
Input voltage, VI(/EN), VI(EN), VI(/ENx), VI(ENx) 0 5.5 V
Continuous output current, IO(OUT), IO(OUTx) 0 1 A
Operating virtual junction temperature, TJ -40 125 °C

ELECTRICAL CHARACTERISTICS
over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(/ENx) = 0 V, or VI(ENx) = 5.5 V (unless
otherwise noted)
PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNIT
POWER SWITCH
Static drain-source on-state
resistance, 5-V operation and VI(IN) = 5 V or 3.3 V, IO = 1 A -40°C ≤ TJ ≤ 125°C 70 135 mΩ
3.3-V operation
rDS(on)
Static drain-source on-state
resistance, 2.7-V VI(IN) = 2.7 V, IO = 1 A -40°C ≤ TJ ≤ 125°C 75 150 mΩ
operation (2)
VI(IN) = 5.5 V 0.6 1.5
tr (2) Rise time, output
VI(IN) = 2.7 V CL = 1 µF, 0.4 1
TJ = 25°C ms
VI(IN) = 5.5 V RL = 5 Ω 0.05 0.5
tf (2) Fall time, output
VI(IN) = 2.7 V 0.05 0.5
ENABLE INPUT EN OR EN

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
(2) Not tested in production, specified by design.

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TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

ELECTRICAL CHARACTERISTICS (continued)

over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(/ENx) = 0 V, or VI(ENx) = 5.5 V (unless
otherwise noted)
PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNIT
VIH High-level input voltage 2.7 V ≤ VI(IN) ≤ 5.5 V 2
V
VIL Low-level input voltage 2.7 V ≤ VI(IN) ≤ 5.5 V 0.8
II Input current VI(/ENx) = 0 V or 5.5 V, VI(ENx) = 0 V or 5.5 V -0.5 0.5 µA
ton (3) Turnon time CL = 100 µF, RL = 5 Ω 3
ms
toff (3) Turnoff time CL = 100 µF, RL = 5 Ω 10
CURRENT LIMIT
IOS Short-circuit output current VI(IN) = 5 V, OUT connected to GND, device enabled into short-circuit 1.1 1.5 2.1 A
IOC_TRIP (3) Over-current trip threshold VI(IN) = 5 V, current ramp (≤ 100 A/s) on OUT 2.4 3 A
SUPPLY CURRENT (TPS2061, TPS2065)

No load on OUT, VI(/ENx) = 5.5 V, TJ = 25°C 0.5 1

Supply current, low-level output µA
or VI(ENx) = 0 V -40°C ≤ TJ ≤ 125°C 0.5 5

No load on OUT, VI(/ENx) = 0 V, TJ = 25°C 43 60

Supply current, high-level output µA
or VI(ENx) = 5.5 V -40°C ≤ TJ ≤ 125°C 43 70
OUT connected to ground, VI(/EN) = 5.5 V,
Leakage current -40°C ≤ TJ ≤ 125°C 1 µA
or VI(EN) = 0 V
Reverse leakage current VI(OUTx) = 5.5 V, IN = ground (3) TJ = 25°C 0 µA
SUPPLY CURRENT (TPS2062, TPS2066)

No load on OUT, VI(/ENx) = 5.5 V, TJ = 25°C 0.5 1

Supply current, low-level output µA
or VI(ENx) = 0 V -40°C ≤ TJ ≤ 125°C 0.5 5

No load on OUT, VI(/ENx) = 0 V, TJ = 25°C 50 70

Supply current, high-level output µA
or VI(ENx) = 5.5 V -40°C ≤ TJ ≤ 125°C 50 90
OUT connected to ground, VI(/ENx) = 5.5 V,
Leakage current -40°C ≤ TJ ≤ 125°C 1 µA
or VI(ENx) = 0 V
Reverse leakage current VI(OUTx) = 5.5 V, IN = ground (3) TJ = 25°C 0.2 µA
SUPPLY CURRENT (TPS2063, TPS2067)
TJ = 25°C 0.5 2
Supply current, low-level output No load on OUT, VI(/ENx) = 0 V µA
-40°C ≤ TJ ≤ 125°C 0.5 10
TJ = 25°C 65 90
Supply current, high-level output No load on OUT, VI(/ENx) = 5.5 V µA
-40°C ≤ TJ ≤ 125°C 65 110
OUT connected to ground, VI(/ENx) = 5.5 V,
Leakage current -40°C ≤ TJ ≤ 125°C 1 µA
or VI(ENx) = 0 V
Reverse leakage current VI(OUTx) = 5.5 V, INx = ground (3) TJ = 25°C 0.2 µA
UNDERVOLTAGE LOCKOUT
Low-level input voltage, IN 2 2.5 V
Hysteresis, IN TJ = 25°C 75 mV
OVERCURRENT OC1 and OC2
Output low voltage, VOL(OCx) IO(/OCx) = 5 mA 0.4 V
Off-state current (3) VO(/OCx) = 5 V or 3.3 V 1 µA
OC deglitch (3) OCx assertion or deassertion 4 8 15 ms
THERMAL SHUTDOWN (4)
Thermal shutdown threshold (3) 135 °C
Recovery from thermal shutdown (3) 125 °C
Hysteresis (3) 10 °C

(3) Not tested in production, specified by design.

(4) The thermal shutdown only reacts under overcurrent conditions.

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 TPS2061, TPS2062, TPS2063
www.ti.com
TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

DEVICE INFORMATION

Terminal Functions (TPS2061 and TPS2065)

TERMINAL
I/O DESCRIPTION
NAME TPS2061 TPS2065
EN 4 - I Enable input, logic low turns on power switch
EN - 4 I Enable input, logic high turns on power switch
GND 1 1 Ground
IN 2, 3 2,3 I Input voltage
OC 5 5 O Overcurrent, open-drain output, active-low
OUT 6, 7, 8 6, 7, 8 O Power-switch output

Functional Block Diagram

(See Note A)
IN CS OUT

Charge
Pump

Current
EN Driver
Limit
(See Note B)
OC
UVLO

Thermal Deglitch
GND Sense

Note A: Current sense

Note B: Active low (EN) for TPS2061. Active high (EN) for TPS2065.

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TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

Terminal Functions (TPS2062 and TPS2066)

TERMINAL
I/O DESCRIPTION
NAME NO.
TPS2062 TPS2066
EN1 3 - I Enable input, logic low turns on power switch IN-OUT1
EN2 4 - I Enable input, logic low turns on power switch IN-OUT2
EN1 - 3 I Enable input, logic high turns on power switch IN-OUT1
EN2 - 4 I Enable input, logic high turns on power switch IN-OUT2
GND 1 1 Ground
IN 2 2 I Input voltage
OC1 8 8 O Overcurrent, open-drain output, active low, IN-OUT1
OC2 5 5 O Overcurrent, open-drain output, active low, IN-OUT2
OUT1 7 7 O Power-switch output, IN-OUT1
OUT2 6 6 O Power-switch output, IN-OUT2

Functional Block Diagram

OC1

GND Thermal
Deglitch
Sense

EN1
(See Note B)
Current
Driver
Limit

Charge
Pump
(See Note A)
CS OUT1
UVLO

(See Note A)
IN CS OUT2

Charge
Pump

Current
Driver
Limit
OC2
EN2
(See Note B)
Thermal Deglitch
Sense
Note A: Current sense
Note B: Active low (ENx) for TPS2062. Active high (ENx) for TPS2066.

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www.ti.com
TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

Terminal Functions (TPS2063 and TPS2067)

TERMINAL
I/O DESCRIPTION
NAME TPS2063 TPS2067
EN1 3 -- I Enable input, logic low turns on power switch IN1-OUT1
EN2 4 -- I Enable input, logic low turns on power switch IN1-OUT2
EN3 7 -- I Enable input, logic low turns on power switch IN2-OUT3
EN1 -- 3 I Enable input, logic high turns on power switch IN1-OUT1
EN2 -- 4 I Enable input, logic high turns on power switch IN1-OUT2
EN3 -- 7 I Enable input, logic high turns on power switch IN2-OUT3
GND 1, 5 1, 5 Ground
IN1 2 2 I Input voltage for OUT1 and OUT2
IN2 6 6 I Input voltage for OUT3
NC 8, 9, 10 8, 9, 10 No connection
OC1 16 16 O Overcurrent, open-drain output, active low, IN1-OUT1
OC2 13 13 O Overcurrent, open-drain output, active low, IN1-OUT2
OC3 12 12 O Overcurrent, open-drain output, active low, IN2-OUT3
OUT1 15 15 O Power-switch output, IN1-OUT1
OUT2 14 14 O Power-switch output, IN1-OUT2
OUT3 11 11 O Power-switch output, IN2-OUT3

7
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

Functional Block Diagram

OC1
Thermal
GND Sense Deglitch

EN1
(See Note B)
Current
Driver
Limit

(See Note A)
CS OUT1
UVLO

(See Note A)
IN1 CS OUT2

Current
Driver
Limit
OC2
EN2
(See Note B) Thermal
Deglitch
Sense
VCC Charge
Selector Pump

(See Note A)
IN2 CS OUT3

Current
EN3 Driver
Limit
(See Note B) OC3
UVLO

Thermal Deglitch
GND Sense

Note A: Current sense

Note B: Active low (ENx) for TPS2063; Active high (ENx) for TPS2067

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 TPS2061, TPS2062, TPS2063
www.ti.com
TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

PARAMETER MEASUREMENT INFORMATION

OUT

tr tf
RL CL
VO(OUT) 90% 90%
10% 10%
TEST CIRCUIT

VI(EN) 50% 50% VI(EN) 50% 50%

ton toff ton toff

VO(OUT) 90% VO(OUT) 90%

10% 10%

VOLTAGE WAVEFORMS

Figure 1. Test Circuit and Voltage Waveforms

RL = 5
,
VI(EN) CL = 1 F VI(EN)
5 V/div TA = 25
C 5 V/div

VO(OUT) RL = 5
,
2 V/div CL = 1 F
VO(OUT) TA = 25
C
2 V/div

t − Time − 500 s/div

t − Time − 500 s/div

Figure 2. Turnon Delay and Rise Time With 1-µF Load Figure 3. Turnoff Delay and Fall Time With 1-µF Load

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TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

PARAMETER MEASUREMENT INFORMATION (continued)

RL = 5
,
CL = 100 F VI(EN)
VI(EN) TA = 25
C 5 V/div
5 V/div

RL = 5
,
VO(OUT) CL = 100 F
2 V/div TA = 25
C
VO(OUT)
2 V/div

t − Time − 500 s/div t − Time − 500 s/div

Figure 4. Turnon Delay and Rise Time With 100-µF Load Figure 5. Turnoff Delay and Fall Time With 100-µF Load

VIN = 5 V
RL = 5
,
VI(EN) VI(EN) TA = 25
C
5 V/div 5 V/div

220 F
470 F

IO(OUT) IO(OUT)
500 mA/div 100 F
500 mA/div

t − Time − 500
s/div t − Time − 1 ms/div

Figure 6. Short-Circuit Current, Figure 7. Inrush Current With Different
Device Enabled Into Short Load Capacitance

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www.ti.com
TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

PARAMETER MEASUREMENT INFORMATION (continued)

VO(OC) VO(OC)
2 V/div 2 V/div

IO(OUT) IO(OUT)
1 A/div 1 A/div

t − Time − 2 ms/div t − Time − 2 ms/div

Figure 8. 2-Ω Load Connected to Enabled Device Figure 9. 1-Ω Load Connected to Enabled Device

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TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

TYPICAL CHARACTERISTICS

TURNON TIME TURNOFF TIME

vs vs
INPUT VOLTAGE INPUT VOLTAGE
1.0 2
CL = 100 F, CL = 100 F,
0.9 RL = 5
, RL = 5
,
TA = 25
C TA = 25
C
0.8 1.9

0.7
Turnon Time − ms

Turnoff Time − mS
0.6 1.8

0.5

0.4 1.7

0.3

0.2
1.6
0.1

0 1.5
2 3 4 5 6 2 3 4 5 6
VI − Input Voltage − V VI − Input Voltage − V

Figure 10. Figure 11.

RISE TIME FALL TIME

vs vs
INPUT VOLTAGE INPUT VOLTAGE
0.6 0.25
CL = 1 F, CL = 1 F,
RL = 5
, RL = 5
,
0.5 TA = 25
C TA = 25
C
0.2

0.4
Rise Time − ms

Fall Time − ms

0.15

0.3

0.1
0.2

0.05
0.1

0 0
2 3 4 5 6 2 3 4 5 6
VI − Input Voltage − V VI − Input Voltage − V

Figure 12. Figure 13.

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TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

TYPICAL CHARACTERISTICS (continued)

TPS2061, TPS2065 TPS2062, TPS2066

SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT ENABLED
vs vs
JUNCTION TEMPERATURE JUNCTION TEMPERATURE
60 70
I I (IN) − Supply Current, Output Enabled − µ A

I I (IN) − Supply Current, Output Enabled − µ A

VI = 5.5 V VI = 5.5 V
50 60
VI = 5 V
50
40 VI = 5 V
VI = 3.3 V
40
30
30
VI = 2.7 V VI = 2.7 V
20
VI = 3.3 V 20

10
10

0 0
−50 0 50 100 150 −50 0 50 100 150
TJ − Junction Temperature −
C TJ − Junction Temperature −
C

Figure 14. Figure 15.

TPS2063, TPS2067 TPS2061, TPS2065

SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT DISABLED
vs vs
JUNCTION TEMPERATURE JUNCTION TEMPERATURE
90 0.5
I I (IN) − Supply Current, Output Enabled − µ A

I I (IN) − Supply Current, Output Disabled − µ A

0.45 VI = 5.5 V
80 VI = 5.5 V
0.4 VI = 5 V
70

VI = 5 V 0.35
60
VI = 3.3 V
0.3 VI = 3.3 V
50 VI = 2.7 V
0.25
40
VI = 2.7 V 0.2
30
0.15
20
0.1
10 0.05
0 0
−50 0 50 100 150 −50 0 50 100 150
TJ − Junction Temperature −
C
TJ − Junction Temperature −
C

Figure 16. Figure 17.

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TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

TYPICAL CHARACTERISTICS (continued)

TPS2062, TPS2066 TPS2063, TPS2067

SUPPLY CURRENT, OUTPUT DISABLED SUPPLY CURRENT, OUTPUT DISABLED
vs vs
JUNCTION TEMPERATURE JUNCTION TEMPERATURE
0.5 0.5
I I (IN) − Supply Current, Output Disabled − µ A

I I (IN) − Supply Current, Output Disabled − µ A

VI = 5.5 V
0.45 VI = 5.5 V 0.45
VI = 5 V VI = 5 V
0.4 0.4

0.35 0.35

0.3 VI = 3.3 V 0.3 VI = 3.3 V

VI = 2.7 V
VI = 2.7 V
0.25 0.25

0.2 0.2

0.15 0.15

0.1 0.1

0.05 0.05

0 0
−50 0 50 100 150 −50 0 50 100 150
TJ − Junction Temperature −
C TJ − Junction Temperature −
C

Figure 18. Figure 19.

STATIC DRAIN-SOURCE ON-STATE RESISTANCE SHORT-CIRCUIT OUTPUT CURRENT

vs vs
JUNCTION TEMPERATURE JUNCTION TEMPERATURE
120 1.56
IO = 0.5 A VI = 2.7 V
1.54
Out1 = 5 V
I OS − Short-Circuit Output Current − A

100 1.52
VI = 3.3 V
On-State Resistance − mΩ
r DS(on) − Static Drain-Source

1.5
Out1 = 3.3 V
80
Out1 = 2.7 V 1.48

1.46
60
1.44 VI = 5 V
1.42
40
1.4 VI = 5.5 V

20 1.38

1.36

0 1.34
−50 0 50 100 150 −50 0 50 100 150
TJ − Junction Temperature −
C TJ − Junction Temperature −
C

Figure 20. Figure 21.

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TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

TYPICAL CHARACTERISTICS (continued)

THRESHOLD TRIP CURRENT UNDERVOLTAGE LOCKOUT

vs vs
INPUT VOLTAGE JUNCTION TEMPERATURE
2.5 2.3
TA = 25
C UVLO Rising
Load Ramp = 1A/10 ms

UVOL − Undervoltage Lockout − V

2.3 2.26
Threshold Trip Current − A

2.1 2.22 UVLO Falling

1.9 2.18

1.7 2.14

2.1
1.5
−50 0 50 100 150
2.5 3 3.5 4 4.5 5 5.5 6
TJ − Junction Temperature −
C
VI − Input Voltage − V

Figure 22. Figure 23.

CURRENT-LIMIT RESPONSE
vs
PEAK CURRENT
200
VI = 5 V,
TA = 25
C
Current-Limit Response − µ s

150

100

50

0
0 2.5 5 7.5 10 12.5
Peak Current − A
Figure 24.

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TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

APPLICATION INFORMATION

POWER-SUPPLY CONSIDERATIONS
TPS2062
Power Supply 2
IN
2.7 V to 5.5 V 7
OUT1 Load
0.1 µF
0.1 µF 22 µF

8
OC1
3 6
EN1 OUT2 Load
5
OC2 0.1 µF 22 µF
4
EN2
GND
1

Figure 25. Typical Application

A 0.01-µF to 0.1-µF ceramic bypass capacitor between IN and GND, close to the device, is recommended.
Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.
This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing the
output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit transients.

OVERCURRENT
A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do not
increase the series resistance of the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only
if the fault is present long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before VI(IN) has been applied (see Figure 15). The TPS206x senses the short and
immediately switches into a constant-current output.
In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload
occurs, high currents may flow for a short period of time before the current-limit circuit can react. After the
current-limit circuit has tripped (reached the overcurrent trip threshold), the device switches into constant-current
mode.
In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 18). The TPS206x is capable of delivering current up to the current-limit threshold without
damaging the device. Once the threshold has been reached, the device switches into its constant-current mode.

OC RESPONSE
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature shutdown condition
is encountered after a 10-ms deglitch timeout. The output remains asserted until the overcurrent or
overtemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause a
momentary overcurrent condition; however, no false reporting on OCx occurs due to the 10-ms deglitch circuit.
The TPS206x is designed to eliminate false overcurrent reporting. The internal overcurrent deglitch eliminates
the need for external components to remove unwanted pulses. OCx is not deglitched when the switch is turned
off due to an overtemperature shutdown.

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www.ti.com
TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

APPLICATION INFORMATION (continued)

V+

Rpullup
TPS2062

GND OC1
IN OUT1
EN1 OUT2
EN2 OC2

Figure 26. Typical Circuit for the OC Pin

POWER DISSIPATION AND JUNCTION TEMPERATURE

The low on-resistance on the N-channel MOSFET allows the small surface-mount packages to pass large
currents. The thermal resistances of these packages are high compared to those of power packages; it is good
design practice to check power dissipation and junction temperature. Begin by determining the rDS(on) of the
N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the
highest operating ambient temperature of interest and read rDS(on) from Figure 20. Using this value, the power
dissipation per switch can be calculated by:
• PD = rDS(on)× I2
Multiply this number by the number of switches being used. This step renders the total power dissipation from
the N-channel MOSFETs.
Finally, calculate the junction temperature:
• TJ = PD x RΘJA + TA
Where:
• TA= Ambient temperature °C
• RΘJA = Thermal resistance
• PD = Total power dissipation based on number of switches being used.
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.

THERMAL PROTECTION
Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for
extended periods of time. The TPS206x implements a thermal sensing to monitor the operating junction
temperature of the power distribution switch. In an overcurrent or short-circuit condition, the junction temperature
rises due to excessive power dissipation. Once the die temperature rises to approximately 140°C due to
overcurrent conditions, the internal thermal sense circuitry turns the power switch off, thus preventing the power
switch from damage. Hysteresis is built into the thermal sense circuit, and after the device has cooled
approximately 10°C, the switch turns back on. The switch continues to cycle in this manner until the load fault or
input power is removed. The OCx open-drain output is asserted (active low) when an overtemperature shutdown
or overcurrent occurs.

UNDERVOLTAGE LOCKOUT (UVLO)

An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input
voltage falls below approximately 2 V, the power switch is quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The
UVLO also keeps the switch from being turned on until the power supply has reached at least 2 V, even if the
switch is enabled. On reinsertion, the power switch is turned on, with a controlled rise time to reduce EMI and
voltage overshoots.

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TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

APPLICATION INFORMATION (continued)

UNIVERSAL SERIAL BUS (USB) APPLICATIONS
The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for
low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB
interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply.
The USB specification defines the following five classes of devices, each differentiated by power-consumption
requirements:
• Hosts/self-powered hubs (SPH)
• Bus-powered hubs (BPH)
• Low-power, bus-powered functions
• High-power, bus-powered functions
• Self-powered functions
SPHs and BPHs distribute data and power to downstream functions. The TPS206x has higher current capability
than required by one USB port; so, it can be used on the host side and supplies power to multiple downstream
ports or functions.

HOST/SELF-POWERED AND BUS-POWERED HUBS

Hosts and SPHs have a local power supply that powers the embedded functions and the downstream ports (see
Figure 27). This power supply must provide from 5.25 V to 4.75 V to the board side of the downstream
connection under full-load and no-load conditions. Hosts and SPHs are required to have current-limit protection
and must report overcurrent conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers,
and stand-alone hubs.

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www.ti.com
TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

APPLICATION INFORMATION (continued)

Downstream
USB Ports

D+

D−
VBUS
0.1 µF 33 µF GND
Power Supply

3.3 V 5V TPS2062 D+
2
IN D−
7
OUT1 VBUS
0.1 µF 0.1 µF 33 µF GND

8
OC1
3
USB EN1
5
Controller OC2 D+
4
EN2 D−
6
OUT2 VBUS
0.1 µF 33 µF GND
GND
1
D+

D−
VBUS
0.1 µF 33 µF GND

Figure 27. Typical Four-Port USB Host / Self-Powered Hub

BPHs obtain all power from upstream ports and often contain an embedded function. The hubs are required to
power up with less than one unit load. The BPH usually has one embedded function, and power is always
available to the controller of the hub. If the embedded function and hub require more than 100 mA on power up,
the power to the embedded function may need to be kept off until enumeration is completed. This can be
accomplished by removing power or by shutting off the clock to the embedded function. Power switching the
embedded function is not necessary if the aggregate power draw for the function and controller is less than one
unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the
embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.

LOW-POWER BUS-POWERED AND HIGH-POWER BUS-POWERED FUNCTIONS

Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and can
draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ω
and 10 µF at power up, the device must implement inrush current limiting (see Figure 28). With TPS206x, the
internal functions could draw more than 500 mA, which fits the needs of some applications such as motor driving
circuits.

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TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

APPLICATION INFORMATION (continued)

Power Supply
D+ 3.3 V
TPS2062
D−
2
VBUS IN
10 µF 0.1 µF 7
OUT1 Internal
GND
0.1 µF 10 µF Function

8
OC1
3
USB EN1
Control 5
OC2
4 6
EN2 OUT2 Internal
GND 0.1 µF 10 µF Function
1

Figure 28. High-Power Bus-Powered Function

USB POWER-DISTRIBUTION REQUIREMENTS

USB can be implemented in several ways, and, regardless of the type of USB device being developed, several
power-distribution features must be implemented.
• Hosts/SPHs must:
– Current-limit downstream ports
– Report overcurrent conditions on USB VBUS
• BPHs must:
– Enable/disable power to downstream ports
– Power up at <100 mA
– Limit inrush current (<44 Ω and 10 µF)
• Functions must:
– Limit inrush currents
– Power up at <100 mA
The feature set of the TPS206x allows them to meet each of these requirements. The integrated current-limiting
and overcurrent reporting is required by hosts and self-powered hubs. The logic-level enable and controlled rise
times meet the need of both input and output ports on bus-powered hubs, as well as the input ports for
bus-powered functions (see Figure 29).

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www.ti.com
TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

APPLICATION INFORMATION (continued)

TUSB2040
Hub Controller

SN75240 BUSPWR Tie to TPS2041 EN Input

Upstream A C Downstream
Port GANGED Ports
B D
DP0 DP1 D+
D+
DM0 DM1 D−
D− Ferrite Beads
A C
GND
GND B D
SN75240
DP2 5V
TPS2041B
DM2
OC EN 5-V Power 33 µF†
Supply DP3
5V IN OUT DM3
D+
A C
1 µF B D D−
TPS76333 Ferrite Beads
SN75240 GND
IN DP4
0.1 µF DM4
3.3 V VCC 5V
4.7 µF 4.7 µF TPS2062
GND
GND PWRON1 EN1 OUT1 33 µF†
OVRCUR1 OC1 OUT2
48-MHz PWRON2 EN2
XTAL1
Crystal D+
OVRCUR2 OC2 IN
D−
0.1 µF Ferrite Beads
Tuning GND
XTAL2
Circuit
5V
OCSOFF

33 µF†
GND

D+
D−
Ferrite Beads
GND

5V

33 µF†
† USB rev 1.1 requires 120 µF per hub.

Figure 29. Hybrid Self / Bus-Powered Hub Implementation

GENERIC HOT-PLUG APPLICATIONS

In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.
These are considered hot-plug applications. Such implementations require the control of current surges seen by
the main power supply and the card being inserted. The most effective way to control these surges is to limit and
slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply
normally turns on. Due to the controlled rise times and fall times of the TPS206x, these devices can be used to
provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the TPS206x
also ensures that the switch is off after the card has been removed, and that the switch is off during the next
insertion. The UVLO feature insures a soft start with a controlled rise time for every insertion of the card or
module.

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TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067 www.ti.com
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

APPLICATION INFORMATION (continued)

PC Board

Power TPS2062
Supply GND OC1 Block of
Circuitry
2.7 V to 5.5 V IN OUT1
1000 µF 0.1 µF EN1 OUT2
Optimum EN2 OC2
Block of
Circuitry
Overcurrent Response

Figure 30. Typical Hot-Plug Implementation

By placing the TPS206x between the VCC input and the rest of the circuitry, the input power reaches these
devices first after insertion. The typical rise time of the switch is approximately 1 ms, providing a slow voltage
ramp at the output of the device. This implementation controls system surge currents and provides a
hot-plugging mechanism for any device.

DETAILED DESCRIPTION

Power Switch
The power switch is an N-channel MOSFET with a low on-state resistance. Configured as a high-side switch, the
power switch prevents current flow from OUT to IN and IN to OUT when disabled. The power switch supplies a
minimum current of 1 A.

Charge Pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
little supply current.

Driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall
times of the output voltage.

Enable (ENx or ENx)

The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce
the supply current. The supply current is reduced to less than 1 µA when a logic high is present on ENx, or when
a logic low is present on ENx. A logic zero input on ENx, or a logic high input on ENx restores bias to the drive
and control circuits and turns the switch on. The enable input is compatible with both TTL and CMOS logic
levels.

Overcurrent (OCx)
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output remains asserted until the overcurrent or overtemperature condition is removed. A
10-ms deglitch circuit prevents the OCx signal from oscillation or false triggering. If an overtemperature shutdown
occurs, the OCx is asserted instantaneously.

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TPS2065, TPS2066, TPS2067
SLVS490B – DECEMBER 2003 – REVISED DECEMBER 2004

DETAILED DESCRIPTION (continued)

Current Sense
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its
saturation region, which switches the output into a constant-current mode and holds the current constant while
varying the voltage on the load.

Thermal Sense
The TPS206x implements a thermal sensing to monitor the operating temperature of the power distribution
switch. In an overcurrent or short-circuit condition the junction temperature rises. When the die temperature rises
to approximately 140°C due to overcurrent conditions, the internal thermal sense circuitry turns off the switch,
thus preventing the device from damage. Hysteresis is built into the thermal sense, and after the device has
cooled approximately 10 degrees, the switch turns back on. The switch continues to cycle off and on until the
fault is removed. The open-drain false reporting output (OCx) is asserted (active low) when an overtemperature
shutdown or overcurrent occurs.

Undervoltage Lockout
A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control
signal turns off the power switch.

23
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