Microprocessor and Microcomputer

Topic:
Introduction, Features of Micro Computer

Session No: 1
 Computer

• Definitions : computer is general purpose

electronic device that processes data, performs
calculations, and executes tasks based on
instructions.
• It consists of hardware (physical components)
and software (programs) and is used for storing,
retrieving, and processing information.
• microprocessor as CPU along with memory, I/O
devices, etc.
• A microcomputer is a small, personal computer
with a microprocessor as its central processing
unit (CPU), designed for individual use.
• Examples include desktops, laptops, and tablets.
 Computer system architecture

¾ Central Processing Unit (CPU)

¾ Memory
¾ Input / Output Ports
¾ Operating System (OS)
Features are :
¾ Multimedia
¾ Expandability and Upgradeability
 Microcomputer – I/O Devices

¾ The input/output or I/O Section

allows the computer to take in data
from the outside world or send data
to the outside world.
¾ Peripherals such as keyboards,
video display terminals, printers are
connected to I/O Port.
 Central Processing Unit

Central Processing Unit (CPU)

A microprocessor is a compact, integrated circuit (IC) that serves as the central
processing unit (CPU) of a computer, performing arithmetic, logic, control, and
input/output operations.
¾ CPU, which is a microprocessor, is considered as the brain of the computer.
¾ CPU performs all types of data processing operations, controls the working of all
parts of the computer.
¾ It stores data, intermediate results, and instructions (program).
¾ It fetches binary coded instructions from memory, decodes the instructions into a
series of simple actions and carries out these actions in a sequence of steps.
Components of CPU
 Microprocessor

¾ What is a Microprocessor ?

Microprocessor can be used in applications where task is not predefined and is assigned by the
user.

Ex: Intel i3, i5, i7, core 2 duo etc.

Applications: Computers, Mobiles, Videogames, Communication, Automobiles etc.

 Generations of Microprocessor
Name of the Processor Year of Invention (technology node) No. of Instructions per second
transistors
INTEL 4004/4040 (4 bit ) 1971 by Ted Hoff and Stanley Mazor (100000) 2300 60,000

50,000, 10 times faster than

8008 (8 bit )/8080 (8 bit) 1972/1974 (6000) 3500/6000 8008

8085 (8 bit ) 1976 (16-bit address bus) (3000) 6500 769230

1978 (multiply and divide instruction, 16-bit data

8086 (16 bit ) 29000 2.5 Million
bus and 20-bit address bus) (3000)

1979 (cheaper version of 8086 and 8-bit external 29000 2.5 Million
8088 (16 bit )
bus) (3000)

80186/80188/80286 (16 bit ) 1982 (1500) 134000 4 Million

PENTIUM (32 bit ) 1993 (800) 3.1 Million 100 million

291
2006 (other versions core2 duo, core2 quad,
INTEL core 2, i3, i5, i7 Million/1.7 2.4 billion/38 billion
core2 extreme). / 2007, 2009, 2010 (65-45)
Trillion
 Microcontroller

¾ Microcontroller : Designed for specific task,

• once program is written it can’t be altered.
• Microprocessor with RAM, ROM and IO Ports available on a
single chip.
• A microcontroller is a small computer on a single integrated
circuit that is designed to control specific tasks within
electronic systems. It combines the functions of a central
processing unit (CPU), memory, and input/output interfaces,
all on a single chip.Ex:
chip. Arduino, ARM, AT Mega328, 8051 etc.
Applications: Microwave oven, washing machines.
 Microprocessor Vs Microcontroller

Microprocessor Microcontroller

The microprocessor is designed to be general-purpose. A microcontroller is a specialized form of a microprocessor.

It is a processor in which memory and I/O output It is a controlling device in which memory and I/O output
component is connected externally, looks large in size. component is present internally, looks small in size.

It is a dependent unit. It is self-sufficient.

It is used in personal computers. It is used in Embedded systems.

It’s system cost is high. It’s system cost is low.

Microprocessor has less number of registers. Therefore Microcontroller has more number of registers. Therefore a
most of the operations are memory based. program is easier to write.
 Arithmetic Logic Unit (ALU)

Performs Arithmetic Operations: The Arithmetic Logic Unit (ALU) in a CPU is responsible for
executing all the arithmetic operations, such as addition, subtraction, multiplication, and
division, essential for processing data and executing instructions.

Handles Logical Operations: Beyond arithmetic, the ALU performs logical operations including
AND, OR, NOT, and XOR, which are crucial for decision-making processes, comparisons, and
conditional executions in programming and computer operations.
 Memory @ CPU

¾ Registers: These are tiny, very fast memory locations that hold a minimal amount of data
currently being used by the CPU
CPU. Think of them as the CPU's notepad for immediate
calculations.
¾ Cache: This is a small but faster memory compared to main RAM. It stores frequently
accessed data and instructions from main memory, allowing the CPU to retrieve them
quicker.
¾ Control Unit Interaction: The control unit relies on registers to store operands (data) and
instructions during processing.
¾ Limited Capacity: Compared to main memory, CPU memory (registers and cache) is much
smaller in size. This prioritizes speed over massive storage.
 How data is stored in memory?

¾ Memory is usually measured by the number of bytes S.No Unit & Description

it can hold. It is measured in Kilo, Mega ,Giga and Kilobyte (KB)

1
1 KB = 1024 Bytes
Tera.
Megabyte (MB)
2
¾ A Kilo in computer language is 210 = 1024. 1 MB = 1024 KB
Gigabyte (GB)
3
1 GB = 1024 MB
Terabyte (TB)
4
1 TB = 1024 GB
Petabyte (PB)
5 1 PB = 1024 TB
Microcomputer - Buses
 Microcomputer - Buses

¾ Address bus - carries memory addresses from the processor to other components such as
primary storage and input/output devices.
¾ Data bus - carries the data between the processor and other components.
¾ Control bus - carries control signals from the processor to other components.
Opcodes and Operands
Possible opcodes/instructions in 8085up
Register Set
 General Registers
• The 8085 has six general-purpose registers to store 8-bit data; these are
identified as B, C, D, E, H, and L
• They can be combined as register pairs - BC, DE, and HL - to perform some
16-bit operations
• The programmer can use these registers to store or copy data into the
registers by using data copy instructions
• The HL register pair is also used to address memory locations
• In other words, HL register pair plays the role of memory address register
Accumulator & Pointers

• The accumulator is an 8-bit register that is a part of

arithmetic/logic unit (ALU)
• Program Counter - Deals with sequencing the
execution of instructions. Acts as a memory
pointer
• Stack Pointer – Points to a memory location in R/W
memory, called the stack
 Instruction Register/Decoder

• The instruction register and the decoder are considered as a part of

the ALU
• The instruction register is a temporary storage for the current
instruction of a program
• The decoder decodes the instruction and establishes the sequence
of events to follow
 Flags

• The ALU includes five flip-flops, which are set or reset after an
operation according to data conditions of the result in the
accumulator and other registers
• They are called Zero (Z), Carry (CY), Sign (S), Parity (P), and
Auxiliary Carry (AC) flags
 Flags

• If the sum in the accumulator is larger than eight bits, the flip-flop
uses to indicate a carry -- called the Carry flag (CY) – is set to one
• When an arithmetic operation results in zero, the flip-flop called
the Zero (Z) flag is set to one
 Flags

• These flags have critical importance in the decision-making process of

the microprocessor
• The conditions (set or reset) of the flags are tested through the software
instructions
• The thorough understanding of flag is essential in writing assembly
language programs
• The combination of the flag register and the accumulator is called
Program Status Word (PSW) and PSW is the 16-bit unit for stack
operation
Flags
 Address & Data Bus

• Address Bus
• The 8085 has eight signal lines, A15-A8, which are
unidirectional and used as the high order address
bus
• Time Multiplexed Address/Data Bus
• The signal lines AD7-AD0 are bidirectional
• They serve a dual purpose
 Address & Data Bus

• They are used as the low-order address bus as well as

the data bus
• In executing an instruction, during the earlier part of
the cycle, these lines are used as the low-order
address bus as well as the data bus
• During the later part of the cycle, these lines are used
as the data bus
• However the low order address bus can be separated
from these signals by using a latch
 Pin Diagram of 8085
Pin1-2
Clock Pins- X1, X2, CLK(OUT)
X1, X2- These are clock input pins. A crystal is
connected between these pins such that
fcrystal= 2f8085 where fcrystal= crystal frequency &
f8085 = operating
t frequency of 8085
Pin 3
Indicates processor is being reset (can reset
8085 peripherals). It is triggered by pin 36.
•When the RESET IN (Pin 36) is asserted (low), the
8085 goes into a reset state.
•In response, the 8085 sets RESET OUT high for a
fixed time (~3 clock cycles), which can be used to
reset external devices.

Pin 4-5
Provides Serial Output Data and Serial Input Data
 Pin Diagram of 8085
Pin 6-11
An interrupt
p is a signal
g that pauses
p the current
program
p g execution and directs the pprocessor
to
o execute a specific
p subroutine (called an
In
nterrupt Service Routine (ISR)). After the ISR,
Interrupt
the processor resumes the previous task.
Interrupts are of two types:Maskable – can be
enabled/disabled by software.Non-maskable –
8085 cannot be ignored.
TRAP (Non-maskable Interrupt), Vectored, Highest Priority
RST 7.5 (Maskable, Vectored Interrupt), Highest Priority
among Maskable Interrupt
RST 6.5 (Maskable, Vectored Interrupt), Medium Priority
RST 5.5 (Maskable, Vectored Interrupt)
INTR (Interrupt, Maskable, Non-Vectored Request)
Interrupt Acknowledge (active low)
 Pin Diagram of 8085
Pin12-19 (AD₀–AD₇)
Multiplexed address/data bus (lower 8 bits)
Demultiplexing AD7-AD0
Pin 20 (GND)
Ground (0 V Supply)

Pin 21-28 (A8–A15)

8085
Higher order address bus
Pin 29-34
S₀ (Status Signal)
ALE (Address Latch Enable)
WR̅ (Write Control Signal)
RD̅ (Read Control Signal)
S₁ (Status Signal)
IO/M̅ (Input/Output or Memory)
 Status Signals(S1 and S0 )

• It is used to know the type of current operation of

the microprocessor.
IO/M S1 S0 OPERATION
The Output is Low 0 1 1 Opcode fetch
0 1 0 Memory read
0 0 1 Memory write
1 1 0 I/O read
The Output is High 1 0 1 I/O write
1 1 0 Interrupt acknowledge
Z 0 1 Halt
High Impedance Z x x Hold
Z x x Reset
 Pin Diagram of 8085

Pin 35 Ready
Checks if the peripheral is ready
Pin 36 RESET IN̅
Resets the microprocessor (active low)
Pin 37 CLK(OUT)
CLK(OUT) – This is an auxiliary clock output
source
8085
Pin 38 HLDA
Hold Acknowledge
Pin 39 HOLD
Request to control buses
Pin 40 Vcc
+5 V power supply
 Machine Cycles

5 Di erent Machine cycle

With each machine cycle μP transfer (read or write) one byte of data
First and fundamental machine cycle is opcode fetch [4T/6T States]
Memory Read [3T States]
Memory Write [3T States] IO/M S1 S0 OPERATION
IO Read [3T States]
IO Write [3T States] 0 1 1 Opcode fetch
0 1 0 Memory read
0 0 1 Memory write
1 1 0 I/O read
1 0 1 I/O write
Microprocessors & Microcontrollers

8085: Instructions

Department of Electronics and Communication Engineering

INSTRUCTION SET OF 8085 MICROPROCESSOR
balti(m)d
INSTRUCTION SET OF 8085 MICROPROCESSOR
INSTRUCTION SET OF 8085 MICROPROCESSOR

INSTRUCTION SET OF 8085

MICROPROCESSOR
8085 Instruction Set 46
8085 Instruction Set 47
Data Transfer Instructions

8085 Instruction Set 48

8085 Instruction Set 49
 50
8085 Instruction Set
8085 Instruction Set 51
8085 Instruction Set 52
8085 Instruction Set 53
8085 Instruction Set 54
8085 Instruction Set 55
8085 Instruction Set 56
8085 Instruction Set 57
8085 Instruction Set 58
8085 Instruction Set 59
8085 Instruction Set 60
8085 Instruction Set 61
8085 Instruction Set 62
8085 Instruction Set 63
8085 Instruction Set 64
8085 Instruction Set 65
8085 Instruction Set 66
8085 Instruction Set 67
8085 Instruction Set 68
8085 Instruction Set 69
8085 Instruction Set 70
8085 Instruction Set 71
8085 Instruction Set 72
8085 Instruction Set 73
8085 Instruction Set 74
8085 Instruction Set 75
8085 Instruction Set 76
8085 Instruction Set 77
8085 Instruction Set 78
8085 Instruction Set 79
8085 Instruction Set 80
8085 Instruction Set 81
8085 Instruction Set 82
8085 Instruction Set 83
8085 Instruction Set 84
8085 Instruction Set 85
8085 Instruction Set 86
8085 Instruction Set 87
8085 Instruction Set 88
• PSW (Program Status word)
• - Flag unaffected
• * affected
• 0 reset
• 1 set
• S Sign (Bit 7)
• Z Zero (Bit 6)
• AC Auxiliary Carry (Bit 4)
• P Parity (Bit 2)
• CY Carry (Bit 0)

8085 Instruction Set 89

8085 Instruction Set 90
8085 Instruction Set 91
8085 Instruction Set 92
8085 Instruction Set 93
8085 Instruction Set 94
8085 Instruction Set 95
8085 Instruction Set 96
8085 Instruction Set 97
8085 Instruction Set 98
8085 Instruction Set 99
8085 Instruction Set 100
8085 Instruction Set 101
8085 Instruction Set 102
8085 Instruction Set 103
8085 Instruction Set 104
8085 Instruction Set 105
8085 Instruction Set 106
8085 Instruction Set 107
„ circular Left shift

8085 Instruction Set 108

8085 Instruction Set 109
„ circular right shift

8085 Instruction Set 110

„ circular right shift

8085 Instruction Set 111

8085 Instruction Set 112
8085 Instruction Set 113
8085 Instruction Set 114
8085 Instruction Set 115
8085 Instruction Set 116
8085 Instruction Set 117
8085 Instruction Set 118
8085 Instruction Set 119
8085 Instruction Set 120
8085 Instruction Set 121
8085 Instruction Set 122
8085 Instruction Set 123
8085 Instruction Set 124
8085 Instruction Set 125
8085 Instruction Set 126
8085 Instruction Set 127
8085 Instruction Set 128
8085 Instruction Set 129
8085 Instruction Set 130
8085 Instruction Set 131
Summary
8085 Instruction Set 132
Summary – Data transfer
• MOV Move
• MVI Move Immediate
• LDA Load Accumulator Directly from Memory
• STA Store Accumulator Directly in Memory
• LHLD Load H & L Registers Directly from Memory
• SHLD Store H & L Registers Directly in Memory

8085 Instruction Set 133

Summary Data transfer
• An 'X' in the name of a data transfer instruction implies that it deals
with a register pair (16-bits);

• LXI Load Register Pair with Immediate data

• LDAX Load Accumulator from Address in Register Pair
• STAX Store Accumulator in Address in Register Pair
• XCHG Exchange H & L with D & E
• XTHL Exchange Top of Stack with H & L

8085 Instruction Set 134

Summary - Arithmetic Group
• Add, Subtract, Increment / Decrement data in registers or memory.

• ADD Add to Accumulator

• ADI Add Immediate Data to Accumulator
• ADC Add to Accumulator Using Carry Flag
• ACI Add Immediate data to Accumulator Using Carry
• SUB Subtract from Accumulator
• SUI Subtract Immediate Data from Accumulator
• SBB Subtract from Accumulator Using Borrow (Carry) Flag
• SBI Subtract Immediate from Accumulator
Using Borrow (Carry) Flag
• INR Increment Specified Byte by One
• DCR Decrement Specified Byte by One
• INX Increment Register Pair by One
• DCX Decrement Register Pair by One
• DAD Double Register Add; Add Content of Register Pair to H & L
Register Pair

8085 Instruction Set 135

Summary Logical Group
• This group performs logical (Boolean) operations on data in
registers and memory and on condition flags.
• These instructions enable you to set specific bits in the
accumulator ON or OFF.

• ANA Logical AND with Accumulator

• ANI Logical AND with Accumulator Using Immediate
Data
• ORA Logical OR with Accumulator
• OR Logical OR with Accumulator Using Immediate
Data
• XRA Exclusive Logical OR with Accumulator
• XRI Exclusive OR Using Immediate Data
8085 Instruction Set 136
• The Compare instructions compare the content of an 8-bit value with the contents of the accumulator;

• CMP Compare
• CPI Compare Using Immediate Data

• The rotate instructions shift the contents of the accumulator one bit position to the left or right:

• RLC Rotate Accumulator Left

• RRC Rotate Accumulator Right
• RAL Rotate Left Through Carry
• RAR Rotate Right Through Carry

• Complement and carry flag instructions:

• CMA Complement Accumulator

• CMC Complement Carry Flag
• STC Set Carry Flag

8085 Instruction Set 137

Summary - Branch Group
• Unconditional branching
• JMP Jump
• CALL Call
• RET Return
• Conditions
• NZ Not Zero (Z = 0)
• Z Zero (Z = 1)
• NC No Carry (C = 0)
• C Carry (C = 1)
• PO Parity Odd (P = 0)
• PE Parity Even (P = 1)
• P Plus (S = 0)
• M Minus (S = 1)
• Conditional branching

8085 Instruction Set 138

Summary - Stack
• PUSH Push Two bytes of Data onto the Stack
• POP Pop Two Bytes of Data off the Stack
• XTHL Exchange Top of Stack with H & L
• SPHL Move content of H & L to Stack Pointer

8085 Instruction Set 139

I/0 instructions
• IN Initiate Input Operation
• OUT Initiate Output Operation

8085 Instruction Set 140

 Summary -Machine Control instructions

• EI Enable Interrupt System

• DI Disable Interrupt System
• HLT Halt
• NOP No Operation

8085 Instruction Set 141

INSTRUCTION FORMAT FOR ALP

8085 Instruction Set 142

INSTRUCTION FORMAT
 Contd…

• I
 Contd…

• Intel
 Contd…

• S
 Contd…

• I
 PROGRAM

• Intel 8086 microprocessor

PROGRAM
OPCODE OF THE 8085 INSTRUCTION SET
OPCODE OF THE 8085 INSTRUCTION SET
OPCODE OF THE 8085 INSTRUCTION SET
OPCODE OF THE 8085 INSTRUCTION SET
Contd… MCQ
Contd… MCQ
Contd… MCQ
Contd… MCQ
Contd… SHORT ANSWER TYPE QUESTION ON MICROPROCESSORS
Contd… REVIEW QUESTION ON MICROPROCESSORS
Contd… REVIEW QUESTION ON MICROPROCESSORS
ADDRESSING MODE OF 8085 MICROPROCESSOR
 Immediate Addressing Mode
• In this mode, the operand
p is specified within
the instruction itself.

MVI A, 05 H Move 05 H in accumulator.

• MVI is the operation.
• 05 H is the immediate data (source).
• A is the destination.
 Register Addressing Mode
• In this mode, the operand is in general
purpose register.

MOV A, B Move the contents of register B to A.

• MOV is the operation.

• B is the source of data.
• A is the destination.
 Direct Addressing Mode
• In this mode, the address of the operand is
given in the instruction itself.
itself

LDA 2500 H Load the contents of memory

location 2500 H in accumulator.
• LDA is the operation.
• 2500 H is the address of source.
• Accumulator is the destination.
 Register Indirect Addressing Mode

• In this mode, the address of operand is

specified by a register pair.

MOV A, M Move data from memory location

specified by H-L pair to accumulator.
• MOV is the operation.
• M is the memory location specified by H-L
register pair.
• A is the destination.
 Implicit Addressing Mode
y If address of source of data as well as
address of destination of result is fixed, then
there is no need to give any operand along
with the instruction.

CMA Complement accumulator.

y CMA is the operation.

y A is the source.
y A is the destination.
Program the given problem in assembly language and make a flow chart for the same.
Flow Chart with Programming
Flow Chart with Programming
Timing Diagram

Source ref. and ack.:

https://www.youtube.com/watch?v=vkwwDwgEjYQ
Opcode fetch
Other Cycles
Source:
https://www.youtube.com/watch?v=u8pHURx3
qhM&list=PLgwJf8NK-
2e7j8wwv6XYI3k3JzsiaOlFV