Department of Electronics and Communication Engineering, MIT, MAHE, Manipal, AY 2025-26
VLSI Fabrication Technology
(Course Code: ECE 3129)
B. Tech. in Electronics Engineering (VDT)
V Semester
Lecture 11-14: Thermal oxidation of Silicon and the Si/SiO2
interface
Course Instructor
Dr. Adarsh Nigam
Course related documents will be uploaded on LMS portal
Note: The information provided in the slides are taken mainly from referred textbooks, and other resources from internet; for teaching/academic use
only.
Thermal oxidation of Silicon and the Si/SiO2 interface
Si(s) + O2(g) → SiO2(s)
1.SiO2 properties and applications.
2.Thermal oxidation basics.
3.Manufacturing methods and equipment.
4.Measurement methods.
5.Deal-grove model (linear parabolic model).
2
Properties of thermally grown SiO2
• Atomic density: 2.31022 molecules/cm3
• It is amorphous.
(For Si, it is 51022 atoms/cm3)
• Stable, reproducible and conformal SiO2 growth
• Refractive index: n=1.46
• Melting point: 1700C
• Dielectric constant: =3.9
• Density: 2.21 g/cm3 (almost the same as Si that is
• Excellent electrical insulator: resistivity > 1020 cm,
2.33 g/cm3)
energy gap Eg=8-9 eV.
• Crystalline SiO2 [Quartz] = 2.65gm/cm3
• High breakdown electric field: >107 V/cm
Conformal
growth
3
The Si/SiO2 interface
Thermal oxide
(amorphous)
Si substrate
(single crystal)
The perfect interface between Si and SiO2 is one major reason why Si is used for semiconductor devices (instead of Ge…)
4
Application of SiO2 in IC industry
STI
STI: shallow trench isolation
Very good etching selectivity between Si and SiO2 using HF
5
Diffusion mask for common dopants
SiO2 can provide a selective mask against diffusion at high temperatures.
(DSiO2 << Dsi)
Oxides used for masking are 0.5-1μm thick.
(not good for Ga)
Mask thickness (m)
Can also be used for mask against ion
implantation
Diffusion time (hr)
SiO2 masks for B and P 6
Use of oxide in MOSFET
Gate oxide, only 0.8nm thick!
As insulation material between interconnection levels and adjacent devices
LOCOS: local oxidation isolation; STI: shallow trench isolation
7
Local Oxidation of Silicon (LOCOS)
Fully recessed process attempts to minimize bird’s peak.
8
Oxide Structure
Amorphous tetrahedral network
桥联氧
Bridging oxygen 非桥联氧
Non-bridging
Basic structure of silica: a silicon atom tetrahedrally bonds
to four oxygen atoms
The structure of silicon-silicon dioxide interface: some silicon
atoms have dangling bonds.
9
Oxide Structure
Single crystal (quartz): 2.65 g/cm3
Amorphous (thermal oxide): 2.21 g/cm3
10
Thermal oxidation of Silicon and the Si/SiO2 interface
1.SiO2 properties and applications.
2.Thermal oxidation basics.
3.Manufacturing methods and equipment.
4.Measurement methods.
5.Deal-grove model (linear parabolic model).
11
Dry and wet oxidation
Dry oxidation: Si(s) + O2(g) → SiO2(s); Wet/steam oxidation: Si(s) + 2H2O(g) → SiO2(s) + 2H2(g)
• Both typically 900-1200°C, wet oxidation is about 10 faster than dry oxidation.
• Dry oxide: thin 0.05-0.5m, excellent insulator, for gate oxides; for very thin gate oxides, may add nitrogen to form
oxynitrides.
• Wet oxide: thick <2.5 m, good insulator, for field oxides or masking. Quality suffers due to the diffusion of the hydrogen gas
out of the film, which creates paths that electrons can follow.
• Room temperature Si in air creates “native oxide”: very thin 1-2nm, poor insulator, but can impede surface processing of Si.
• Volume expansion by 2.2 (=1/0.46), so SiO2 film has compressive stress.
Si wafer Xox is final oxide thickness
= 0.46
Thermal oxidation of Silicon and the Si/SiO2 interface
1. SiO2 properties and applications.
2. Thermal oxidation basics.
3. Manufacturing methods and equipment.
4. Measurement methods.
5. Deal-grove model (linear parabolic model).
13
Thermal silicon oxidation methods
A three-tube horizontal
furnace with multi-zone
temperature control
Vertical furnace
Wet oxidation using H2 and O2 is more
(not popular)
popular (cleaner) than using H2O vapor. 14
Thermal oxidation equipment
• The tubular reactor made of quartz or glass, heated by resistance.
• Oxygen or water vapor flows through the reactor and past the silicon wafers, with a typical velocity of order 1cm/s.
15
Thermal oxidation in practice
1. Clean the wafers (RCA clean, very important)
2. Put wafers in the boat
3. Load the wafers in the furnace
4. Ramp up the furnace to process temperature in N2 (prevents oxidation from occurring)
5. Stabilize
6. Process (wet or dry oxidation)
7. Anneal in N2. Again, nitrogen stops oxidation process.
8. Ramp down
1-
Thermal oxidation of Silicon and the Si/SiO2 interface
1. SiO2 properties and applications.
2. Thermal oxidation basics.
3. Manufacturing methods and equipment.
4. Measurement methods (mechanical, optical, electrical).
5. Deal-grove model (linear parabolic model).
17
Surface profilometry (Dektak): mechanical thickness measurement
Oxide etched away by HF over part of the wafer and a mechanical
stylus is dragged over the resulting step.
Stylus
Mirror image of stylus
stylus
AFM can also be used for thickness measurement.
(AFM: atomic force microscopy) 18
Thickness determination by looking the color
Relative illumination intensity
Film thickness (nm)
• Oxide thickness for constructive interference (viewed from above =0o) Xo=k/2n, n=1.46,
k=1, 2, 3…
• Our eye can tell the color difference between two films having 10nm thickness difference.
1-
Optical thickness measurement: ellipsometry
Very accurate (1nm accuracy)
Quarter
Light wave plate
source Filter Polarizer Analyzer Detector
Film being
measured
Substrate
• After quarter wave plate, the linear polarized light becomes circular polarized, which is incident on the oxide covered
wafer.
• The polarization of the reflected light, which depends on the thickness and refractive index (usually known) of the oxide
layer, is determined and used to calculate the oxide thickness.
• Multiple wavelengths/incident angles can be used to measure thickness/refractive index of each film in a multi-film stack.
20
Electrical thickness measurement: C-V of MOSFET
Small AC voltage is applied on top of the DC
voltage for capacitance measurement.
Substrate is N-type. Electron is majority carrier,
hole is minority carrier.
a. Accumulation: positive gate voltage attracts
electrons to the interface.
b. Depletion: negative gate bias pushes
electrons away from interface. No charge at
interface. Two capacitance in series.
c. Inversion: further increase (negative) gate
voltage causes holes to appear at the
interface.
21
Effect of frequency for AC capacitance measurement
At/after inversion: P-type substrate here
For low frequency, (minority) charge generation at the interface can (previous slide N-type)
follow the AC field to balance the charge at the gate, so Cinv=Cox.
For high frequency, the gate charge has to be balanced by the carrier
deep below the interface, so Cinv-1 = Cox-1 + CSi-1.
Deep depletion: for high scanning speed (the DC voltage scan fast into
large positive voltage), depletion depth Xd must increase to balance the
gate charge.
Parameter from C-V measurement:
• Dielectric constant of Si & SiO2
• Capacitor area
• Oxide thickness
• Impurity profile in Si
• Threshold voltage of MOS capacitor
22
Thermal oxidation of Silicon and the Si/SiO2 interface
1. SiO2 properties and applications.
2. Thermal oxidation basics.
3. Manufacturing methods and equipment.
4. Measurement methods (mechanical, optical, electrical).
5. Deal-grove model (linear parabolic model).
23
Bruce Deal and Andrew Grove
Time Magazine's Man of the Year (1997)
As a young researcher at Fairchild
Semiconductor, he “wrote the book”
on SiO2 growth: the Deal-Grove model.
Grove worked at Fairchild Semiconductor before becoming the fourth employee at the
nascent Intel Corporation. He became Intel's president in 1979, its CEO in 1987, and its
Chairman and CEO in 1997.
Grove is credited with having transformed Intel from a manufacturer of memory chips into
one of the world's dominant producers of microprocessors. During his tenure as CEO, Grove
oversaw a 4,500% increase in Intel's market capitalization from $4 billion to $197 billion,
making it, at the time, the world's most valuable company.
24
http://en.wikipedia.org/wiki/Andrew_Grove
Overview
Deal-Grove model: linear-parabolic model for 1D oxide growth H2O is for wet oxidation
(along z-direction) from un-patterned wafer surface. O2 for dry oxidation
It is applicable to:
• Oxidation temperature 700-1200oC
• Gas pressure at wafer surface 0.1-25 atm.
• Oxide film thickness 20-2000nm.
O gets in or Si gets out for reaction?
Considering dry oxygen molecules as the oxidant species, by radio active tracer, it has
been shown that oxidation proceeds by inward movement of O2 molecules through SiO2
to the Si − SiO2 interface where the reaction Si(solid) + O(gas) → SiO2 takes place.
This forms a contrast with the case of Copper whose oxidation proceeds by the outward
motion of the metallic ion and also with the case of anodic oxidation of silicon, where
silicon moves outward. 25
D-G model: three flux at equilibrium
F (oxidant flux): number/(cm2-s); C (oxidant concentration): number/cm3
Gas diffusion Solid state diffusion SiO2 formation
Concentration of
main gas flow
Concentration at Cs > C o
(inside) the oxide
surface. Co Cs.
F1: flux of oxidizing species transported from the gas phase to the gas-oxide interface.
F2: flux across the existing oxide toward the silicon substrate.
F3: flux reacting at the SiO2 interface (this term is not strictly flux/flow).
In steady state, the three fluxes are equal. 26
D-G model: three flux at equilibrium
F1 = hg (CG − C S )
hg is mass transfer coefficient in cm/sec.
For ideal gas, PSV=NKBT, so Cs=N/V=Ps/KT.
According to Henry’s law, the concentration of a gas species dissolved in a
solid is proportional to the partial pressure of that species at the solid
surface. So Co=HPs, where H is Henry’s constant.
(this is something similar to the law of segregation of dopant at an interface)
PS CO
F1 = hg (CG − ) = h g (C G − )
kT HkT
Define h=hg/HkT, C*=HkTCG=HPG,then
F1 = h (C * − CO )
27
D-G model: three flux at equilibrium
Using Fick’s law of diffusion, D (cm2/sec) is oxidant diffusivity in the oxide, x is oxide
thickness, then
CO − C I
F2 = D
x
The effective diffusivities of both O2 and H2O are on the same order (about 5103m2/hr
at 1100oC).
The rate of reaction should be proportional to the oxidant concentration at the Si/SiO2
interface CI, Ks interface reaction rate constant (cm/sec), then
F3 = k s C I
In steady state, the three fluxes are equal.
F1 = F2 = F3
Now we have two equations to solve two unknown CO and CI.
F1 = h(C * − CO ) CO − C I
F2 = D F3 = k s C I
x 28
Deal-Grove model: three flux at equilibrium
C* C*
CI = ( h k s )
ks ks x ks x
1+ + 1+
F1 = F2 = F3 h D D
ks x *
1 + C
D
CO = C * , since h k s
ks ks x
1+ +
h D
This means the gas absorption rate at the oxide surface is much
faster than chemistry occurring at the Si/SiO2 interface.
x
x Cg
Cg
ksx/D1
Cs
Cs corresponds to
C* oxide thickness
C* CI=C*
CI=0 50-200 nm.
SiO2 Si Figure 6-16 SiO2 Si
ksx/D << 1, reaction rate limited ksx/D >> 1, diffusion limited 29
Deal-Grove model
Assume N1 as the number of oxidant molecules incorporated per unit volume of oxide grown.
For O2 (dry) oxidation, N1=2.2×1022 cm-3; for H2O (wet) oxidation, N1=4.4×1022 cm-3 (2 that of dry, since H2O has only one
oxygen atom).
Then the oxidation rate R (F is flux, F=F1=F2=F3=KSCI, unit is number/(cm2s); unit for R is cm/s).
F dx kS C *
R= = =
N1 dt kS kS x
N1 1 + +
h D
x0 t
kS kS x
N1 1 + + dx = k S C *
dt
xi
h D 0
Let B=2DC*/N1,A=2D(1/ks+1/h), xo2 − xi2 xo − xi
B/AC*ks/N1,(h>>ks)
+ =t
B B/ A
Xi account for any oxide present at the start of the oxidation.
30
Deal-Grove model
Rewrite the above equation, xo2 xo
+ = t +
B B/ A
=
xi2 + Axi xo = A 1 + t2 + − 1
B 2 A / 4B
B =2DC*/N1—parabolic rate constant, contribution of flux F2.
B/A C*ks/N1—linear rate constant, contribution of flux F3.
Two limiting forms, when one of the two terms dominates.
For short time/thin oxide, linear. For long time/thick oxide, parabolic.
x0
t
τ
x o B (t + ) x B (t + )
2
A o 31
Determine B and B/A from experiment
➢ It is difficult to calculate B and B/A, mainly because we don’t know the KS value.
➢ The oxidation rate depends on the processes of Si-Si bond breaking, Si-O bond formation, and possibly O2 or H2O
dissociation. All of these effects and others are lumped into KS, the interaction rate constant (cm/sec).
So B and B/A is determined experimentally.
xo = B t + − A
xo2 xo
+ = t +
B B/ A xo
Assume =0?
Figure 6-17 Extraction of rate constants from oxide thickness versus time experimental data. 32
Arrhenius expression for B and B/A
D-G model is applicable for: oxidation on flat un-patterned surface, lightly doped substrates, using simple O2 or H2O ambient,
and when the oxide thickness is larger than about 20nm.
Experimentally it is found:
B=2DC*/N1D, D depends on T exponentially.
B/AC*ks/N1ks. From table below, E2 is independent of whether O2 or H2O
oxidation, as well as crystalline direction – E2 represents a fundamental
process only related to the substrate (e.g. Si-Si bond breaking).
Table: Rate constants describing (111) silicon oxidation kinetics at 1 atm total pressure.
For the corresponding values for (100) silicon, all C2 values should be divided by 1.68.
O2 bubble
through
Mostly H2O, but some O2, no longer popular
95C H2O
H2+O2 H2O only, more popular now
reacts to
form H2O
33
Arrhenius expression for B and B/A
34
Calculated dry oxidation rate from D-G model
xi=0
Figure 6-19
(100) silicon. The initial fast oxidation for the first 20nm is not included (i.e. xi, =0).
35
Calculated wet (H2O) oxidation rate from D-G model
xi=0
Figure 6-20
36
Dry vs. wet oxidation
Wet oxidation: a mixture of O2 and H2O (O2 bubble through hot water) used as oxidant.
Advantage: higher growth rate than dry oxidation.
Reason for higher rate: much larger solubility in oxide (Henry’s constant H) for H2O compared with O2.
C*(bulk concentration, =HPG) for H2O: 3x1019/cm3; and for O2: 5x1016/cm3.
Disadvantage: oxides grown wet are less dense, with a more open structure, because out-diffusion of H2 creates ‘voids’ along
its path.
Thus, wet oxidation is typically used when a thick oxide is required that will not be subjected to any significant electrical stress
that may lead to electrical breakdown.
Dry oxidation: slow, higher quality than wet oxidation, used for gate oxide.
Note that dry oxidation ‘appears’ to always have some initial oxide present (i.e. xi0).
37
Thermal oxidation example
A <100> silicon wafer has a 2000-Å oxide on its surface
(a) How long did it take to grow this oxide at 1100o C in dry oxygen?
(b) The wafer is put back in the furnace in wet oxygen at 1000o C. How long will it take to grow an additional 3000 Å of oxide?
Graphic solution
a) According to the figure, it would take 2.8hr to grow 0.2m
oxide in dry oxygen at 1100o C.
b) The total oxide thickness at the end of the oxidation would be
0.5 m which would require 1.5hr to grow if there was no
oxide on the surface to begin with. However, the wafer
“thinks” it has already been in the furnace 0.4hr (to grow the
first 200nm oxide). Thus, the additional time needed to grow
the 0.3 mm oxide is 1.5-0.4 = 1.1 hr.
38
Thin-oxide growth kinetics
39
Reisman Model
• Power law “fits the data” for all oxide thickness.
• a and b are experimentally extracted parameters.
• Physically ‐ interface reaction controlled, volume expansion
and viscous flow of SiO2 control growth.
40
Han and Helms Model
• Second parallel reaction added ‐ “fits the data” over the whole
range of oxide thicknesses.
• Three parameters (one of the A values is 0).
• Physically ‐ second process may be out diffusion of O2 and
reaction at the gas/SiO2 interface.
41
Massoud Model
Where:
• Second term added to Deal Grove model which gives a higher dx/dt during initial
growth.
• Because it is simply implemented along with Deal groove model, this model is used
in process simulators.
• Data agrees with the Reisman, Han and Hems models.
42
Thin oxide growth
43