Microprocessor & Microcontroller Architecture Comparison Table
Feature 8085 8086 Microprocessor 8051 Microcontroller
Microprocessor
Data Bus 8-bit 16-bit 8-bit
Width
Address Bus 16-bit (64 KB 20-bit (1 MB memory) 16-bit (64 KB external
Width memory) memory)
Registers 6 general purpose 8 general purpose (AX, 4 banks with 8
(B–L), Accumulator, BX, CX, DX split into registers, Accumulator
SP, PC H/L), SP, BP, SI, DI (A), B, DPTR, PSW
Memory Linear Segmented (Code, Data, Internal: 128B RAM,
Organization Stack, Extra) 4KB ROM
Clock Speed 3 MHz (typical) 5–10 MHz 12 MHz (typical)
Instruction Set 74 instructions ~117 instructions Rich instruction set
with bit/byte
operations
ALU Width 8-bit 16-bit 8-bit
I/O Addressing Separate I/O Memory-mapped I/O Memory-mapped I/O
mapped I/O using and SFRs
IN/OUT
Interrupts 5 hardware (TRAP, 256 vectored via IVT 5 (2 external, 2 timers,
RST 7.5–5.5) 1 serial)
Programming Assembly Assembly Assembly + C
Language (common)
Special Simpler design, Pipelining (BIU & EU), Built-in timers, serial
Features popular for basics efficient execution ports, parallel I/O
Application Educational, Multi-user systems, Embedded systems,
embedded control complex processing automation, IoT
Summary (MCQ Focus Points)
8085: Simple, linear memory, 8-bit → basic operations
8086: Segment-based, pipelined, used in PCs
8051: MCU with built-in memory and peripherals → used in IoT and automation
2. Interfacing Devices Comparison (8255, 8253, 8279, 8257)
Feature 8255 – PPI 8253 – PIT 8279 – 8257 – DMA
Keyboard/Display Controller
Function I/O port Timer/Counter Keyboard + 7-seg Direct
interface display interface Memory
Access
Ports/Counters 3 ports (A, B, 3 16-bit 8x8 keyboard, 4 DMA
C) counters 16-digit display channels
Modes Mode 0, 1, 2 Mode 0–5 (delay Scanned Keyboard, DMA: Burst,
(simple, gen, square Encoded keyboard, Demand,
strobed, wave, rate gen) Display Block
bidirectional)
Use Case Parallel I/O for Time delay Matrix keyboard Fast data
devices generation scanning, display transfer
refresh between
memory and
devices
Control Word Required to set Required to Required to Used to set
port modes configure configure scanning transfer
counters and display mode,
priority
Interrupt No (directly) Yes Yes (key press) Yes
Support
3. FIR vs IIR Filters
Feature FIR Filter IIR Filter
Full form Finite Impulse Infinite Impulse Response
Response
Output depends on Only input samples Input + past output
samples
Stability Always stable May be unstable
Phase Response Linear phase possible Non-linear
Memory Requirement More Less
Design Complexity Simple to design More complex
Used When High precision needed Efficiency, faster execution
4. Butterworth vs Chebyshev Filters
Feature Butterworth Chebyshev
Passband Ripple None (flat response) Ripple in passband
Transition Band Slower roll-off Steeper roll-off
Phase Linear (nearly) Non-linear
Complexity Easier design More complex
Application Audio, general Communication systems, narrowband
purpose filtering
5. PCM vs ADM (Modulation Techniques)
Feature PCM (Pulse Code Modulation) ADM (Adaptive Delta
Modulation)
Process Sampling → Quantization → Encoding Only difference between
samples is sent
Bit Rate High (each sample encoded into n bits) Low (1 bit/sample)
Complexity Higher Simpler
Bandwidth More Less
Quantization Uniform quantization error Reduced slope overload
Error error
Use Telephone, digital audio Speech coding, low
bandwidth channels
6. FDM vs TDM (Multiplexing Techniques)
Feature FDM (Frequency Division TDM (Time Division
Multiplexing) Multiplexing)
Basis Frequency Time slots
Signal Type Analog Digital
Bandwidth More (separate freq bands) Less
Crosstalk Possible Minimal
Synchronization No Yes
Needed
Use Case TV, Radio PCM systems, digital comm
7. OSI Layer vs TCP/IP Layer Comparison
OSI Layer Function TCP/IP Equivalent
Application User interface Application
Presentation Encoding, encryption Application
Session Session control Application
Transport End-to-end connection Transport (TCP/UDP)
Network Routing Internet (IP)
Data Link Framing, MAC Link
Physical Transmission medium Link
MCQ Tip: Know the exact order of OSI layers:
Please Do Not Throw Sausage Pizza Away
→ Physical, Data Link, Network, Transport, Session, Presentation, Application
8. Network Topologies Comparison
Topology Description Pros Cons
Star All nodes connected to Easy to manage Hub failure = total
central hub failure
Bus One long cable backbone Easy to install Troubleshooting is
hard
Ring Each node connects to 2 Predictable Break = full network
others performance down
Mesh Every device connected to Very reliable Expensive, complex
every other
Tree Hierarchical extension of bus Structured & Backbone failure
+ star scalable critical
1. 8085 Instruction Set – Comparison by Type & Usage
Type Instruction Syntax Function Example Use in
ALP
Data Transfer MOV MOV A, B Copy register to register Move B to A
MVI MVI A,09H Load immediate 8-bit data A = 09H
LXI LXI H, Load 16-bit data to RP HL = 2050H
2050H
LDA LDA 2500H Load accumulator from A = [2500H]
memory
STA STA 2500H Store A to memory [2500H] = A
LHLD/SHL LHLD Load HL from memory pair HL = [2500],
D 2500H [2501]
Arithmetic ADD ADD B Add register to A A=A+B
ADI ADI 02H Add immediate to A A = A + 02H
SUB SUB C Subtract from A A=A–C
INR/DCR INR A Increment/Decrement A=A+1
Logical ANA ANA B A = A AND B Bitwise AND
ORA ORA C A = A OR C Bitwise OR
XRA XRA A A = A XOR A → clears A Useful for A = 0
CMA CMA Complement A 1's complement
Branching JMP JMP 2050H Unconditional jump Go to address
JZ/JNZ JZ 2050H Jump if zero flag = 1 Conditional
branching
CALL/RET CALL Call subroutine Function call
2050H
Stack/Control PUSH/POP PUSH H Push HL on stack Save registers
NOP NOP Do nothing Time delay
HLT HLT Halt processor End program
2. 8085 Addressing Modes – Comparison
Addressing Mode Syntax Used In Explanation
Immediate MVI A, MVI, ADI Operand is part of
32H instruction
Register MOV A, B MOV, ADD, SUB Operand in registers
Direct LDA LDA, STA Address given explicitly
2050H
Indirect MOV A, M MOV, ADD Uses HL pair as pointer
Implicit CMA, RRC Logical, rotate No operand needed
3. Common ALP Instruction Logic Examples
Goal Instructions Explanation
Add two numbers MVI A, 05H MVI B, A = 5, B = 3, A = A + B = 8
03H ADD B
Transfer data from LXI H, 2050H MOV A, HL = 2050H, A = [2050H]
memory M
Store result in memory STA 3000H Memory[3000H] = A
Jump if result zero JZ 4000H If Z flag = 1 → jump
Find larger of two CMP B JC SMALL JMP Compare A and B, branch
numbers LARGE accordingly
Clear accumulator XRA A A = A XOR A = 00H
4. 8051 Instruction Format Overview
Type Instruction Description
Data Transfer MOV A, #25H Immediate
MOV A, R1 Register
MOV A, @R0 Indirect
Arithmetic ADD A, R2 A = A + R2
INC A / DEC A A=A±1
Logical ANL A, #0F0H A = A AND 0F0H
ORL A, R3 A = A OR R3
Branching SJMP LABEL Short jump
CJNE A, #05H, Compare & jump if not equal
NEXT
Bit Operations SETB P1.0 Set pin
CLR C Clear carry flag
