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EC3021E: Analog MOS Integrated Circuits: Dhanaraj K. J. Associate Professor ECED, NIT Calicut

The document discusses the analysis and design of analog MOS integrated circuits, focusing on the operation of n-channel MOSFETs in saturation and linear regions. It includes equations for drain current, transconductance, and small signal models, along with practical considerations such as channel length modulation. Additionally, it references key textbooks for further reading on the subject.
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0% found this document useful (0 votes)
24 views13 pages

EC3021E: Analog MOS Integrated Circuits: Dhanaraj K. J. Associate Professor ECED, NIT Calicut

The document discusses the analysis and design of analog MOS integrated circuits, focusing on the operation of n-channel MOSFETs in saturation and linear regions. It includes equations for drain current, transconductance, and small signal models, along with practical considerations such as channel length modulation. Additionally, it references key textbooks for further reading on the subject.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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EC3021E: Analog MOS Integrated Circuits

Dhanaraj K. J.
Associate Professor
ECED, NIT Calicut
Q. Find Vx for the following circuit if kn=200A/V2. VT=1V

kn
T1→ saturation; I D1 = (5 − Vx − 1)2
2
 Vx2 
T2→ linear; I D2 = k n  (5 − 1)Vx − 
 2 

1 Vx2
(5 − Vx − 1) = (5 − 1)Vx −
2

2 2
Vx2 − 8Vx + 8 = 0

 Vx = 1.17V

2
kn
iD = (vGS − VT )
2
In the saturation mode
2
Let an incremental voltage vgs is applied upon the dc voltage VGS,
ie vGS=VGS+vgs.
Correspondingly an incremental change (id) in
the drain current will occur upon the dc current
ID. ie iD=ID+id
df
f ( x0 + x) = f ( x0 ) + x + H .O.T . ID
dx x = x0

f (vGS ) = f (VGS + v gs )
df
= f (VGS ) + v gs + H .O.T . VGS
dvGS vGS =VGS
iD-vGS characteristic
3
f (vGS ) = f (VGS + v gs )
df
= f (VGS ) + v gs + H .O.T .
dvGS
iD (vGS ) = iD (VGS + v gs ) vGS =VGS

diD
= iD (VGS ) + v gs + H .O.T .
dvGS vGS =VGS
 I D + g m v gs
id = g m v gs

Only incremental changes in the voltages and currents are considered here.
The variables which are not varying are not considered here. In otherwords
DC signals are considered to be zero. DC has zero variation)

4
Transconductance

id = g m v gs 2I D
gm =
(VGS − VT )
diD
g m = k n (VGS − VT )=
dvGS at quiescent point g m = 2k n I D

VOV = (VGS − VT )

Small signal model

5
ID

VGS

iD-vDS characteristic iD-vGS characteristic

Small signal condition: v gs  2(VGS − VT )


6
An n-channel MOSFET in saturation region will have the drain
current equal to
 nCox W  nCox W
ID = . (VGS − VT )
2
= . (VGS − VT )2
2 L 2 L − L
C W
= n ox . (VGS − VT )2
2  L 
L1 − 
 L 
−1
 nCox W 2 L 
= . (VGS − VT ) 1 − 
2 L  L 
 nCox W
ID  . (VGS − VT )2 1 + L   L  L
2 L  L 

 nCox W L L
ID  . (VGS − VT ) (1 + VDS )
2   VDS or = VDS
2 L L L
  is called channel length modulation coefficient (V-1), an empirical
parameter.
 The above mentioned model is a simplified one and hence not very
accaurate.
 The channel length shortening L actually depends on the square
root of VDS-VDsat.
 In general  is proportional to the inverse of channel-length.
 Channel length modulation is more pronounced in short channel
MOSFETs.
 In applications where constant current is required, long channel
MOSFETs are preferred.

8
kn
iD = (vGS − VT ) (1 + vDS )
2

2
f f
f ( x0 + x, y0 + y ) = f ( x0 , y0 ) + x + y + H .O.T .
x x = x0
y = y0
y x = x0
y = y0

iD (vGS , vDS ) = iD (VGS + v gs , VDS + vds )


iD iD
 iD (VGS , VDS ) + v gs + vds
vGS vGS =VGS vDS vGS =VGS
v DS =VDS v DS =VDS

= I D + g m v gs + g o vds

id = g m v gs + g o vds

9
id = g m v gs + g o vds Small Signal
Channel
2I D conductance
gm =
(VGS − VT )
g o  I D ro basically relates to the slope of iD-vDS curve in
the saturation region. This is due to channel length
1 modulation.
ro = rds 
I D

10
 Find the small signal req for the given circuit

v − vs If ro=10k, gm=2mS,
i = g m v gs + R=10k, req=?
ro
vs = iR = −v gs  i (ro + g m ro R + R ) = v
req=220k
v − iR v
 i = − g miR +  req = = ro + g m ro R + R
ro i
11
1. Razavi B. Design of Analog CMOS Integrated Circuits, 2001. New
York, NY: McGraw-Hill. 2017;587(589):83-90
2. P. Allen & D. Holberg, CMOS Analog Circuit Design, 3rd Edition,
Oxford University Press, 2013

12
EC3021E: Analog MOS Integrated Circuits, Monsoon Semester 2025-26 13

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