Unit- II
FET –
FIELD EFFECT TRANSISTOR
BJT VS FET
TYPES OF FETS
▪ Junction field-effect transistor (JFET)
▪ Metal–oxide–semiconductor field-effect transistor (MOSFET)
▪ Metal– semiconductor field-effect transistor (MESFET)
METAL–OXIDE–SEMICONDUCTOR FIELD-
EFFECT TRANSISTOR (MOSFET)
INTRODUCTION
▪ Metal-oxide semiconductor field-effect transistor (MOSFET) is
a four terminal semiconductor device
▪ Mainly used in design of integrated circuits (ICs)
▪ Compared to BJTs, MOSFETs
▪ require very small area on the silicon IC chip
▪ Involves simpler manufacturing process
▪ Consumes low power.
▪ Its unique properties have led to the revolution of the
semiconductor industry.
CLASSIFICATION OF MOSFETS
ENHANCEMENT-TYPE MOSFET
▪ The enhancement-type MOSFET is the most widely used field-
effect transistor
▪ It is a voltage controlled device which comes with four terminals
named the gate (G), the source (S), the drain (D), and the substrate
or body (SS/B).
▪ The voltage at the gate terminal controls the current between drain
and source.
CONSTRUCTION (N-CHANNEL)
Fig.2 (a) Structure of n-Channel Enhancement MOSFET (b) side view
CONSTRUCTION
▪ The transistor is fabricated on a p-type substrate, known as body.
▪ Two heavily doped n-type regions n+ source and the n+ drain regions, are
diffused in the substrate.
▪ A thin SiO2 layer (that works as insulator) is grown on the surface of the
substrate, covering the area between the source and drain regions.
▪ Metal is deposited on top of the oxide layer to form the gate electrode of the
device. Similar metal contacts are also made to the source region, the drain
region, and the substrate
▪ The region between source and drain is known as channel region. However, in
enhancement type MOSFET channel is not physically constructed during
manufacturing.
▪ Since the gate electrode is electrically insulated from the body (by the oxide
layer), MOSFET is also known as insulated-gate FET or IGFET.
DEVICE OPERATION
Understanding MOSFET through water analogy
The flow of water is analogous to the flow of current
from drain to source. The “gate,” through an applied
signal (potential), controls the flow of water (current)
from “drain” to the “source.”
Creating a channel for current flow. A positive voltage is
applied to the gate with drain, source and body at ground
CONTINUED..
▪ With VGS =0 V and VDS >0 , there is absence of a channel, which result in a no drain current.
-This is analogous to the situation, when tap is closed (VGS=0). No matter how much is the water
in the drain, no water will come into the source.
▪ With VGS > 0 V and VDS > 0 V , Creation of channel and flow of drain current
▪ Holes are repelled & Electrons are attracted from the n+ source and drain regions to form a channel in
the substrate region near the gate
▪ The value of VGS at which a sufficient number of electrons accumulate in the channel region to form a
conducting channel is called the threshold voltage and is denoted by Vth.
▪ As VGS is increased beyond the threshold level, channel is enhanced (hence the name enhancement
mode) i.e. the density of free carriers in the induced channel increases, resulting in an increased level
of drain current.
- This is analogous to the situation, when there is water in tank (positive VDS) and we start
opening the tap (VGS ≥ Vth) then water will come out and flow of water will increase if we open
the tap by larger extent.
CONTINUED..
▪ VGS is fixed at a voltage above Vth and VDS is
further increased
▪ As VDS is increased, the channel becomes more tapered and
eventually, the channel will be reduced to the point of pinch-
off. The MOSFET is then said to have entered the saturation
region. The drain current ideally saturates and becomes
independent of VDS.
▪ The voltage VDS at which saturation occurs is denoted by
VDSsat given by VGS - Vth
Operation of the enhancement NMOS transistor
as VDS is increased. The induced channel
acquires a tapered shape.
P-CHANNEL ENHANCEMENT MOSFET:
▪ The structure is similar to that of the NMOS device except that here the substrate is n type and the source
and the drain regions are p+ type
Device structure of p-channel enhancement MOSFET
DEVICE SYMBOL
▪ N-channel enhancement MOSFET (NMOS)
Simplified symbol , B and S are connected
▪ P-channel enhancement MOSFET (PMOS)
Simplified symbol , B and S are connected
REGION OF OPERATION AND CHARACTERISTICS
▪ There are three regions of operation:
▪ Cut-off: VGS < Vth, no channel is created, the drain current (ID) is zero
▪ Triode region: VGS ≥ Vth, Channel is induced, ID starts flowing, varies almost linearly with VDS till VDSsat.
▪ Saturation region: VGS ≥ Vth and VDS ≥ VDSsat, ID saturates.
CURRENT VOLTAGE RELATION
▪ The conditions and current equations in various regions of operation for the Enhancement N-type
MOSFET is summarised on next slide.
▪ Vtn denotes the threshold voltage (Vth) of NMOS transistor.
▪ Kn’ is the process transconductance parameter of NMOS.
k′n = μn Cox (In amperes per volt squared (A/V2))
▪ VOV is overdrive voltage given by
VOV = VGS - Vtn
I-V CHARACTERISTIC FOR N-TYPE MOSFET
ID-VGS curve ID-VDS curve
SOLVED PROBLEMS
JFET CONSTRUCTION
▪ JFET is a three-terminal device with one terminal capable of controlling the current
between the other two
N channel Junction field-effect
transistor (JFET)
JFET AT VGS = 0 V AND VDS > 0 V
The depletion region is The p–n junction is reverse-biased for the length
wider near the top of of the channel results in a gate current of zero
both p-type materials amperes
REFERENCE MATERIAL FOR FURTHER STUDY
Sr.
Item Source Description/link
No.
YouTube https://www.youtube.com/watch?v=l9LBIy9Iox
1
(Recommended) o
https://www.youtube.com/watch?v=MuBiC9yz
NPTEL
2 Theory 2fc
Boylestead Book
3 Section 6.8
(11th Ed.)
Solved problem: 5.1, 5.5, 5.6
Problems for Sedra Smith Book Exercise: 5.11, 5.12
4
practice (6th Ed.) Problems: 5.18, 5.19, 5.45, 5.46, 5.48
Separate Solved Problem Sheet Provided
