CURRICULUM VITAE
M.Narasinga Rao,
NES-DDT-RTM, IMEC,
Kapeldreef 75, Heverlee 3001, Belgium.
Email : narasinga.rao@gmail.com
Phone : +32-487-161-473
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Career Objective : Looking for a competitive and challenging position in the field of
Embedded Systems.
EXPERIENCE :
   • PhD Research Oct’06 - Current.
     Doing research in the area of mapping dynamic tasks on Heterogeneous Multiprocessor Sys-
     tems in cost efficient way (Ex: optimizing the energy consumption). Modern applications
     in the multimedia and wire-less domain are demanding more dynamic resource requests on
     the platform. Example applications are WSS based 3D scalable graphics application and
     Cross-layer MAC application in Software Defined Radio are demanding varying amount of
     resource requests over the time due to channel condition and inputs of the application. We
     are approaching this problem using Systematic Scenario based methodology along with
     Task Concurrency methodology which uses the pareto-based approach to map the tasks.
   • Software Engineer Aug’04 - Oct’06.
     Worked as a developer and validation engineer for Software Traffic Generator, Traf-
     fic Analyzer and QA test framework: TAZO for Agere Network processors in
     Network Processor Applications & Tools Division of Agere Systems India Pvt
     Ltd, Bangalore. My responsibilities also includes development of regression test har-
     ness environment for simulation based performance analysis of Agere network processors
     APP350/APP550/APP650 and involving in Agere Network Processes validation frame-
     work. Contribution in the development of Agere NAS (Network Attached Storage) project
     particularly in the implementation of UPNP, Media Server Content Directory service and
     XML Parser implementation in C language.
Areas of Interest
   •   Embedded Systems, Digital Image Processing, Computer Architecture, Digital Electronics
   •   System software development
   •   Specification Models, Methodologies, & Tools for System Level Design Automation
   •   Computer Networks, Compilers (Both front-end and back-end)
   •   Software Synthesis for Embedded Processors and Platforms
   •   Algorithms, Data Structures and Data base management system
Software Skills
Expertise in                            :  C, C++, JAVA, SML, VHDL, SystemC, XML, XSLT
Good Exposure to assemblies             :  8085, 8086, SPARC, Srijan-VLIW
Good Exposure to Tools                  :  GNU BinUtils, DDD, GDB, LaTex, CVS,
                                           Trimaran MD, ML-Yacc, ML-Lex, Flex, Bison, MPI,
                                           newlibc, QuickThreads
Scripting Languages                      : PERL, BASH, CSH, JavaScript, CGI, and C
Databases and Packages                   : SQL, PL-SQL, MS-Access, Visual Basic, Foxpro 6
Good Exposure to OSs                     : Linux, Unix, Solaris, and Windows9x/2000/NT/XP
Good Exposure to IMPACT, p3 Compiler frame works
Strong skills in software design, programming, algorithms, data structures & debugging
Educational Background
 Degree                         Year            University/Institute              %/CGPA
 M.Tech,                        2002-2004       IIT Delhi                         8.32
 Computer Science & Engineering                                                   (CGPA)
 B.Tech,                        1998-2002       JNTU, Hyderabad                   82.11%
 Computer Science & Engineering
 Diploma,                       1995-1998       GIPDCE&T, Tirupati                79.45%
 Computer Science & Engineering
 SSC                            1994-1995       Board of Secondary Education, 79.33%
                                                Andhra Pradesh
Achievements
  •   Received prestegious Agere Systems performance recognization award: SPOT
  •   Ranked with Outstanding performance appraisal in Agere Systems, India
  •   Secured 99.61 percentile with All India Rank 72 in GATE 2002
  •   Got the Silver medal from the Vice chancellor, JNT University, Hyderabad, for achieving
      the top rank and percentile in our Engg College
  •   Got Second prize in software contest conducted in IEEE Annual Technical Sympo-
      sium and Exhibition-2002, IIT-Roorkee
  •   Got Third position in B-Tech in the class of 60 students
  •   Secured 28th rank(out of 2500 students) in ECET(FDH) 1998
  •   Got Second position in Diploma in the class of 40 students
Course Work
  • CAD of Digital Systems, High level Design and Modeling, Architecture of Large systems,
    Digital Systems, Computer Architecture, Micro Processors, Compiler Design
  • Data structures, Descrete mathematics, Design and Analysis of Algorithms, Theory of
    Computation, Operating Systems, Databases and Distributed Databases, Introduction to
    Logic and Functional Programming
  • Computer Networks, Advanced Computer Networks, Network Security, Digital Image Pro-
    cessing
Projects Done
  • Retargetable Software Synthesis for Heterogeneous Multiprocessor SoC
    Supervisor : Prof Anshul Kumar, IIT Delhi
    In this project we have ported the GNU binutils (assembler, linker, objdump, and readelf),
    and a part of NewlibC to an in-house Srijan VLIW ASIP based heterogeneous multipro-
    cessor. We have also implemented a code optimization compiler backend pass to remove
    the redundant user code and pick only necessary code from libraries by performing call
    graph analysis. On top of these, We have proposed implemented the framework for the
    software synthesis of heterogeneous multiprocessors using Process Network model.
• System Software for Process Networks
  Supervisor: Prof Anshul Kumar, IIT Delhi
  In this project we have implemented a lightweight thread package that offers API to model
  applications as process networks. We have chosen the Quick Thread interface to separate
  out machine dependence and implemented the same for Srijan VLIW processor.
• Modeling of Mobile IP using SystemC
  Supervisor : Asst Prof. Preeti Ranjan Panda, IIT Delhi
  In this project I have developed a behavioral SystemC model for Mobile IP network com-
  prising home agents, foreign agents, and mobile devices. The protocols of various agents
  have been modeled and a testbench was developed to test the functionality of the system.
• Cycle Accurate RTL Model of 8085
  Supervisor : Prof. M. Balakrishnan, IIT Delhi
  In this work I have developed in VHDL cycle accurate models of non-pipelined and pipe-
  lined processor versions for 8085 instruction set. The pipelined design consists of 3 stages
  (fetch, decode and execute) and an instruction buffer for handling variable length instruc-
  tions.
• Implementation of List SchedulingTool
  Supervisor : Prof. M. Balakrishnan, IIT Delhi
  In this work I have developed the tool, which is capable of scheduling a given sequence
  graph in the view of minimizing latency under resource constraints and relative timing
  constraints, and to minimize the resources under the latency constraints. This tool can
  handle multiple operation types and multi-cycle execution delays.
• Filter Bank based Finger Print matching
  Supervisor : Associate Prof. Prem K Kalra, IIT Delhi
  In this work I have implemented the filter bank based fingerprint matching software in ’C’
  language. It matches a fingerprint image with already existing data base which contains
  the information about finger print images.
• JPEG image Compression and Decompression Implementation
  Supervisor : Associate Prof. Prem K Kalra, IIT Delhi
  In this work I have implemented the JPEG image compression and decompression tech-
  niques in the C language. I have done this project at the bit-level manipulations and
  optimizations in code.
• Compiler and Interpreter for P3 language
  Supervisor : Associate Prof. S. Arun-Kumar, IIT Delhi
  In this work I have built a compiler and interpreter for a p3 language in SML by using
  the features of ML-Lex and ML-Yacc.
• Image Steganography
  Supervisor : Prof. Subrat Kar, IIT Delhi
  In this work I have done the steganography of text data in a Image. For hiding text data,
  I have used LSB steganography. The image format is in .ppm.
  • Ping and Trace-router implemented in C
    Supervisor : Prof. Huzur Saran , IIT Delhi
    In this work, I have implemented ping and trace-router programs by using raw sockets in
    the C Language. The trace-router is used to get the route followed by the packet to reach
    destination and we can observe the changes in route for UDP packets.
  • Secure Chat
    Supervisor : Prof. B.N. Jain, IIT Delhi
    In this work, I have developed a secure chat system between two communicating chat
    application entities, connected through insecure channel. Algorithms used are RSA1024bit
    key, DES and D-Hellman methods.
  • Ad-Hoc network setup, configuration, AODV routing and UPNP service dis-
    covery protocol
    Supervisor : Prof. B.N. Jain, IIT Delhi
    In this work, we have done case study on AODV routing and UPNP service discovery
    protocols in Ad-Hoc network. For this we have formed and configured the Ad-Hoc network
    between 3 hosts and did the case study.
  • Designing of Text Editor
    Supervisor : Asst Prof. Saradamani, R.G.M.Engg. College, Nandyal
    The main objective of this project is develop a screen editor using the ’C’ language. This
    will create a friendly environment to users to create and edit his text files.
  • IRDS Bank Management
    Supervisor : Mr. Hari Prasad , GIPDCE&T, Tirupati
    The main aim of this project is to computerize the IRDS bank management services. This
    project was done in Oracle Developer 2000 with back-end SQL.
  • Other Projects
      – Implemented different Image enhancement and Image filtering techniques along with
        Hough Transform, Image Morphing, in the course work of digital image processing
      – A client-server model for a multi party chat system in C++
      – A multi-player board game (Conquest) in JAVA
      – A UDP ping server and client pair using C++
      – Parallel matrix Multiplication using MPI in C language
Ongoing research & study
  • Lossless Image compression
  • D Compiler
  • Eclipse IDE
  • Agere Network Processors(APP550, APP650)
Teaching Assistantship
  • Worked as Teaching Assistantship for Numerical and Scientific Computing, Introduction
    to Computers and Programming courses in IIT-Delhi.
Scholarship / Fellowship
  • Received fellowship from CISCO Systems for my M.Tech Course in IIT Delhi.
Extracurricular Activities and Hobbies
  •   Programming stands first in the list of my hobbies
  •   Administrator for Agere IDC CVS and weekly script & web interface
  •   Playing chess and Chinese checker, Reading books and Surfing net
  •   Always trying to learn new things and new technology from available resources
  •   Very much interested to explore challenging problems
  •   Class representative at school and college level
  •   Worked as a volunteer for Intel and MCL laboratories in IIT-Delhi CSE department
  •   Member of Embedded Systems Group in IITDelhi
Personal Profile
         Full Name                 :   Miniskar Narasinga Rao
         Father Name               :   Miniskar Subba Rao
         Nationality               :   Indian
         Sex                       :   Male
         Martial status            :   Single
         Date of Birth             :   24-12-1979.
         Phone Number              :   +91-9448818697
         Permanent Address         :   14 / 462, Opp Devi Theatre,
                                       Mydukur, Cuddapah (dist),
                                       Andhra Pradesh-516172.
         E-mail                    :   narasinga.rao@gmail.com
         Language Proficiency      :   English, Telugu, Hindi and Marathi.
References
                       Munaga Satyakiran,
                       PhD Research Student,
                       D6/DDT, IMEC
                       Kapeldreef 75
                       Heverlee, Belgium - 3001
                       E-mail: satyaki@imec.be
                       Web: http://homes.esat.kuleuven.be/∼smunaga