BIC703M

Bias Controlled Monolithic IC VHF/UHF RF Amplifier

ADE-208-984D (Z) 5th. Edition Mar. 2001 Features

Bias Controlled Monolithic IC (No external DC biasing voltage on gate1.); To reduce using parts cost & PC board space. High |yfs| ; |yfs| = 29 mS typ. ( f = 1kHz) Low noise; NF = 1.0 dB typ. (at f = 200 MHz), NF = 1.8 dB typ. (at f = 900 MHz) Withstanding to ESD; Build in ESD absorbing diode. Withstand up to 200V at C = 200pF, Rs = 0 conditions. Provide mini mold package; MPAK-4 (SOT-143Rmod)

Outline
MPAK-4

2 3 1 4

1. Source 2. Gate1 3. Gate2 4. Drain

Notes:

1. 2.

Marking is CZ. BIC703M is individual type number of HITACHI BICMIC.

BIC703M
Absolute Maximum Ratings (Ta = 25C)
Item Drain to source voltage Gate1 to source voltage Gate2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Symbol VDS VG1S VG2S ID Pch Tch Tstg Ratings 6 +6 0 +6 0 30 150 150 55 to +150 Unit V V V mA mW C C

Electrical Characteristics (Ta = 25C)

Item Drain to source breakdown voltage Gate1 to source breakdown voltage Gate2 to source breakdown voltage Symbol V(BR)DSS V(BR)G1SS V(BR)G2SS Min 6 +6 +6 0.8 12 24 Typ 1.1 15 29 Max +100 1.5 18 34 Unit V V V nA V mA mS Test Conditions I D = 200A VG2S = 0,VG1 = open I G1 = +1mA, VG2S = VDS = 0 I G2 = +10 A, VG1S = VDS = 0 VG2S = +5V, V G1S = VDS = 0 VDS = 5V, ID = 100A VG1 = open VDS = 5V , VG2S = 4V VG1 = open VDS = 5V, ID = 15mA VG2S =4V, f = 1kHz Input capacitance Output capacitance c iss c oss 1.6 0.6 23 17 2.0 1.0 0.022 28 1.0 22 1.8 2.4 1.4 0.05 1.8 2.4 pF pF pF dB dB dB dB VDS = 5V, VG2S =4V VG1 = open f = 1MHz VDS = 5V, VG2S =4V VG1 = open f = 200MHz VDS = 5V, VG2S =4V VG1 = open f = 900MHz

Gate2 to source cutoff current I G2SS Gate2 to source cutoff voltage VG2S(off) Drain current Forward transfer admittance I D(op) |yfs|

Reverse transfer capacitance c rss Power gain Noise figure Power gain Noise figure PG1 NF1 PG2 NF2

BIC703M
Test Circuits
DC Biasing Circuit for Operating Characteristic Items (ID(op), |yfs|, Ciss, Coss, Crss, NF, PG)
VG1 VG2 Gate 2 Gate 1 Open

A ID

Drain

Source

200 MHz Power Gain, Noise Figure Test Circuit

VT 1000p VG2 1000p VT 1000p

47k Input(50) 1000p 36p L1

1000p

47k

BICMIC L2 1000p

47k

Output(50)

10p max 1000p 1SV70 RFC 1SV70

1000p VD Unit : Resistance () Capacitance (F)

L1 : 1mm Enameled Copper Wire,Inside dia 10mm, 2Turns L2 : 1mm Enameled Copper Wire,Inside dia 10mm, 2Turns RFC : 1mm Enameled Copper Wire,Inside dia 5mm, 2Turns

BIC703M
900 MHz Power Gain, Noise Figure Test Circuit
VG2 C4 VD C5

R1 C3 G2 Input L1 L2 G1

R2 D L3 S

RFC

Output L4

C1

C2

C1, C2 C3 C4, C5 R1 R2

: : : : :

Variable Capacitor (10pF MAX) Disk Capacitor (1000pF) Air Capacitor (1000pF) 47 k 4.7 k

L1: 10 10 8

L2:

26 3 3

(1mm Copper wire) Unit : mm

21

L3: 7

L4: 29 10 7

18 10

RFC : 1mm Copper wire with enamel 4turns inside dia 6mm

BIC703M
Maximum Channel Power Dissipation Curve Typical Output Characteristics VG1 = open I D (mA) 150 16 VG2S = 4 V 12 3V 8 2V

Channel Power Dissipation

Pch (mW)

200

20

100

50

Drain Current

4 1V

50

100

150 Ta (C)

200

4 V DS (V)

Ambient Temperature

Drain to Source Voltage

Forward Transfer Admittance | yfs | (mS)

Forward Transfer Admittance vs. Gate1 Voltage 50 40 30 25 Power Gain PG (dB) 20 15 10 5 0 1

Power Gain vs. Gate2 to Source Voltage

30 20

VG1S = 4 V

3V 10 1V 0 1.0 Gate1 Voltage V G1 2.0 (V) 2V

V DS = 5 V V G1 = open f = 200 MHz 4 2 3 Gate2 to Source Voltage V G2S (V)

BIC703M
Noise Figure vs. Gate2 to Source Voltage 5 V DS = 5 V V G1 = open f = 200 MHz 30 25 Power Gain PG (dB) 20 15 10 5 0 1 V DS = 5 V V G1 = open f = 900 MHz 4 2 3 Gate2 to Source Voltage V G2S (V) Power Gain vs. Gate2 to Source Voltage

Noise Figure NF (dB)

0 1

4 2 3 Gate2 to Source Voltage V G2S (V)

Noise Figure vs. Gate2 to Source Voltage 5 Input Capacitance Ciss (pF) V DS = 5 V V G1 = open f = 900 MHz 4

Input Capacitance vs. Gate2 to Source Voltage

Noise Figure NF (dB)

2 V DS = 4 V V G1 = open f = 1 MHz

0 1

4 2 3 Gate2 to Source Voltage V G2S (V)

1 2 3 4 Gate2 to Source Voltage V G2S (V)

BIC703M
Gain Reduction vs. Gate2 to Source Voltage 0
Gain Reduction GR (dB) Gain Reduction GR (dB)

Gain Reduction vs. Gate2 to Source Voltage 0

10

10

20

20

30

40

V DS = 5 V V G1 = open V G2S = 4 V f = 200 MHz

30

40

V DS = 5 V V G1 = open V G2S = 4 V f = 900 MHz

50

2 3 1 0 Gate2 to Source Voltage V G2S (V)

50

2 3 1 0 Gate2 to Source Voltage V G2S (V)

BIC703M
S11 Parameter vs. Frequency
.8 .6 .4 3 .2 4 5 10 0 .2 .4 .6 .8 1 1.5 2 3 45 10 -10 - .2 -5 -4 -3 - .4 - .6 - .8 - 1.5 -2 - 120 -1 - 90 180 0 150 30 1 1.5 2

S21 Parameter vs. Frequency

90 120

Scale: 1 / div.
60

- 150

- 30

- 60

Test Condition: VDS = 5 V , VG1 = open VG2S = 4 V , Zo = 50 50 to 1000 MHz (50 MHz step)

Test Condition: VDS = 5 V , VG1 = open VG2S = 4 V , Zo = 50 50 to 1000 MHz (50 MHz step)

S12 Parameter vs. Frequency

90 120

S22 Parameter vs. Frequency

.8 .6 .4 3 1 1.5 2 30 .2

Scale: 0.004/ div.

60

150

4 5 10

180

.2

.4

.6 .8 1

1.5 2

3 45

10 -10

- .2 - 150 - 30 - .4 - 120 - 60 - 90 - .6 - .8 - 1.5 -2 -1

-5 -4 -3

Test Condition: VDS = 5 V , VG1 = open VG2S = 4 V , Zo = 50 50 to 1000 MHz (50 MHz step)

Test Condition: VDS = 5 V , VG1 = open VG2S = 4 V , Zo = 50 50 to 1000 MHz (50 MHz step)

BIC703M
Sparameter (VDS = 5 V, VG2S = 4 V, VG1 = open, Zo = 50 )
S11 f (MHz) MAG 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 850 900 950 1000 1.000 0.993 0.991 0.984 0.978 0.970 0.958 0.954 0.945 0.932 0.920 0.910 0.900 0.887 0.870 0.863 0.853 0.839 0.827 0.819 ANG -3.3 -7.2 -10.9 -15.0 -19.0 -22.8 -26.7 -30.3 -33.8 -37.5 -40.6 -44.3 -47.5 -50.9 -54.4 -57.6 -60.9 -63.6 -66.5 -70.1 S21 MAG 2.80 2.78 2.77 2.74 2.72 2.68 2.64 2.60 2.56 2.50 2.46 2.41 2.37 2.31 2.27 2.22 2.18 2.12 2.07 2.04 ANG 175.9 170.9 166.1 161.2 156.5 151.8 147.2 142.7 138.6 134.1 129.8 125.7 121.6 117.8 113.6 110.0 105.8 102.2 98.6 94.9 S12 MAG 0.00106 0.00171 0.00253 0.00356 0.00442 0.00485 0.00576 0.00642 0.00689 0.00712 0.00765 0.00804 0.00798 0.00787 0.00785 0.00758 0.00721 0.00694 0.00716 0.00667 ANG 58.8 75.7 75.1 77.4 78.2 80.0 74.7 71.7 73.3 71.8 70.7 69.9 69.1 67.8 70.8 73.3 75.2 75.8 88.1 92.7 S22 MAG 0.990 0.992 0.991 0.987 0.985 0.982 0.978 0.973 0.968 0.963 0.958 0.952 0.947 0.942 0.936 0.929 0.924 0.917 0.912 0.906 ANG -2.4 -4.7 -7.2 -9.6 -12.2 -14.7 -17.1 -19.6 -22.0 -24.2 -26.7 -28.9 -31.3 -33.4 -35.8 -37.9 -40.3 -42.5 -44.5 -46.7

BIC703M
Package Dimensions As of January, 2001
Unit: mm
2.95 0.2 1.9 0.2 0.95 0.95

0.4 0.05

+ 0.1

0.1 0.4 + 0.05

0.65

0.16 0.06

+ 0.1

1.5 0.15

+ 0.2 0.6

0 0.1

0.95

0.85

1.8 0.2
0.3

1.1 0.1

+ 0.2

0.65

0.4 0.05

+ 0.1

0.1 0.6 + 0.05

2.8
Hitachi Code JEDEC EIAJ Mass (reference value)

MPAK-4 Conforms 0.013 g

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BIC703M
Cautions
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Hitachi, Ltd.
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Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.

Colophon 2.0

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