Barry Wilkinson 2002. All rights reserved.

Page 1
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 1
ITCS 4141/5141 Computer Organization and
Architecture
Summer 2002
Barry Wilkinson
Department of Computer Science
University of North Carolina at Charlotte
Monday/Tuesday/Wednesday/Thursday/Friday
3:00 pm - 4:30 pm
Kennedy 135
Slide 2
Course
The course is concerned with design techniques for high
performance computer systems. This course continues the topics of
ITCS 3182 in more detail and explores advanced topics such as
superscalar design. Other topics include the organization of the
main/disk memory hierarchy and an introduction to multiprocessors.
Barry Wilkinson 2002. All rights reserved. Page 2
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 3
Course Text
Not strictly necessary as on-line slides will be provided on home
page. For reading:
Barry Wilkinson, Computer Architecture, Design and Performance
2nd Edition, Prentice Hall 1996.
Also see:
D. A. Patterson and J. L. Hennessy Computer Architecture A
Quantitative Approach 2nd edition, Morgan Kaufmann, 1996
D. Sima, T. Fountain, and P. Kacsuk, Advanced Computer
Architecture A Design Space Approach, Addison-Wesley, 1997.
Slide 4
Prerequisites
ITCS 3182 (see http://www.cs.uncc.edu/~abw/ITCS3182/) or
equivalent or consent of department.
Anyone without the prerequisite who continues to be registered in
this course will receive an F/U grade for dishonesty. If there is any
doubt, please obtain a written note from the dept/instructor.
ITCS 5141 IS A SECOND COURSE ON COMPUTER ORGANIZATION, AND
HENCE BASIC KNOWLEDGE OF COMPUTER ORGANIZATION IS EXPECTED.
Knowledge of C and an assembly language are also assumed.
Barry Wilkinson 2002. All rights reserved. Page 3
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 5
Home page
For materials, assignments, announcements, etc.
http://www.cs.uncc.edu/~abw/ITCS5141/
Please check this page before each class.
Slide 6
Course Outline
Broadly three parts, a review and discussion of ITCS 3182 material,
further study of these topics (pipelined design, cache memory and
memory management), and nally a detailed study of higher
performance superscalar and multiprocessor systems:
Review of the stored program concept
Detailed study of pipelined processor design
Cache memory
Memory management
Higher performance processor design
Shared memory multiprocessor systems
Barry Wilkinson 2002. All rights reserved. Page 4
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 7
Assessment
Class tests (2) 40%
Project/assignments 40%
Final exam 20%
The assessment and percentages may be modified.
All submitted assignments must be your own work. Copied work or
work done by more than one person (unless specically instructed)
will not be accepted. No work will be accepted after the due date
without a good reason. No make-up tests.
Attendance - expected. If you miss classes, it will have a dele-
terious effect on your grade. Attendance will be taken.
NOTE SMALL PRINT
Slide 8
Instructor
Barry Wilkinson
Room: Kennedy 214
Tele: 687 4879
Email: abw@uncc.edu
Ofce Hours
Monday/Tuesday/Wednesday/Thursday/Friday: 4:30 pm onwards.
Please come at 4:30 pm as I will not wait if no one there.
Barry Wilkinson 2002. All rights reserved. Page 5
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 9
Processor Design
Review of Stored Program Concept
Lecture 1
Slide 10
Stored Program Computer
Has a list of binary encoded instructions held in a memory (stored
program) that dene the actions of computer.
Consists of:
Memory
Processor
Input circuits and devices
Output circuits and devices
Processor fetches (machine) instructions from memory and
performs actions dened.
Barry Wilkinson 2002. All rights reserved. Page 6
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 11
Babbage
Concept rst proposed by Babbage in the 1800s - his machine was
mechanical but had the main parts of a modern computer; an
arithmetic unit and controller (processor), memory (punched cards)
- never completed because the mechanical complexity (gears etc).
Slide 12
1930 - 40s
Atanasoff-Berry Computer (ABC) - John Atanasoff at Iowa State
College. (Berry was a research assistant.)
Special purpose digital computer for solving linear algebraic
equations. Not widely known until patent litigation over ENIAC in
1967-69.
Barry Wilkinson 2002. All rights reserved. Page 7
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 13
Z3 - Konrad Zuse,
Germany - relay machine.
Destroyed by bombing raid
on Berlin.
Instructions of form:
R2 = R1 <operation> R2.
Eleven operations.
No conditional branch
operations.
Loops could be done with
loop of punched lm.
Source: Computer Architecture and Implementation by
H. G. Cragon, Cambridge University Press, 2000.
Slide 14
Colossus
British Government - for breaking enciphered German messages.
First operational 1943. Ten built. Kept secret until 1975.
Source of picture Alan Turing the Enigma by A. Hodges, Simon and
Schuster, 1983. Should be compulsory reading for all CS majors.
Barry Wilkinson 2002. All rights reserved. Page 8
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 15
Harvard Mark 1
Howard Aiken Assistant professor Harvard University proposed a
machine for to produce tables of functions.
Approached IBM who built the machine.
Electromechanical (not electronic). Used IBMs technology in
punched card machines and tabulators. Program stored on
punched tape.
Operational 1943 - 1959.
Slide 16
ENIAC with Eckert. Program entered using switches on lower part of equipment
ENIAC project
Electronic Numerical Integrator and Computer
Hugh electronic computer (over 18,000 vacuum tubes) developed
during World War II - did not have stored program (programming
done by setting switches.
Barry Wilkinson 2002. All rights reserved. Page 9
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 17
EDVAC project
Electronic Discrete Variable Computer
Proposed towards end of ENIAC project - Eckert, Mauchly and von
Neumann - Report (published with one name, von Neumann) on the
design of an electronic stored program computer.
Slide 18
von Neumann computer
Describes a stored program computer that uses the memory to hold
both binary encoded instructions (program) and data.
Harvard computer
A stored program computer in which separate memory is employed
to hold the program and the data.
Present day computers are von Neuman although usual to have
separate cache memories near processor for program and data.
Barry Wilkinson 2002. All rights reserved. Page 10
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 19
The worlds rst electronic stored program
computer
The Manchester University Mark I, operational June 21, 1948
Slide 20
EDSAC
Electronic Delay Storage Automatic Calculator
Operational in 1949 - rst
large scale stored program
computer.
Cambridge University
Used mercury delay line
memory
Maurice Wilkes looking at the
delay lines.
Barry Wilkinson 2002. All rights reserved. Page 11
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 21
Stretch Computer
1961 IBM - Designed to stretch technology/performance to its
limits - germanium transistor based - much faster than earlier tube
based systems (IBM 704/5.) e.g. 1 microsecond add compared to
84 microsecond add.
Slide 22
Landmarks in Computer Design since 1960
Supercomputers
Mid 1960s - CDC 6600 - one of the rst supercomputers, multiple
functional units, classic 3-address instruction format (re-introduced
in RISC computers in 1990s), refrigerated. Follow-on CDC 7600.
1970s, early 1980s supercomputers continue to be deveoped. Cray
1 and Cray 2 supercomputers using the most advanced technology
available to obtain the maximum speed.
Barry Wilkinson 2002. All rights reserved. Page 12
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 23
Development of families
Processors developed in families such that processors would be
able to execute programs of earlier processors. Started with IBM
360 series in 1960s.
Concept used by all manufacturers.
Slide 24
1970s - minicomputers appeared - much lower performance but low
cost and bringing computers to the laboratory - PDP 8 being the
classic.
First microprocessors appeared using MOS technology (4004). Intel
family starts.
Early 1980s Introduction of the personal computer (PC).
Barry Wilkinson 2002. All rights reserved. Page 13
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 25
Microprocessor families
Eight-bit microprocessors, that is, processors that can operate upon
and perform arithmetic on 8-bit numbers directly, in the mid- 1970s,
typied by the Intel 8080, Motorola MC6800 and Zilog Z-80.
Sixteen-bit microprocessors towards the end of the 1970s, e.g.,
Intel 8086 and Motorola MC68000, both introduced in 1978.
Thirty-two bit processors appeared in 1980s (e.g., Intel 386,
Motorola MC68020, and MC68030. Intel 486 and Motorola
MC68040 continued the trend of adding facilities within the chip
(oating point units).
Slide 26
1980s - Dominated by increasing integrated circuit performance.
Moores law (1965)- number of transistors on a chip doubles every
year (or more acurately quadruples every three years, or 59%/year).
Still applies today:
1970 1975 1980 1985 1990 1995 2000
10
8
10
7
10
6
10
5
10
4
10
3
10
2
1
10
1103 DRAM
Intel 4004
64 kbit RAM
Intel 8086
Motorola 68000
256 kbit DRAM
Pentium II
Siemens 16 Mbit DRAM
1 Mbit DRAM
NEC 64 Mbit DRAM
No of
transistors
Barry Wilkinson 2002. All rights reserved. Page 14
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 27
Development of microprocessor families cont.
Superscalar processors in early 1990s - more than one instruction
can be executed in each cycle, e.g. Intel Pentium and Pentium Pro.
Pentium II introduced in 1996, extra instructions for multimedia
applications (MMX technology). Pentium III, Pentium IV, ...
Sixty-four bit processors in mid 1990s.
Also Intel pursuing a design in which instructions are packaged into
groups for simultaneous execution (see much later).
Slide 28
Reduced Instruction Set Computer (RISC)
RISC emerged in early 1980s. Instruction set carefully chosen
(perhaps less than 100 instructions) and a few addressing modes
(perhaps 25) leads to processor that can operate faster - now
basis of all processors internally.
Barry Wilkinson 2002. All rights reserved. Page 15
This material is the property of Professor Barry Wilkinson and for sole and exclusive use of students enrolled the computer architecture course ITCS 4141/5141 at
the University of North Carolina at Charlotte in Summer 2002. It is not to be sold, reproduced, or generally distributed.
Slide 29
Present (2001)
Still dominated by increasing integrated circuit performance and
increasing clock speeds
Intel family still dominates the home market with increasing complex
backward compatible processors
Workstations - based upon RISC processors (most notably SUNs)
higher performance
By the end of the 1990s, both RISC and Intel processors still
competing.