ECE 301 Digital Electronics

Multiplexers, Decoders and Encoders

(Lecture #16)
The slides included herein were taken from the materials accompanying
Fundamentals of Logic Design, 6
th
Edition, by Roth and Kinney,
and were used with permission from Cengage Learning.
Spring 2011 ECE 301 - Digital Electronics 2
Multiplexers
Spring 2011 ECE 301 - Digital Electronics 3
Multiplexers

A multiplexer has

2
n
data inputs

n control inputs

1 output

A multiplexer routes (or connects) the selected

data input to the output.

The value of the control inputs determines the

data input that is selected.
Spring 2011 ECE 301 - Digital Electronics 4
Multiplexers
Z = A.I
0
+ A.I
1
Data
inputs
Control
input
Spring 2011 ECE 301 - Digital Electronics 5
Multiplexers
Z = A.B'.I
0
+ A'.B.I
1
+ A.B'.I
2
+ A.B.I
3

MSB LSB
A B Z
0 0 I
0
0 1 I
1
1 0 I
2
1 1 I
3
2
1
2
0
m
0
= A'.B'
m
1
= A'.B
m
2
= A.B'
m
3
= A.B
Spring 2011 ECE 301 - Digital Electronics 6
Multiplexers
Z = A.B'.C'.I
0
+ A'.B'.C.I
1
+ A'.B.C'.I
2
+ A'.B.C.I
3
+
A.B'.C'.I
0
+ A.B'.C.I
1
+ A'.B.C'.I
2
+ A.B.C.I
3

MSB LSB
A B C Z
0 0 0 I
0
0 0 1 I
1
0 1 0 I
2
0 1 1 I
3
1 0 0 I
4
1 0 1 I
5
1 1 0 I
6
1 1 1 I
7
2
2
2
0
m
0
m
1
m
2
m
3
m
4
m
5
m
6
m
7
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Multiplexers
2
n-1
2
0
Z = m
i
.I
i

Spring 2011 ECE 301 - Digital Electronics 8
Decoders
Spring 2011 ECE 301 - Digital Electronics 9
Decoders

A decoder has

n inputs

2
n
outputs

A decoder selects one of 2

n
outputs by
decoding the binary value on the n inputs.

The decoder generates all of the minterms of

the n input variables.

Exactly one output will be active for each

combination of the inputs.
What does active mean?
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Decoders
A B Z
0
Z
1
Z
2
Z
3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
msb
2-to-4
Decoder
A
B
Z
0
Z
1
Z
2
Z
3
active-high output
Z
i
= m
i
m
0
m
1
m
2
m
3
Spring 2011 ECE 301 - Digital Electronics 11
Decoders
A B Z
0
Z
1
Z
2
Z
3
0 0 0 1 1 1
0 1 1 0 1 1
1 0 1 1 0 1
1 1 1 1 1 0
msb
active-low output
Z
i
= (m
i
)' = M
i
M
0
M
1
M
2
M
3
A
B
Z
0
Z
1
Z
2
Z
3
2-to-4
Decoder
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Decoders
msb
3-to-8
Decoder
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Decoder with Enable
En A B Z
0
Z
1
Z
2
Z
3
1 0 0 1 0 0 0
1 0 1 0 1 0 0
1 1 0 0 0 1 0
1 1 1 0 0 0 1
0 x x 0 0 0 0
enabled
disabled
active-high enable
En
2-to-4
Decoder
with
Enable
A Z
0
Z
1
Z
2
Z
3
B
Spring 2011 ECE 301 - Digital Electronics 14
Decoder with Enable
En A B Z
0
Z
1
Z
2
Z
3
0 0 0 1 0 0 0
0 0 1 0 1 0 0
0 1 0 0 0 1 0
0 1 1 0 0 0 1
1 x x 0 0 0 0
enabled
disabled
active-low enable
En
2-to-4
Decoder
with
Enable
A Z
0
Z
1
Z
2
Z
3
B
Spring 2011 ECE 301 - Digital Electronics 15
Encoders
Spring 2011 ECE 301 - Digital Electronics 16
Encoders

An encoder has

2
n
inputs

n outputs

Outputs the binary value of the selected

(or active) input.

Performs the inverse operation of a decoder.

Issues

What if more than one input is active?

What if no inputs are active?

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Encoders
Y
0
Y
1
Y
2
Y
3
A B
1 0 0 0 0 0
0 1 0 0 0 1
0 0 1 0 1 0
0 0 0 1 1 1
4-to-2
Encoder
A
B
Y
0
Y
1
Y
2
Y
3
Spring 2011 ECE 301 - Digital Electronics 18
Priority Encoders

If more than one input is active, the higher-order

input has priority over the lower-order input.

The higher value is encoded on the output

A valid indicator, d, is included to indicate whether or

not the output is valid.

Output is invalid when no inputs are active

d = 0

Output is valid when at least one input is active

d = 1
Why is the valid indicator needed?
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Priority Encoders
Valid bit
msb
3-to-8
Priority
Encoder
Spring 2011 ECE 301 - Digital Electronics 20
Circuit Design using Multiplexers
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Using a 2
n
-input Multiplexer

Use a 2
n
-input multiplexer to realize a logic circuit for
a function with 2
n
minterms.

n = # of control inputs = # of variables in the function

Each minterm of the function can be mapped to a

data input of the multiplexer.

For each row in the truth table, for the function,

where the output is 1, set the corresponding data
input of the multiplexer to 1.

That is, for each minterm in the minterm expansion of the

function, set the corresponding input of the multiplexer to 1.

Set the remaining inputs of the multiplexer to 0.

Spring 2011 ECE 301 - Digital Electronics 22
Using an 2
n
-input Mux
Example:
Using an 8-to-1 multiplexer, design a logic circuit
to realize the following Boolean function
F(A,B,C) = m(2, 3, 5, 6, 7)
Spring 2011 ECE 301 - Digital Electronics 23
Using an 2
n
-input Mux
Example:
Using an 8-to-1 multiplexer, design a logic circuit
to realize the following Boolean function
F(A,B,C) = m(1, 2, 4)
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Using an 2
(n-1)
-input Multiplexer

Use a 2
(n-1)
-input multiplexer to realize a logic circuit
for a function with 2
n
minterms.

n 1 = # of control inputs; n = # of variables in function

Group the rows of the truth table, for the function, into
2
(n-1)
pairs of rows.

Each pair of rows represents a product term of (n 1)

variables.

Each pair of rows is mapped to one data input of the mux.

Determine the logical function of each pair of rows in

terms of the remaining variable.

If the remaining variable, for example, is x, then the

possible values are x, x', 0, and 1.
Spring 2011 ECE 301 - Digital Electronics 25
Using an 2
(n-1)
-input Mux
Example: F(x,y,z) = m(1, 2, 6, 7)
Spring 2011 ECE 301 - Digital Electronics 26
Using an 2
(n-1)
-input Mux
Example: F(A,B,C,D) = m(1,3,4,11,1215)
Spring 2011 ECE 301 - Digital Electronics 27
Using a 2
(n-2)
-input Mux
A similar design approach can be implemented
using a 2
(n-2)
-input multiplexer.
Spring 2011 ECE 301 - Digital Electronics 28
Circuit Design using Decoders
Spring 2011 ECE 301 - Digital Electronics 29
Using an n-output Decoder

Use an n-output decoder to realize a logic circuit for a

function with n minterms.

Each minterm of the function can be mapped to an

output of the decoder.

For each row in the truth table, for the function, where
the output is 1, sum (or OR) the corresponding
outputs of the decoder.

That is, for each minterm in the minterm expansion of the

function, OR the corresponding outputs of the decoder.

Leave remaining outputs of the decoder unconnected.

Spring 2011 ECE 301 - Digital Electronics 30
Using an n-output Decoder
Example:
Using a 3-to-8 decoder, design a logic circuit to
realize the following Boolean function
F(A,B,C) = m(2, 3, 5, 6, 7)
Spring 2011 ECE 301 - Digital Electronics 31
Using an n-output Decoder
Example:
Using two 2-to-4 decoders, design a logic circuit
to realize the following Boolean function
F(A,B,C) = m(0, 1, 4, 6, 7)
Spring 2011 ECE 301 - Digital Electronics 32
Hierarchical Design
Spring 2011 ECE 301 - Digital Electronics 33
Hierarchical Design

Several issues arise when designing large

multiplexers and decoders (as 2-level circuits).

Number of logic gates gets prohibitively large

Number of inputs to each logic gate (i.e. fan-in)

gets prohibitively large

Instead, design both hierarchically

Use smaller elements as building blocks

Interconnect building blocks in a multi-tier

structure
Spring 2011 ECE 301 - Digital Electronics 34
Hierarchical Design
Exercise:
Design an 8-to-1 multiplexer using
4-to-1 and 2-to-1 multiplexers only.
Spring 2011 ECE 301 - Digital Electronics 35
Hierarchical Design
Exercise:
Design a 16-to-1 multiplexer using
4-to-1 multiplexers only.
Spring 2011 ECE 301 - Digital Electronics 36
Hierarchical Design
Exercise:
Design a 4-to-16 decoder using
2-to-4 decoders only.
Spring 2011 ECE 301 - Digital Electronics 37
Questions?