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L M 2 3 1 A / L M 2 3 1 / L M 3 3 1 A / L M 3 3 1 P r e cis ion V ol ta g e - to- F r e q u e n cy C on v e r te r s
C he ck for Sa mpl e s : L M 2 3 1, L M 3 3 1
1 F EA TURES DESC RIP TION
The LM231/LM331 family of voltage-to-frequency
2 3 En s u r e d L in e a r ity 0.01 % ma x
converters are ideally suited for use in simple low-
Impr ov e d P e r for ma n ce in Exis tin g V ol ta g e - to-
cost circuits for analog-to-digital conversion, precision
F r e q u e n cy C on v e r s ion A ppl ica tion s
frequency-to-voltage conversion, long-term
Spl it or Sin g l e Su ppl y Ope r a tion integration, linear frequency modulation or
demodulation, and many other functions. The output
Ope r a te s on Sin g l e 5V Su ppl y
when used as a voltage-to-frequency converter is a
P u l s e Ou tpu t C ompa tibl e with A l l L og ic F or ms
pulse train at a frequency precisely proportional to the
Exce l l e n t Te mpe r a tu r e Sta bil ity : 50 ppm/ C
applied input voltage. Thus, it provides all the
ma x inherent advantages of the voltage-to-frequency
conversion techniques, and is easy to apply in all
L ow P owe r C on s u mption : 1 5 mW Ty pica l a t 5V
standard voltage-to-frequency converter applications.
Wide Dy n a mic Ra n g e , 1 00 dB min a t 1 0 kHz
Further, the LM231A/LM331A attain a new high level
F u l l Sca l e F r e q u e n cy
of accuracy versus temperature which could only be
Wide Ra n g e of F u l l Sca l e F r e q u e n cy : 1 Hz to attained with expensive voltage-to-frequency
modules. Additionally the LM231/331 are ideally 1 00 kHz
suited for use in digital systems at low power supply
L ow C os t
voltages and can provide low-cost analog-to-digital
conversion in microprocessor-controlled systems.
And, the frequency from a battery powered voltage-
to-frequency converter can be easily channeled
through a simple photo isolator to provide isolation
against high common mode levels.
The LM231/LM331 utilize a new temperature-
compensated band-gap reference circuit, to provide
excellent accuracy over the full operating temperature
range, at power supplies as low as 4.0V. The
precision timer circuit has low bias currents without
degrading the quick response necessary for 100 kHz
voltage-to-frequency conversion. And the output are
capable of driving 3 TTL loads, or a high voltage
output up to 40V, yet is short-circuit-proof against
V
CC
.
C ONNEC TION DIA GRA M
F ig u r e 1 . P l a s tic Du a l - In - L in e P a cka g e (P DIP )
Se e P a cka g e Nu mbe r P (R- P DIP - T8)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Teflon is a registered trademark of E.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright 19992013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
L M 2 3 1 , L M 3 3 1
SNOSBI2B JUNE 1999REVISED MARCH 2013 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
A bs ol u te M a ximu m Ra tin g s
(1 ) (2 ) (3 )
Supply Voltage, V
S
40V
Output Short Circuit to Ground Continuous
Output Short Circuit to V
CC
Continuous
Input Voltage 0.2V to +V
S
Package Dissipation at 25C 1.25W
(4)
Lead Temperature (Soldering, 10 sec.)
PDIP 260C
ESD Susceptibility
(5)
500V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not
apply when operating the device beyond its specified operating conditions.
(2) All voltages are measured with respect to GND = 0V, unless otherwise noted.
(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(4) The absolute maximum junction temperature (T
J
max) for this device is 150C. The maximum allowable power dissipation is dictated by
T
J
max, the junction-to-ambient thermal resistance (
JA
), and the ambient temperature T
A
, and can be calculated using the formula
P
D
max = (T
J
max - T
A
) /
JA
. The values for maximum power dissipation will be reached only when the device is operated in a severe
fault condition (e.g., when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed).
Obviously, such conditions should always be avoided.
(5) Human body model, 100 pF discharged through a 1.5 k resistor.
Ope r a tin g Ra tin g s
(1 )
Operating Ambient Temperature
LM231, LM231A 25C to +85C
LM331, LM331A 0C to +70C
Supply Voltage, V
S
+4V to +40V
(1) All voltages are measured with respect to GND = 0V, unless otherwise noted.
P a cka g e The r ma l Re s is ta n ce
P a cka g e
J- A
8-Lead PDIP 100C/W
El e ctr ica l C ha r a cte r is tics
All specifications apply in the circuit of Figure 16, with 4.0V V
S
40V, T
A
=25C, unless otherwise specified.
P a r a me te r C on dition s M in Ty p M a x Un its
4.5V V
S
20V 0.003 0.01 % Full- Scale
VFC Non-Linearity
(1)
T
MIN
T
A
T
MAX
0.006 0.02 % Full- Scale
VFC Non-Linearity in Circuit of Figure 15 V
S
= 15V, f = 10 Hz to 11 kHz 0.024 0.14 %Full- Scale
Conversion Accuracy Scale Factor (Gain)
LM231, LM231A V
IN
= 10V, R
S
= 14 k 0.95 1.00 1.05 kHz/V
LM331, LM331A 0.90 1.00 1.10 kHz/V
Temperature Stability of Gain
LM231/LM331 T
MIN
T
A
T
MAX
, 4.5V V
S
20V 30 150 ppm/C
LM231A/LM331A 20 50 ppm/C
4.5V V
S
10V 0.01 0.1 %/V
Change of Gain with V
S
10V V
S
40V 0.006 0.06 %/V
Rated Full-Scale Frequency V
IN
= 10V 10.0 kHz
Gain Stability vs. Time (1000 Hours) T
MIN
T
A
T
MAX
0.02 % Full- Scale
(1) Nonlinearity is defined as the deviation of f
OUT
from V
IN
(10 kHz/10 V
DC
) when the circuit has been trimmed for zero error at 10 Hz
and at 10 kHz, over the frequency range 1 Hz to 11 kHz. For the timing capacitor, C
T
, use NPO ceramic, Teflon

, or polystyrene.
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El e ctr ica l C ha r a cte r is tics (con tin u e d)
All specifications apply in the circuit of Figure 16, with 4.0V V
S
40V, T
A
=25C, unless otherwise specified.
P a r a me te r C on dition s M in Ty p M a x Un its
Over Range (Beyond Full-Scale) Frequency V
IN
= 11V 10 %
INP UT C OM P A RA TOR
Offset Voltage 3 10 mV
LM231/LM331 T
MIN
T
A
T
MAX
4 14 mV
LM231A/LM331A T
MIN
T
A
T
MAX
3 10 mV
Bias Current 80 300 nA
Offset Current 8 100 nA
V
CC
2.
Common-Mode Range T
MIN
T
A
T
MAX
0.2 V
0
TIM ER
Timer Threshold Voltage, Pin 5 0.63 0.667 0.70 V
S
Input Bias Current, Pin 5 V
S
= 15V
All Devices 0V V
PIN 5
9.9V 10 100 nA
LM231/LM331 V
PIN 5
= 10V 200 1000 nA
LM231A/LM331A V
PIN 5
= 10V 200 500 nA
V
SAT PIN 5
(Reset) I = 5 mA 0.22 0.5 V
C URRENT SOURC E (P in 1 )
Output Current
LM231, LM231A R
S
= 14 k, V
PIN 1
= 0 126 135 144 A
LM331, LM331A 116 136 156 A
Change with Voltage 0V V
PIN 1
10V 0.2 1.0 A
Current Source OFF Leakage
LM231, LM231A, LM331, LM331A 0.02 10.0 nA
All Devices T
A
= T
MAX
2.0 50.0 nA
Operating Range of Current (Typical) (10 to 500) A
REF ERENC E V OL TA GE (P in 2 )
LM231, LM231A 1.76 1.89 2.02 V
DC
LM331, LM331A 1.70 1.89 2.08 V
DC
Stability vs. Temperature 60 ppm/C
Stability vs. Time, 1000 Hours 0.1 %
L OGIC OUTP UT (P in 3 )
I = 5 mA 0.15 0.50 V
V
SAT I = 3.2 mA (2 TTL Loads), T
MIN
T
A

0.10 0.40 V
T
MAX
OFF Leakage 0.05 1.0 A
SUP P L Y C URRENT
V
S
= 5V 2.0 3.0 4.0 mA
LM231, LM231A
V
S
= 40V 2.5 4.0 6.0 mA
V
S
= 5V 1.5 3.0 6.0 mA
LM331, LM331A
V
S
= 40V 2.0 4.0 8.0 mA
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F UNC TIONA L BL OC K DIA GRA M
Pin numbers apply to 8-pin packages only.
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TYP IC A L P ERF ORM A NC E C HA RA C TERISTIC S
(All electrical characteristics apply for the circuit of Figure 16, unless otherwise noted.)
Non l in e a r ity Er r or
a s P r e cis ion V - to- F
C on v e r te r (F ig u r e 1 6) Non l in e a r ity Er r or
F ig u r e 2 . F ig u r e 3 .
Non l in e a r ity Er r or
v s . F r e q u e n cy
P owe r v s .
Su ppl y V ol ta g e Te mpe r a tu r e
F ig u r e 4. F ig u r e 5.
V
REF
Ou tpu t F r e q u e n cy
v s . v s .
Te mpe r a tu r e V
SUP P L Y
F ig u r e 6. F ig u r e 7.
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TYP IC A L P ERF ORM A NC E C HA RA C TERISTIC S (con tin u e d)
(All electrical characteristics apply for the circuit of Figure 16, unless otherwise noted.)
1 00 kHz Non l in e a r ity Er r or Non l in e a r ity Er r or
(F ig u r e 1 7) (F ig u r e 1 5)
F ig u r e 8. F ig u r e 9.
P owe r Dr a in
In pu t C u r r e n t (P in s 6, 7) v s . v s .
Te mpe r a tu r e V
SUP P L Y
F ig u r e 1 0. F ig u r e 1 1 .
Ou tpu t Sa tu r a tion V ol ta g e v s . Non l in e a r ity Er r or , P r e cis ion
I
OUT
(P in 3 ) F - to- V C on v e r te r (F ig u r e 1 9)
F ig u r e 1 2 . F ig u r e 1 3 .
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A P P L IC A TIONS INF ORM A TION
P RINC IP L ES OF OP ERA TION
The LM231/331 are monolithic circuits designed for accuracy and versatile operation when applied as voltage-to-
frequency (V-to-F) converters or as frequency-to-voltage (F-to-V) converters. A simplified block diagram of the
LM231/331 is shown in Figure 14 and consists of a switched current source, input comparator, and 1-shot timer.
F ig u r e 1 4. Simpl ifie d Bl ock Dia g r a m of Sta n d- A l on e
V ol ta g e - to- F r e q u e n cy C on v e r te r a n d
Exte r n a l C ompon e n ts
Simpl ifie d V ol ta g e - to- F r e q u e n cy C on v e r te r
The operation of these blocks is best understood by going through the operating cycle of the basic V-to-F
converter, Figure 14, which consists of the simplified block diagram of the LM231/331 and the various resistors
and capacitors connected to it.
The voltage comparator compares a positive input voltage, V1, at pin 7 to the voltage, V
x
, at pin 6. If V1 is
greater, the comparator will trigger the 1-shot timer. The output of the timer will turn ON both the frequency
output transistor and the switched current source for a period t=1.1 R
t
C
t
. During this period, the current i will flow
out of the switched current source and provide a fixed amount of charge, Q = i t, into the capacitor, C
L
. This will
normally charge V
x
up to a higher level than V1. At the end of the timing period, the current i will turn OFF, and
the timer will reset itself.
Now there is no current flowing from pin 1, and the capacitor C
L
will be gradually discharged by R
L
until V
x
falls
to the level of V1. Then the comparator will trigger the timer and start another cycle.
The current flowing into C
L
is exactly I
AVE
= i (1.1R
t
C
t
) f, and the current flowing out of C
L
is exactly V
x
/R
L

V
IN
/R
L
. If V
IN
is doubled, the frequency will double to maintain this balance. Even a simple V-to-F converter can
provide a frequency precisely proportional to its input voltage over a wide range of frequencies.
De ta il of Ope r a tion , F u n ction a l Bl ock Dia g r a m
The block diagram (FUNCTIONAL BLOCK DIAGRAM) shows a band gap reference which provides a stable 1.9
V
DC
output. This 1.9 V
DC
is well regulated over a V
S
range of 3.9V to 40V. It also has a flat, low temperature
coefficient, and typically changes less than % over a 100C temperature change.
The current pump circuit forces the voltage at pin 2 to be at 1.9V, and causes a current i=1.90V/R
S
to flow. For
R
s
=14k, i=135 A. The precision current reflector provides a current equal to i to the current switch. The current
switch switches the current to pin 1 or to ground, depending upon the state of the R
S
flip-flop.
The timing function consists of an R
S
flip-flop and a timer comparator connected to the external R
t
C
t
network.
When the input comparator detects a voltage at pin 7 higher than pin 6, it sets the R
S
flip-flop which turns ON the
current switch and the output driver transistor. When the voltage at pin 5 rises to V
CC
, the timer comparator
causes the R
S
flip-flop to reset. The reset transistor is then turned ON and the current switch is turned OFF.
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However, if the input comparator still detects pin 7 higher than pin 6 when pin 5 crosses V
CC
, the flip-flop will
not be reset, and the current at pin 1 will continue to flow, trying to make the voltage at pin 6 higher than pin 7.
This condition will usually apply under start-up conditions or in the case of an overload voltage at signal input.
During this sort of overload the output frequency will be 0. As soon as the signal is restored to the working range,
the output frequency will be resumed.
The output driver transistor acts to saturate pin 3 with an ON resistance of about 50. In case of over voltage,
the output current is actively limited to less than 50 mA.
The voltage at pin 2 is regulated at 1.90 V
DC
for all values of i between 10 A to 500 A. It can be used as a
voltage reference for other components, but care must be taken to ensure that current is not taken from it which
could reduce the accuracy of the converter.
Ba s ic V ol ta g e - to- F r e q u e n cy C on v e r te r (F ig u r e 1 5)
The simple stand-alone V-to-F converter shown in Figure 15 includes all the basic circuitry of Figure 14 plus a
few components for improved performance.
A resistor, R
IN
=100 k 10%, has been added in the path to pin 7, so that the bias current at pin 7 (80 nA
typical) will cancel the effect of the bias current at pin 6 and help provide minimum frequency offset.
The resistance R
S
at pin 2 is made up of a 12 k fixed resistor plus a 5 k (cermet, preferably) gain adjust
rheostat. The function of this adjustment is to trim out the gain tolerance of the LM231/331, and the tolerance of
R
t
, R
L
and C
t
.
For best results, all the components should be stable low-temperature-coefficient components, such as metal-film
resistors. The capacitor should have low dielectric absorption; depending on the temperature characteristics
desired, NPO ceramic, polystyrene, Teflon or polypropylene are best suited.
A capacitor C
IN
is added from pin 7 to ground to act as a filter for V
IN
. A value of 0.01 F to 0.1 F will be
adequate in most cases; however, in cases where better filtering is required, a 1 F capacitor can be used.
When the RC time constants are matched at pin 6 and pin 7, a voltage step at V
IN
will cause a step change in
f
OUT
. If C
IN
is much less than C
L
, a step at V
IN
may cause f
OUT
to stop momentarily.
A 47 resistor, in series with the 1 F C
L
, provides hysteresis, which helps the input comparator provide the
excellent linearity.
*Use stable components with low temperature coefficients. See APPLICATIONS INFORMATION.
**0.1F or 1F, See PRINCIPLES OF OPERATION.
F ig u r e 1 5. Simpl e Sta n d- A l on e V - to- F C on v e r te r
with 0.03 % Ty pica l L in e a r ity (f = 1 0 Hz to 1 1 kHz)
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Details of Operation: Precision V-To-F Converter (Figure 16)
In this circuit, integration is performed by using a conventional operational amplifier and feedback capacitor, C
F
.
When the integrator's output crosses the nominal threshold level at pin 6 of the LM231/331, the timing cycle is
initiated.
The average current fed into the op-amp's summing point (pin 2) is i (1.1 R
t
C
t
) f which is perfectly balanced
with V
IN
/R
IN
. In this circuit, the voltage offset of the LM231/331 input comparator does not affect the offset or
accuracy of the V-to-F converter as it does in the stand-alone V-to-F converter; nor does the LM231/331 bias
current or offset current. Instead, the offset voltage and offset current of the operational amplifier are the only
limits on how small the signal can be accurately converted. Since op-amps with voltage offset well below 1 mV
and offset currents well below 2 nA are available at low cost, this circuit is recommended for best accuracy for
small signals. This circuit also responds immediately to any change of input signal (which a stand-alone circuit
does not) so that the output frequency will be an accurate representation of V
IN
, as quickly as 2 output pulses'
spacing can be measured.
In the precision mode, excellent linearity is obtained because the current source (pin 1) is always at ground
potential and that voltage does not vary with V
IN
or f
OUT
. (In the stand-alone V-to-F converter, a major cause of
non-linearity is the output impedance at pin 1 which causes i to change as a function of V
IN
).
The circuit of Figure 17 operates in the same way as Figure 16, but with the necessary changes for high speed
operation.
*Use stable components with low temperature coefficients. See APPLICATIONS INFORMATION.
**This resistor can be 5 k or 10 k for V
S
=8V to 22V, but must be 10 k for V
S
=4.5V to 8V.
***Use low offset voltage and low offset current op-amps for A1: recommended type LF411A
F ig u r e 1 6. Sta n da r d Te s t C ir cu it a n d A ppl ica tion s C ir cu it, P r e cis ion V ol ta g e - to- F r e q u e n cy C on v e r te r
DETA IL S OF OP ERA TION: F - to- V C ONV ERTERS
(F ig u r e 1 8 a n d F ig u r e 1 9)
In these applications, a pulse input at f
IN
is differentiated by a C-R network and the negative-going edge at pin 6
causes the input comparator to trigger the timer circuit. Just as with a V-to-F converter, the average current
flowing out of pin 1 is I
AVERAGE
= i (1.1 R
t
C
t
) f.
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In the simple circuit of Figure 18, this current is filtered in the network R
L
= 100 k and 1 F. The ripple will be
less than 10 mV peak, but the response will be slow, with a 0.1 second time constant, and settling of 0.7 second
to 0.1% accuracy.
In the precision circuit, an operational amplifier provides a buffered output and also acts as a 2-pole filter. The
ripple will be less than 5 mV peak for all frequencies above 1 kHz, and the response time will be much quicker
than in Figure 18. However, for input frequencies below 200 Hz, this circuit will have worse ripple than Figure 18.
The engineering of the filter time-constants to get adequate response and small enough ripple simply requires a
study of the compromises to be made. Inherently, V-to-F converter response can be fast, but F-to-V response
can not.
*Use stable components with low temperature coefficients.
See APPLICATIONS INFORMATION.
**This resistor can be 5 k or 10 k for V
S
=8V to 22V, but must be 10 k for V
S
=4.5V to 8V.
***Use low offset voltage and low offset current op-amps for A1: recommended types LF411A or LF356.
F ig u r e 1 7. P r e cis ion V ol ta g e - to- F r e q u e n cy C on v e r te r ,
1 00 kHz F u l l - Sca l e , 0.03 % Non - L in e a r ity
*Use stable components with low temperature coefficients.
F ig u r e 1 8. Simpl e F r e q u e n cy - to- V ol ta g e C on v e r te r ,
1 0 kHz F u l l - Sca l e , 0.06% Non - L in e a r ity
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*Use stable components with low temperature coefficients.
F ig u r e 1 9. P r e cis ion F r e q u e n cy - to- V ol ta g e C on v e r te r ,
1 0 kHz F u l l - Sca l e with 2 - P ol e F il te r , 0.01 %
Non - L in e a r ity M a ximu m
*L14F-1, L14G-1 or L14H-1, photo transistor (General Electric Co.) or similar
F ig u r e 2 0. L ig ht In te n s ity to F r e q u e n cy C on v e r te r
F ig u r e 2 1 . Te mpe r a tu r e to F r e q u e n cy C on v e r te r
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F ig u r e 2 2 . L on g - Te r m Dig ita l In te g r a tor Us in g V F C
F ig u r e 2 3 . Ba s ic A n a l og - to- Dig ita l C on v e r te r Us in g
V ol ta g e - to- F r e q u e n cy C on v e r te r
F ig u r e 2 4. A n a l og - to- Dig ita l C on v e r te r with M icr opr oce s s or
F ig u r e 2 5. Re mote V ol ta g e - to- F r e q u e n cy C on v e r te r with 2 - Wir e Tr a n s mitte r a n d Re ce iv e r
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F ig u r e 2 6. V ol ta g e - to- F r e q u e n cy C on v e r te r with Sq u a r e - Wa v e Ou tpu t Us in g 2 F l ip- F l op
F ig u r e 2 7. V ol ta g e - to- F r e q u e n cy C on v e r te r with Is ol a tor s
F ig u r e 2 8. V ol ta g e - to- F r e q u e n cy C on v e r te r with Is ol a tor s
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F ig u r e 2 9. V ol ta g e - to- F r e q u e n cy C on v e r te r with Is ol a tor s
F ig u r e 3 0. V ol ta g e - to- F r e q u e n cy C on v e r te r with Is ol a tor s
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Sche ma tic Dia g r a m
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REV ISION HISTORY
C ha n g e s fr om Re v is ion A (M a r ch 2 01 3 ) to Re v is ion B P a g e
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PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (C) Top-Side Markings
(4)
Samples
LM231AN ACTIVE PDIP P 8 40 TBD Call TI Call TI -25 to 85 LM
231AN
LM231AN/NOPB ACTIVE PDIP P 8 40 Green (RoHS
& no Sb/Br)
CU SN Level-1-NA-UNLIM -25 to 85 LM
231AN
LM231N ACTIVE PDIP P 8 40 TBD Call TI Call TI -25 to 85 LM
231N
LM231N/NOPB ACTIVE PDIP P 8 40 Green (RoHS
& no Sb/Br)
CU SN Level-1-NA-UNLIM -25 to 85 LM
231N
LM331AN ACTIVE PDIP P 8 40 TBD Call TI Call TI LM
331AN
LM331AN/NOPB ACTIVE PDIP P 8 40 Green (RoHS
& no Sb/Br)
CU SN Level-1-NA-UNLIM LM
331AN
LM331N ACTIVE PDIP P 8 40 TBD Call TI Call TI 0 to 70 LM
331N
LM331N/NOPB ACTIVE PDIP P 8 40 Green (RoHS
& no Sb/Br)
Call TI Level-1-NA-UNLIM 0 to 70 LM
331N
RC4151NB ACTIVE PDIP P 8 40 TBD Call TI Call TI 0 to 70 LM
331N
RV4151NB ACTIVE PDIP P 8 40 TBD Call TI Call TI -25 to 85 LM
231N

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 11-Apr-2013
Addendum-Page 2

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

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