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United States Patent: Lay Et Al. Mar. 11, 2003

The patent describes a simplified method for fabricating a thin film transistor (TFT) flat panel display using only four mask steps: (1) patterning the gate layer, (2) defining the passivation and etching stopper layers, (3) forming the source and drain layers, and (4) forming the pixel electrode. This reduces the number of mask steps compared to prior art methods and simplifies the fabrication process for TFT flat panel displays.

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0% found this document useful (0 votes)
65 views25 pages

United States Patent: Lay Et Al. Mar. 11, 2003

The patent describes a simplified method for fabricating a thin film transistor (TFT) flat panel display using only four mask steps: (1) patterning the gate layer, (2) defining the passivation and etching stopper layers, (3) forming the source and drain layers, and (4) forming the pixel electrode. This reduces the number of mask steps compared to prior art methods and simplifies the fabrication process for TFT flat panel displays.

Uploaded by

pmurph
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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US006531330B2

(12) United States Patent


Lay et al.

(54)

METHOD OF FABRICATING THIN FILM


TRANSISTOR FLAT PANEL DISPLAY

(10) Patent N0.:


(45) Date of Patent:

(56)

US 6,531,330 B2
Mar. 11, 2003

References Cited
U.S. PATENT DOCUMENTS

(75) Inventors: Chung-Wen Lay, Taipei (TW);

Meng-Yueh Wu, Hsinchu (TW)

(73) Assignee: AU Optronics Corp., Hsinchu (TW)


(*)

Notice:

6,372,535 B1 *
2002/0121639 A1 *

4/2002 Lyu
9/2002 S0 et al.

* cited by examiner

Subject to any disclaimer, the term of this


patent is extended or adjusted under 35

Primary ExaminerJohn F. Niebling

U.S.C. 154(b) by 0 days.

Assistant ExaminerStanetta Isaac

(74) Attorney, Agent, or FirmLadas & Parry

(21) Appl. No.: 10/200,831


Jul. 22, 2002
(22) Filed:
Prior Publication Data
(65)

(57)

A method of fabricating a thin ?lm transistor (TFT) ?at

panel display. The method merely comprises four mask steps


of: (1) using the ?rst mask process for patterning the ?rst

US 2003/0017636 A1 Jan. 23, 2003

(30)
Jul.

conductive layer/gate insulating layer/amorphous silicon

Foreign Application Priority Data


23, 2001

ABSTRACT

..................................... .. 90117932 A

(51)
(52)

Int. Cl.7 .............................................. .. H01L 21/00

(58)

Field of Search ........................ .. 438/30, 149, 151,

US. Cl. ....................... .. 438/30; 438/149; 438/151;

438/479; 438/517
438/479, 517

layer of the TFT, (2) using the second mask process for

de?ning the passivation layer and the etching stopper, (3)


using the third mask process for forming the Source/Drain,
and (4) using the fourth mask process for forming the pixel
electrode, Whereby simplifying the fabricating process of the

TFT ?at panel display.


12 Claims, 19 Drawing Sheets

ll

DLp

/
103

101
102

~~100

103

101
102

U.S. Patent

Mar. 11,2003

Sheet 1 0f 19

US 6,531,330 B2

3
1

FIG. 1A ( PRIOR ART )


5 2
40
IIIIIII

\\\\\\\\\\\\\ W .\\\\\\\\\\\\~ 3
~~1

FIG. 1B ( PRIOR ART )


2

6 40

W/////////1

~~3
~~1

FIG. 1C ( PRIOR ART )


2

7,8

6 40

7,8

\ I

WKWQ

FIG. 1D ( PRIOR ART )

~9

W3

U.S. Patent

Mar. 11,2003

Sheet 2 0f 19

US 6,531,330 B2

DLg

L'----

evDL

FIG.2A

DLg
opl 0p2

DL

'LLjl'JL
BL B

'

\JDL

5%
0p3

FIG. 2B

U.S. Patent

Mar. 11,2003

Sheet 3 0f 19

FIG. 2D

US 6,531,330 B2

U.S. Patent

Mar. 11,2003

Sheet 4 0f 19

11

US 6,531,330 B2

fDLp

fDLg

1 \

/ / \

1 ( 101\

@400

1 ( 101\

103

103

102

102

FIG. 3A

11

0P3

104

111

//\

f//\

I(\

104

K/(\
DLg

103

101

102

103 101
102

#03104

@100

U.S. Patent

Mar. 11,2003

Sheet 5 0f 19

II

0p3

1
/

104g

\
1 1

104 (IS)

I I

"?g/3|
'
'

1 102( 1

101

~\./105

1\
/ 11

11
103

US 6,531,330 B2

@9104

T/ /\

K1 102( 1

104

103

~100

101

DLg

FIG. 3C

11

110107

1513
101111
107-

103
1

S\
1 1 /D
106dm1 [22227
/102 IILW'L ' 1 '
106105
I

/ 11

1 1

7 //\

) 1

104

k\ 1 102( 1

101

DLp

103

DLg

101

~V104

~~100

U.S. Patent

Mar. 11,2003

Sheet 6 0f 19

US 6,531,330 B2

FIG. 4A

11

0P3

104

i KDLp
202

202

opl ) /0p2
202

i
104*

'- ~202

1'1

I ( 101\

103

102

104

/W

~V104

~~100

f ( \

103 101
102

DLg

U.S. Patent

Mar. 11,2003

Sheet 7 0f 19

II

US 6,531,330 B2

0p3

IS

>DLp

106

106

104

104
100

DLg

FIG. 4C

FIG. 4D

U.S. Patent

Mar. 11,2003

Sheet 8 0f 19

US 6,531,330 B2

Dig
B

DL

f B.

*i-____m?______i

i-ui

gym

FIG.5A

DLg
opl 0p2

DL

lili

BL

|_ _J
0p3

FIG. 5B

U.S. Patent

Mar. 11,2003

Sheet 9 0f 19

FIG. 5C

US 6,531,330 B2

U.S. Patent

Mar. 11,2003

Sheet 10 0f 19

US 6,531,330 B2

f-DLp

f DLg
1 1

/ /\

/ / \

I ( 101\

/ (

103

103

102

102

FIG. 6A

II

0P3

104

101

~100

U.S. Patent

Mar. 11,2003

Sheet 11 0f 19

11

0P3
,

US 6,531,330 B2

104

l KDLP

106J/

105d/

N106
1

1
104-I

105

/ 1

I ( 101\

7 / /\

103

12,104

~100

I ( \

104

103 101
102

102

DLg

FIG. 6C

11

107

104

103

103

102 \

106105

102

|\][l

107

2
V A

Quinn;

106105
W

11

\ K

T/ \

) 1

104

K! ( \

101

DLp

103 101
102

DLlg

104

~~100

U.S. Patent

Mar. 11,2003

Sheet 12 0f 19

Dig:

DL

f B.

US 6,531,330 B2

'

Al ____ ____L__t

i?-i

ML

__l

FIG. 7A

DLg
0p10p2

DL

iiili
B i B.

'

Km

+1
FIG. 7B

U.S. Patent

Mar. 11,2003

Sheet 14 0f 19

/ /\
103

US 6,531,330 B2

101

103

102

V100

101
102

FIG. 8A

11

0P3

104g

104

f / /\

k103I ( 101\

/ ( 10]\

103

\h

104

I02

102

DLg

"@104

~w~100

U.S. Patent

Mar. 11,2003

104VJ// /\\1

Sheet 15 0f 19

US 6,531,330 B2

1 102( 101\

103

7/

K1103102( 101\

104

DLg

FIG.8C

II

FIG. 8D

~~104

U.S. Patent

Mar. 11,2003

Sheet 16 0f 19

US 6,531,330 B2

DLg
DLp

4-\/DL

FIG. 9A

SL\'

0p1 0p2

0 0

FIG. 9B

U.S. Patent

Mar. 11,2003

Sheet 18 0f 19

/ DLp

US 6,531,330 B2

DLg \

FIG. 10A

106
r II.

III]

? SL

2'4

1 )

,6

'/

71:

1 1

\_/106

M104

"'4

\ / //103 ( 101\ 100(

104104

104

D'Lg

FIG. 10B

102

U.S. Patent

Mar. 11,2003

Sheet 19 0f 19

11

US 6,531,330 B2

S107(T2)

103 103 limlios


1%
/\
/ 104
\
106

SL

305

1 J 1 /\ H 7//\
1 (1
/ \ W 103l 101\
101
106106104106
DLp

104

104

DLg

FIG. 10C

102

1
(
100

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