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OVERVIEW OF PROGRAMMING 8085
OBJECTIVES
1. To explain the architecture of the 8085.
2. To explain the classification of the instructions of the 8085.
3. To define the various addressing mode in the 8085 instruction set.
1.1
INTRODUCTION
INTEL 8085A is a general purpose 8-bit Microprocessor capable of
addressing 64KB of memory. It is an enhanced version of its predecessor,
the 8080A and its instruction set is upward compatible with that of the
8080A.
The Microprocessor has a set of instructions designed internally, to
manipulate data and communicate with peripherals. It can be
programmed to perform functions on given data by selecting necessary
instructions from its set.
The internal architecture of the 8085A determines how and what
operations can be performed with the data. To perform any operation, the
microprocessor requires registers, an Arithmetic Logic Unit (ALU) and
Control Logic and internal buses. Certain registers of the processor can
be written into and hence are available for manipulation or processing of
input data. Use of certain write instructions makes this feasible. To know
more about the features of the processor let us take a look into the
internal architecture of the 8085A. (Figure F1.1).
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Figure 1.1
ACCUMULATOR
The accumulator is the primary source and destination for one operand
and two operand instructions. For example, all data transfers between the
CPU and I/O devices are performed through the accumulator. In addition,
many memory reference instructions move data between the accumulator
and memory than between any other register and memory. All Arithmetic
and Boolean instructions take one of the operands from the accumulator
and return the result to the accumulator. So the accumulator should be
loaded before any arithmetic or boolean operation.
REGISTERS
Apart from the accumulator we have got other registers such as B, C, D,
E, H and L. These are called secondary registers. Data stored in any of
these six registers may be accessed with equal ease. Such data can be
moved to any other registers or can be used as the second operand in two
operand instructions. These six registers can be used to hold 8-bit data
when used individually or 16-bit data when used in pair as BC or DE or
HL.
Registers H and L comprise the primary data pointer for 8085A.
Normally, these two registers will be used to hold the 16-bit memory
address of data being accessed. It is usually called Memory Pointer. We
can transfer data between any specified register and memory location
addressed by H and L. It is good to address data memory via registers H
and L, whenever possible because it can make your program more
efficient and easy to relocate.
FLAGS
The ALU consists of five flip-flops that are set or reset according to data
conditions in the Accumulator and other registers. The Microprocessor
uses them to test for data conditions. The five flip-flops, referred to as
flags, are the Carry flag (C), the Zero flag (Z), the Sign flag (S), the Parity
flag (P) and the Auxiliary Carry flag (AC).
PROGRAM COUNTER (PC)
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This register deals with sequencing the execution of instructions. The
function of the PC is to point to the memory location from which the next
byte is to be fetched for execution.
STACK POINTER (SP)
The Stack Pointer Register is also 16-bit and is used as a memory pointer.
It points to a memory location in RAM memory, called the STACK. The
beginning of the stack is defined by the user.
1.2
8085A INSTRUCTION CLASSIFICATION
The function of a microprocessor system is implemented by a sequence of
data transfers between memory, processor and I/O devices and data
transformations that occur in the registers within the microprocessor,
manipulating a register under program control, addressing it and using it
for data transfer and transformation requires a set of binary codes which
comprise the
INSTRUCTION SET OF A MICROPROCESSOR.
The 8085A instructions can be classified into the following five functional
categories.
i.
Data transfer (copy) operations,
ii.
Arithmetic operations,
iii.
Logical operations
iv.
Branching operations and
v.
Machine-control operations.
Since data and instructions may reside anywhere in internal registers,
external registers or memory, locating them requires a particular
addressing. The instructions in these five functional groups can be
categorized according to their method of addressing the hardware
registers and memory. This method is called the ADDRESSING MODE
and six modes are available with 8085A which are explained in detail
here,
i.
Implied addressing
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ii.
Register addressing
iii.
Immediate addressing
iv.
Direct addressing
v.
Register indirect addressing
vi.
Combined addressing.
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i. IMPLIED ADDRESSING
The instructions using this mode have no explicit operands.
include
Examples
STC (Set Carry Flag)
DAA (Decimal Adjust Accumulator)
ii. REGISTER ADDRESSING
This mode specifies the register or register pair that contains data. Both
the source and the destination operand are registers.
MOV B, C
Moves the contents of register C to register B.
iii.IMMEDIATE ADDRESSING
For an 8 - bit data, this mode uses 2 bytes, with the first byte as the OP
code, followed by 1 byte of data. On the other hand, for 16-bit data, this
instruction contains 3 bytes, with the first byte as the OP code followed
by 2 bytes of data. For example,
MVI B, 05
loads register B with the value 5 and
LXI H, 2050
loads H with 20 and L with 50.
iv. DIRECT ADDRESSING
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Instructions using this mode specify the effective address as a part of
instruction. These instructions contain 3 bytes, with the first byte as
OP code followed by 2 bytes of address of data (the low-order byte of
address in byte 2, the higher-order byte of the address in byte
Consider.
the
the
the
3).
LDA 2035.
This instruction loads accumulator with the contents of memory location
2035. This mode is also called the absolute mode.
v. REGISTER INDIRECT ADDRESSING
This mode contains a register pair which stores the address of data ( the
higher-order byte of the address in the first register of the pair, and loworder byte in the second). As an example,
LDAX B
loads the accumulator with the contents of a memory location addressed
by B and C register pair.
vi. COMBINED ADDRESSING MODES
Some instructions use a combination of addressing modes. A CALL
instruction, for example, combines direct addressing and register indirect
addressing. The direct address in a CALL instruction specifies the address of
the desired subroutines; the register indirect address is that of stack pointer.
The CALL instruction pushes the current contents of the program counter
into the memory location specified by the stack pointer. The address that
follows the CALL instruction is copied to PC and hence execution starts at
the address of the subroutine.
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MODULE 1
EXPERIMENTS ON DATA TRANSFER
OPERATIONS & FLAG OPERATIONS
OBJECTIVES
1.
To illustrate
operations.
2.
various
addressing
modes
using
data
transfer
To demonstrate flag manipulation and control.
NOTE
1.
All addresses and data are in hex-form unless otherwise specified.
2.
Flow charts are given wherever it is necessary.
The following are the symbols that are used in the forthcoming
explanations.
(X)
- Contents of X.
X can be memory location or any valid
Register of 8085A.
LSB
- Least Significant Bit.
MSB
- Most Significant Bit.
LSD
- Least Significant Digit (Byte).
MSD
- Most Significant Digit (Byte).
LN
- Lower Nibble.
HN
- Higher Nibble.
B
- Binary.
H
- Hex.
D
- Decimal.
(X)4>(Y
)
- Contents of X is copied to Y.
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PROGRAM 1
ADDRESSING
IMMEDIATE,
DIRECT
&
REGISTER
OBJECTIVE : To initialise the Accumulator and the general purpose
registers to specific values using either Immediate or Direct addressing
mode.
THEORY
: To initialise a register, using immediate addressing, the
data is held by the instruction itself. In the case of Direct addressing, the
data is held in memory locations. Using these two addressing modes, let
us see how data transfer can be achieved between registers and memory.
EXERCISE
To initialise data to registers as shown.
(A) = 23, (B) = 50, (C) = 1A, (D) = 63, (E) = FE, (H) = 76, (L) =
AC
PROGRAM
; Load BC with immediate data
LXI B,501A of
; 501A. (B) = 50, (C) = 1A
LDA 4150
; Load A with direct data of FE.
MOV E,A
; (E) = FE
LDA 4151
; Load A with direct data of 63
MOV D,A
; (D) = 63
MVI A,23
; (A) = 23
; Load Immediate data of 76AC
LXI H,76AC to HL
;Pair. (H) = 76, (L) = AC.
HLT
OBJECT CODES
Memory
address
Opcodes
4100
01
4101
1A
4102
50
4103
3A
Mnemonics
LXI
B, 501A
LDA
4150
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4104
50
4105
41
4106
5F
MOV
E, A
4107
3A
LDA
4151
4108
51
4109
41
410A
57
MOV
D, A
410B
3E
MVI
A, 23
410C
23
410D
21
410E
AC
410F
76
4110
76
LXI H, 76AC
HLT
PROCEDURE
1.
Key in the opcodes from the address shown into the trainer.
2.
Enter data at 4150 and 4151.
3.
Single step the program and check the register contents at every
point.
4.
Ensure that the registers contain the data as specified.
DISCUSSION
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PROGRAM 2 - REGISTER INDIRECT ADDRESSING
OBJECTIVE
Using Register Indirect Addressing for loading and storing data.
THEORY
The 16-Bit register pairs BC, DE and HL can be used for Register Indirect
addressing purposes. Initialisation of these register pairs must be done
before using them to load or store data.
EXERCISE:
location 4160.
To load from memory location 4150 and store at
Data
: (4150) = 29
Result
: (4160) = 29
PROGRA
M
LXI
H,4150
LXI
D,4160
MOV
STAX
HLT
A,M
D
; Initialise HL as memory pointer for source.
; Initialise DE as memory pointer for
destination.
; (4150)
=>
(A)
; (A)=> (4160)
OBJECT CODES
Memory
address
4100
Opcodes
21
4101
50
4102
41
4103
11
4104
60
4105
41
4106
4107
Mnemonics
LXI
H,4150
LXI
D,4160
7E
MOV
A, M
12
STAX D
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76
HLT
PROCEDURE
1. Key in the opcodes from the address specified.
2. Enter data at 4150.
3. Execute the program and check for result at 4160.
DISCUSSION
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PROGRAM 3 - DIRECT ADDRESSING (16-BIT)
OBJECTIVE
To load and store 16-bit data using direct addressing.
THEORY
16-bit loading of data using direct addressing is supported only by the HL
pair. But DE pair can also be loaded with 16-bit data from HL register
using the XCHG (Exchange HL with DE) instruction.
EXAMPLE
Data
:
(4150) = 99
(4151) = 77 (DE)
= 005B
Result : (4160) = 5B
(4161) = 00
PROGRAM
D,
005B
LXI
LHL
D
4150
XCH
G
SHL
D
4160
; Initialise (D)=00, (E)=5B
; Load direct data 9977 to HL.
;
(4150) => (L) = 99
;
(4151) => (H) = 77
; (D) = 77 (H) = 00
; (E) = 99 (L) = 5B
; Store direct data from HL to
memory
; (L) => (4160) = 5B
; (H) => (4161) = 00
HLT
OBJECT CODES
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Memory address
Opcodes
Mnemonics
4100
11
4101
5B
4102
00
4103
2A
4104
50
4105
41
4106
EB
XCHG
4107
22
SHLD
4108
60
4109
41
410A
76
LXI
D, 005B
LHLD
4150
4160
HLT
PROCEDURE
1.
Enter the opcodes from the address specified.
2.
Enter the data at 4150 and 4151.
3.
Execute the program and check for results at 4160.
DISCUSSION
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PROGRAM 4 - FLAG OPERATIONS:
OBJECTIVE
To manipulate the carry ( C ), Zero (Z), sign (S0 and parity (P) flags and to
determine the conditions that set and reset these flags.
THEORY
Conditional jump instructions give the computer the power to make
decisions based upon data or computed results. The flags always monitor the
accumulator and registers and signal the presence of a specific condition. A
profound knowledge of the role of flag register, the instructions that affect
them, is necessary to enhance your ability as a programmer. The flag
register of 8085A is as follows.
76
AC
C
1
wher
e,
S
Sign
- Flag:
Zero
- Flag:
AC
Auxiliary carry
- flag:
Parity
- Flag:
Carry
- Flag:
Acquires the value of the most significant bit of
the result
following the execution of any BCD or Boolean
instruction.
It is set to 1 whenever any Arithmetic or
Boolean operation
generates 0 result. Reset if result
is non zero.
Holds any carry from bit 3 to 4 resulting from
an arithmetic
operatio
n.
Set if the result of an Arithmetic or Boolean
operatio produces
a result which contains an even number of 1
bits. Cleared if
there is odd number of 1
bits.
Holds carry out of the most significant bit in
any arithmetic
operatio
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n.
In the example given below, you will be testing the status of S, Z, C and P
flags which lead to conditional jumps, calls and returns. This program is a
do nothing program. Each instruction sets and resets flags which can
be monitored separately using the sihgle step command.
PROGRAM:
NOP
MVI
ADI
ANI
ORI
ADI
RAL
XRA
HLT
A,05
FF
F4
14
90
A
OBJECT CODES
Memory
address
Opcodes
Mnemonics
4100
00
NOP
4101
3E
MVI
A, 05
4102
05
4103
C6
ADI
FF
4104
FF
4105
E6
ANI
F4
4106
F4
4107
F6
ORI
14
4108
14
4109
C6
ADI
90
410A
90
410B
17
RAL
410C
AF
XRA
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410D
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76
HLT
PROCEDURE
1.
Key in the opcodes in the trainer from the address 4100.
2.
Only by single-stepping through the program, you can view the Flag
status corresponding to individual instructions.
3.
The first instruction is a "NOP". Its primary function is to make you
see the first instruction before it is executed (Remember that only after
executing the first instruction, the STEP command will wait).
4.
Press the STEP key when prompted for entry.
5.
Enter the address 4100 and press NEXT.
6.
Now, the NOP would have been executed and the display shows the
address from where the program actually starts. Record this address in
the table.
7.
Press INT to display command prompt.
8.
Press REG key.
9.
Press 4 for Flag Register Key.
10.
Note down the value in hex in its equivalent binary form in the table
given below.
11.
Press INT to come back to prompt.
12.
Press STEP key followed by NEXT.
13.
Now the next instruction is executed and the flags are updated
accordingly.
14.
Repeat the same from step (vii) and record the values of Flag register
after each operation.
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15.
Repeat until the address 410D is displayed when STEP key is
pressed.
Mnemoni
Step
c
No.
Flag
Register
Executed
S
1.
2.
3.
4.
5.
6.
7.
8.
9.
Progra
m
AC
- P
- C
Counter
Content
s
NOP
MVI A, 05
ADI FF
ANI F4
ORI 14
ADI 90
RAL
XRA A
HLT
DISCUSSION
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MODULE 1 - POST LAB EXERCISES
1.
What are the instructions that always set the Auxiliary Carry Flag
to 1 ?
2.
What does the instruction CMC do? Will Carry Flag be set to 1 or 0
after the execution of the instruction CMC ?
3.
Will the rotate instruction affect both Carry and Auxiliary Carry
Flag ?
4.
Will the Parity Flag be set if the number of zeroes is even in a
number ?
5.
Assume B and C contain 2243. What is the status of flags if DCX B
is done? How to set the Zero flag during a 16-bit decrement?
6.
Do all Logical operations reset Carry Flag to zero ?
7.
Name the instructions that clear the Auxiliary Carry Flag to Zero ?
8.
Assume A to have a data of F5. Now, write the status of flags after
execution of the following instructions one by one and give reasons for
the same.
SUI FB
DAA
XRA A
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MODULE 2
ARITHMETIC AND LOGICAL OPERATIONS
This module deals with Arithmetic instructions that Add, Subtract,
Increment, Decrement data in registers or memory and Logical
instructions that AND, OR, XOR, Complement, Compare and Rotate data
in registers or between memory and registers.
PROGRAM 5 - 8 BIT ADDITION
OBJECTIVE
To add two 8 - bit numbers in memory and store the result in memory.
THEORY
The first data is brought to Accumulator A and the second one in any one
of the other registers, say B. The addition is done using ADD. The result is
then stored at 4152. The ADD instruction affects flags depending on
result.
The two data to be added are at 4150 and 4151. The result is stored at
4152.
Data
(4150=
:
)23
(4151=
)35
Resu
(4152=
lt
:
)58.
PROGRA
M
LDA
MOV
LDA
ADD
; (4150) => (A) =
4150 23
B,A ; (A) => (B)
; (4151) => (A) =
4151 35
B
; (A) + (B) => (A)
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; (A) => (4152)
4152 = 58
FLOW CHART
OBJECT CODES
Memory address
4100
Opcode
s
3A
Mnemonics
LDA
4150
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4101
50
4102
41
4103
47
MOV
B, A
4104
3A
LDA
4151
4105
51
4106
41
4107
80
ADD
4108
32
STA
4152
4109
52
410A
41
410B
76
HLT
PROCEDURE
1.
Key in the opcodes from the address specified.
2.
Enter data at 4150 and 4151 as specified in the Example.
3.
Execute the program and check for the result at 4152.
4.
Change data at 4150 and 4151 and execute each time and check for
result.
DISCUSSION
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PROGRAM 6 - 8 -BIT SUBTRACTION
OBJECTIVE
To subtract two 8-bit numbers in memory and to store the result also in
memory.
THEORY
In this experiment, the HL register pair is first initialised to the start
address of memory at which the data is stored. Then data is brought to
accumulator A and the other one is subtracted from memory itself. The
result from A is then stored into memory again using the HL register. The
SUB instruction sets and clears flags according to result.
Let the data to be subtracted be 24 from 49.
Data
: (4150) = 49
4151) = 24
Result :
(4152) = 25
FLOW CHART
PROGRA
M
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LXI
MOV
INX
SUB
INX
MOV
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; Initialise memory pointer to
H, 4150 4150
A, M
; (4150) => (A) = 49
H
; Point to next data.
M
; (4151) => (A)
H
; Point to next location.
M,A
; (A) => (4152)
;
OBJECT CODES
Memory
address
4100
Opcodes
21
4101
50
4102
41
4103
7E
MOV
A, M
4104
23
INX
4105
96
SUB
4106
23
INX
4107
77
MOV
M, A
4108
76
HLT
Mnemonics
LXI
H, 4150
PROCEDURE
1.
Key in the opcodes from the address specified.
2.
Enter data that is needed for execution at 4150 and 4151.
3.
Execute the program and check for results at 4152.
4.
Try changing data and check for results each time.
DISCUSSION
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PROGRAM 8- ONE'S COMPLEMENT
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OBJECTIVE
To find the One's Complement of the data at memory location 4150 and
store the result at 4151.
THEORY
In the One's complement of a binary number the ones are changed to
zeros and the zeros to ones. For example, the one's complement of
01010110
=B
10101001
=B
56
is
A9
The example given is to find the One's complement of 8F and store it in
memory location 4151. The number 8F is at memory location 4150.
1000
Data :(4150) =1111 B
Resu
0111
lt
:(4151) =0000 B
PROGRAM
LDA
CMA
STA
HLT
4150 ; (4150) => (A) = 8F
; One's Complement of A
4151 ; (A) => (4151) = 70
OBJECT CODES
Memory
address
4100
Opcodes
3A
Mnemonics
LDA
4150
4101
50
4102
41
4103
2F
CMA
4104
32
STA
4105
51
4106
41
4151
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4107
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HLT
PROCEDURE
1.
Key in the opcodes into memory from 4100.
2.
Enter data to be complemented at 4150.
3.
Execute the program and check for results.
4.
Try changing data at 4150 and execute the program each time,
and check results.
DISCUSSION
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PROGRAM 9 - LOGICAL OPERATIONS
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OBJECTIVE
To learn about logical instructions available with 8085A like AND, OR,
XOR, NOT.
THEORY
Logical operations, as you will know, form the major part of the
instruction set of any microprocessor. They are very useful for a varied
number of applications. As seen, from the previous examples, the AND,
NOT (Complement) and OR are already explained. The XOR is given here
as an example. The truth tables for the four logical operations are as
follows:
AND
OR
XOR
NOT
X Y Z
X Y Z
X Y Z
X Z
0 0
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0 0
0
0 0
0
0
1
0 1
0
1 0
1
0 1
1
1
0
1
0
0
0
1
1
1
0
1
Microprocessors & Microcontrollers Laboratory Manual
29
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
1
: 05
Roll No.: C5592
1
1
1
1
1
1
1
0
Where X, Y are two inputs, Z is the output.
EXAMPLE
The two numbers to be XORed are at memory locations 4150 and 4151
and the XORed result will be stored at 4152.
Data
:
(4150) = 43
(4151) = 64
Result
:
Microprocessors & Microcontrollers Laboratory Manual
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Class
: BE (SW) EEE
Name
AngsAnanth
Semester : 05
0100 0011B
Roll No.: C5592
0110 0100B (XOR)
----------
0010 0111B
(4152)
=
27.
PROGRAM
LDA
4150
;(4150) => (A)
MOV
B,A
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Class
: BE (SW) EEE
Name
AngsAnanth
Semester
;(A)
: 05
Roll No.: C5592
=> (B)
LDA
4151
;(4151) => (A)
XRA
B
;XOR two data.
STA
4152
;(A)
=> (4152)
HLT
OBJECT CODES
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Roll No.: C5592
Memory address
Opcodes
Mnemonics
4100
3A
LDA
4150
4101
50
4102
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Class
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41
4103
47
MOV
B, A
4104
3A
LDA
4151
4105
51
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Semester
4106
: 05
Roll No.: C5592
41
4107
A8
XRA
B
4108
32
STA
4152
4109
52
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Class
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410A
41
410B
76
HLT
PROCEDURE
Key in the opcodes from the address specified.
Enter data to be XORed at 4150 and 4151.
Execute the program and check for results at 4152.
Try changing data and check for results each time.
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Class
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AngsAnanth
Semester
: 05
Roll No.: C5592
DISCUSSION
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Class
: BE (SW) EEE
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AngsAnanth
Semester
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Roll No.: C5592
MODULE 2 - POST LAB EXERCISES
1.
Rewrite the above program to store a result that is greater than 8bits.
Sample program:
Data :
(4150) = FF
(4151) = FF
Result :
(4152) = FE
(4153) = 01
2.
Add the data 4A and 23 using Immediate addressing mode and
store result at 4150. Result : (4150) = 6D
3.
Do decimal addition of contents of 4150 & 4151 and store
result at 4152 & 4153. [Hint: Use DAA]
Sample problem:
Data
Result
4.
:(4150) = 99
(4151) = 99
99 + 99 =
: 198
(4152) = 98
(4153) = 01
Do 16-bit addition of two numbers at 4150 and 4152 and store
result at 4160.
Sample problem:
a. Data :(4150) =
(4151) =
(4152)=
(4153)=
Result
23
56
8A
10
:(4160)= AD
(4161)= 66
5623 + 108A =
66AD
b. Data :(4150)=
(4151)=
(4152)=
(4153)=
23
CD
CD
09
Result
:(4160)= F0
(4161)= D6
CD23 + 09CD = D6F0
Microprocessors & Microcontrollers Laboratory Manual
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Class
: BE (SW) EEE
Name
AngsAnanth
Semester
5.
: 05
Roll No.: C5592
Subtract 38 from 69 using immediate mode of addressing for
loading, subtract; store result at memory location 4150.
Result : (4150) = 31
6.
Subtract two decimal numbers at 4150 and 4151 and store result at
4152.
[HINT : Use DAA]
Sample problems:
a. Data
Result
b. Data
Result
7.
(4152
1
: (4150) = 29
)= 7
: (4151) = 12
29 - 17 =
12
: (4150) = 85
(4152
2
)= 6
: (4151) = 59
85 - 26 =
59
Find the two's complement of a number at memory location 4150
and store the result at 4151.
(Hint: Two's complement is one's complement plus one)
Sample problem:
Data : (4150) = 3E
Result : (4151) = C2
8.
Subtract two numbers using Two's complement and store the
result at 4152. (Hint: Find two's complement of one number and add with
the other)
Sample problem:
Data :
(4150) = 64
(4151) = 32
Result : (4152) = 32
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Class
: BE (SW) EEE
Name
AngsAnanth
Semester
9.
: 05
Roll No.: C5592
Find the two's complement of the 16-bit data at 4150 and 4151 and
store result at 4152 and 4153.
Sample problem:
Data :=
(4150)23
=
(4151)AC
Result :
(4152) = DD, (4153) = 53
Microprocessors & Microcontrollers Laboratory Manual
40
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
Roll No.: C5592
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