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Switches Gates

This document discusses basic digital logic concepts including switches, gates, truth tables and CMOS circuit implementations. It introduces binary switches and how connecting switches in series and parallel can implement the logical AND and OR functions. Truth tables are presented for these basic functions. The document also describes how NAND and NOR gates can be easily realized in CMOS circuits using complementary NMOS and PMOS transistors, and how more complex logic networks can be constructed by combining multiple gates.

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Pratyush Singh
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© © All Rights Reserved
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113 views17 pages

Switches Gates

This document discusses basic digital logic concepts including switches, gates, truth tables and CMOS circuit implementations. It introduces binary switches and how connecting switches in series and parallel can implement the logical AND and OR functions. Truth tables are presented for these basic functions. The document also describes how NAND and NOR gates can be easily realized in CMOS circuits using complementary NMOS and PMOS transistors, and how more complex logic networks can be constructed by combining multiple gates.

Uploaded by

Pratyush Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Lab Lecture 1

ibezzam@iitpkd.ac.in

8/2/2016

x = 0

x = 1
(a) Two states of a switch

S
x
(b) Symbol for a switch

Figure 2.1. A binary switch.

Battery

Light

(a) Simple connection to a battery

S
Power
supply

Light

(b) Using a ground connection as the return path

Figure 2.2. A light controlled by a switch.

0 Floating

Power
supply

x1

x2

Light

(a) The logical AND function (series connection)


S

0 Floating

x1
Power
supply

Light

x2
(b) The logical OR function (parallel connection)

Figure 2.3. Two basic functions.

Figure 2.6. A truth table for the AND and OR operations.

S
X1

Power
supply

S
X3

X2

Figure 2.4. A series-parallel connection.

Light

Figure 2.18. A three-variable function with 8 rows


How many rows will a 4-variable function Truth Table have?

x1
x2

x1
x2
x1 x2 xn

x1 x2
xn

(a) AND gates

x1
x2

x1
x2
x1 + x2 + + xn

x1 + x2

xn
(b) OR gates

Figure 2.8. The basic gates.

(c) NOT gate

x1
x2

0 01 1

1 1 0 0
A
0 0 0 1

0 10 1

(a) Network that implements


x1

x2

f ( x1 , x2 )

0
0
1
1

0
1
0
1

1
1
0
1

(b) Truth table


x1
x2
A
B
f

1 1 0 1

B
f = x 1 + x 1 x2
A

1
0
1
0
1
0
1
0
1
0

Time
(c) Timing diagram

x1
x2

0 0 1 1

1 1 0 0
1 1 0 1

0 1 0 1
(d) Network that implements

g = x 1 + x2

Figure 2.10. An example of logic networks.

VD

VD = 0 V

VD

VG

VS = 0 V

Closed switch
whenVG = VDD

Open switch
whenVG = 0 V

(a) NMOS transistor

VS = VDD

VDD

VDD

VD

VD

VD = VDD

VG

Open switch
whenVG = VDD

Closed switch
whenVG = 0 V

(b) PMOS transistor

Figure 3.4. NMOS and PMOS transistors in logic circuits.

VDD

T1

Vx

Vf
T2

T1 T2

0
1

on off
off on

1
0
Well defined 0 forced
to Ground and NOT floating

(a) Circuit

(b) Truth table and transistor states

NOT gate implemented with CMOS


(Complimentary NMOS & PMOS Transistors)

V DD

T1

T2
Vf

Vx

Vx

T3

T4

x1 x2

T1 T2 T3 T4

0
1
0
1

on on off off
on off off on
off on on off

1
1
1
0

0
0
1
1

off off on on

Well defined 0 forced


to Ground and NOT floating

(a) Circuit

(b) Truth table and transistor states

Figure 3.13. CMOS realization of a NAND gate.


BASIC GATE EASY TO REALIZE IN CMOS

V DD

Vx

T1

Vx

T2
Vf
T3

T4

x1 x2

T1 T2 T3 T4

0
1
0
1

on on off off
on off off on
off on on off

1
0
0
0

0
0
1
1

off off on on

Well defined 0 s forced


to Ground and NOT floating

(a) Circuit

(b) Truth table and transistor states

Figure 3.14. CMOS realization of a NOR gate.


BASIC GATE EASY TO REALIZE IN CMOS

V DD

V DD

Vf
Vx

Vx

Figure 3.15. CMOS realization of an AND gate.


2 more Transistors than NAND

(a) Dual-inline package

VDD

Gnd

(b) Structure of 7404 chip

Figure 3.21. A 7400-series chip.

VDD

7404

7408

x1
x2
x3

7432

f
Figure 3.22. Physical pin diagrams schematics of An implementation of
f = x1 x2 + x 2 x3 .

SUMMARY

Gating feature lets the data thru or freezes output


Switches in series give AND function
Switches in parallel give OR function
Switching, Gating & Computing Logic functions are related
NAND & NOR gates are easiest with current implementation
technology for several reasons
CMOS NAND/NOR Gate circuits have switching transistors both in series & parallel

ISSUES:
How to systematically analyze circuits with multiple switches & gates without errors?
Can complex switches & gate circuits be made simpler?

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