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Analysis of Switched Inductor-Capacitor Hybrid BuckSEPIC Two-
Input DC-DC Converter
Abstract- The paper introduces a Switched Inductor Capacitor Hybrid Buck-SEPIC two input DC-DC
converter (SICHBSTIC) topology. The major concern of two source topologies is to meet the wide ranges
of power demand without overloading the main source, also to regulate the power flow and addressing the
key issues of voltage regulation and load sharing. The projected topology can provide ample bucking of
voltage even at higher duty ratios. A 36/12 V to 24 V, with power capacity of, 100W dc power rating for
low voltage DC micro-grid is considered to validate the proposed concept. The controllers are designed in
discrete domain based on Quantitative feedback theory (QFT) to obtain the robust performance for all
requirements. The theoretical analysis is validated through simulations.
KeywordsSICHBSTIC, TIBSC, QFT, robust controller, DC-DC converter
I. INTRODUCTION
In the present days lot of concentration is focused towards harvesting of available free renewable energy
harvesting, wherein different energy sources are integrated thereby meeting the power demand
requirements is given importance, whose applications mainly point towards, DC micro-grids, automobile,
telecom power supplies etc. To transfer power efficiently, between various sources and the load, a suitable
communicating and conversion device is needed, where Multi-input DC-DC converters are finding their
prominence. Various topological realizations had been reported in the literatures which are useful for
combining several dc sources of different capacities and voltage levels. It has two main advantages, (i) if
one DC source fails to supply load, then the other will continue to meet the load demand, (ii) if one of the
input sources power supplying capacity is limited then the extra power will be supplied by the other source
[1-2]. This paper proposes one such topology which can provide excess bucking voltages with wide range
of duty ratios. Two key aspects of output voltage regulation and load sharing is to be considered while
designing the MICs, as a part of it, which source must take care of output voltage regulation and which is
supposed to concentrate on load sharing is to be identified. Converter design should also address about the
dynamics getting introduced at various levels of operation like uncertainties generated in the plant, load
disturbance and noise etc. So, a robust controller is needed to take care of the above said abnormalities. To
carter such requirements, controllers based on frequency response robust controller design technique
namely Quantitative Feedback theory (QFT) method is used, which gives nice separation of control problem
and offers the two degrees of freedom structure, namely feedback controller to take care of disturbances
and feed forward controller to deal with plant uncertainties. The main objectives of the paper is to propose
the new topology, obtaining expressions to design various components, establish the mathematical models,
discrete time model of SICHBSTIC and to design and verify robust controller for various load and source
disturbances, and validate the results using simulation platform.
II. Steady-state Time-domain Analysis
Two-Input Switched Inductor Hybrid Buck-SEPIC (TISIHBSPC) DC-DC Converter
The proposed two-input hybrid buck-SEPIC dc-dc converter (SICHBSTIC), is shown in Fig. 1. is
the outcome of topologically modification of Two input Buck-SEPIC converter (TIBSC) mentioned in [1]
by modifying the topology at the source side of buck converter i.e., introducing a switched inductor-
capacitor combination which is advantageous in attaining about half of voltage gain of TIBSC. This resulted
in identifying the proposed converter of sixth order.
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Fig. 1 Proposed SICHBSTIC dc-dc converter
As it is a higher-order system its dynamics plays an important role in the stabilization and
controlling the power flow. The converter is analyzed here for continuous current mode of operation as the
inductor currents are found to be continuous in the proposed converter since in the assumed dc grid is
supplying higher loads, and the source currents magnitude is found to be more.
Depending on the load demand the input side inductance current can be either in continuous or
discontinuous mode, here continuous mode of operation is considered. The converter circuit operation relies
on the triggering instants of switching devices S1 and S2, here d1, d2 respectively, are duty ratio of switch S1
and S2. In the paper, the d1 > d2 case is analyzed for the trailing-edge synchronized switching signals. The
scheme of operation is given in Table-I. For d1 > d2 case the switching sequence and the associated
operating modes are listed in Table-II.
Table-I: Scheme of Operation Table-II: Modes of Operation
Case Power Duty Ratio Mode Devices-ON Devices-OFF
Case-1 P1 > P2 d1 > d 2 Mode-1 S 1, S 2 D1, D2, D3
Case-2 P1 < P2 d1 < d 2 Mode-2 S1, D3 S2, D1, D2
Case-3 P1 = P2 d1 = d 2 Mode-3 D1, D2, D3 S1, S2
In the steady state operation, the equivalent circuits for these operating modes are shown in Figs. 2
to 4. The KVL expressions are written and by applying Volt-second balance for three inductors, the output
voltage expression is obtained shown in eqn. (1), the steady state load voltage is controlled by the
combination of switch duty ratio's and depends on both input dc sources voltage magnitudes. By means of
voltage conversion ratio eqn. The variation of output voltage with duty ratios is plotted in Fig.5, from which
it is evident that the proposed converter can give excessive bucking operation. Relevant expression of
different components is not presented because of space constraint.
Table-III Specifications From above three modes of operation, applying volt-sec balance to inductors L1,
L2, L3 the following equations are obtained:
vL1 (vc1 )(1 d1 )Ts ; vL 2 (Vg 2 vC 2 Vo )(1 d1 )Ts ; vL 3 Vo (1 d1 )Ts
Solving above equations, the voltage gain expression is obtained as:
d d
Vo Vg 1 1 Vg 2 2
1 d2 1 d2 (1)
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L1 L3 R c3 L3
ig1 io ig1 R L1 L1 io
Rc1 Rc1
C1 C1
Vg1 Vg1
RC3 RC3
D2
R Vo R
Vo
C3 ig2 iC2 C3
ig2 iC3
RL2 L2 RL2 L2 Rc2 C2
Rc2 C2
Vg2 Vg2
Fig. 2 Equivalent circuit for mode-1 operation. Fig. 3 Equivalent circuit for mode-2 operation.
R L1 L1 L3
ig1 io
Rc1
C1
Vg1
D2 RC3
Vo R
ig2 iC2 C3
RL2 L2 Rc2 C2
Vg2
Fig. 4 Equivalent circuit for mode-3 operation. Fig.5 Output Voltage Variation of SICIHBSC with duty
ratios d1 and d2
Fig.6 Steady state waveforms of Switching Pulses, Output Voltage, Fig. 7 Waveforms Of Closed Loop Operation Of
load current, device voltage & curren SICHBSTIC, Output Voltage, Source-2 Current, Duty
Ratios
TABLE III :EXPRESSIONS AND SPECIFICATIONS
V g 1 (1 d 1 )
L
1
i L 1 f s (1 d 2 ) Power(Po) 100W
V g 2 (1 d 1 ) Fs 50Khz
L 2
i L 2 f s Source Voltages
V (1 d ) 36V/50W , 12V/50W
L 3 o 1 (Vg1 Vg2)
iL 3 f s
V o d (1 d 1 ) Load Voltage(Vo) 24V
C 1 1
(1 d ) R f s v
2 C 1
Load 5
V o d 2 (1 d 1 )
C
2
R f s v C 2 (1 d 2 ) Inductances 240H, 240H, 300H
V o d 2
C 3 Capacitance 100F, 280F
R f s v C 3
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IV DISCRETE TIME MODELLING OF THE PROPOSED CONVERTER
To analyze the dynamic behavior and to design a digital controller the converter operating modes are
transformed into a set of first-order differential equations and then formulated state-space models. In each
mode of operation, the power stage dynamics can be obtained, relevant expressions are reported in [2].
Converter transfer functions are identified using the matrices given in eqns. (2-4):
v0 (z) Ei zI 1 Ei zI 2 d 1 (z) 0.14z3 0.32z2 0.78z 0.13
1 1
G_11
(2) z 3.35z3 7.12z2 3.85z 0.24
4
ig (z) Pi zI 1 Pi zI 2 d2 (z)
1 1
(4)
G11 (z) G12 (z) Ei zI 1 Ei zI 2
1 1
4.36z 8.83z 1.3z 7.09
3 2
G_22 4
G (z) G (z) (3)
z 3.35z3 7.12z2 3.85z 0.24
Pi zI 1 Pi zI 2
1 1
21 22
In the converter one part of converter should take care of voltage regulation, and the second part of
converter should take care of load sharing, in the process of identifying the best pair, Relative gain array
number (RGAN) is used, which identify feasible pair such as (V o, d1) - voltage regulation, (ig, d2) - load
sharing. So, the transfer functions obtained are shown in eqn. (4). The controllers for both the converters
are obtained using sisotool, this may work or may not work in the real-time implementation because in this
sisotool, only a single plant is considered and performing analysis without considering perturbations or the
disturbance. So, there is a need for employing the Robustness analysis to the converter by considering set
of plants [4-7]. The block diagram for implementing MIMO QFT is shown in Fig 8. Fig.11 shows the
uncertainties in the plant considering source disturbance and load resistance variation. For which QFT
controller design method is found to be an alternative. The uncertainties are created using variations in Vg1:
30 to 40V, Vg2: 8 to 16 V, and R: 1 to 10 , and for the frequency array of {1 10 50 100 500 1e3 1.24e3
1.5e3 2e3 5e3 10e3 20e3 25e3} templates were generated, shown in Fig, 9, and the weight function is shown
in Fig.10. For stability specifications of GM=10db, and PM=45 o, and for output disturbance rejection of
1.3, and reference tracking bounds are obtained, and a controller GC was designed using QFT loop shaping
method shown in Fig. 11. Thereby the loop gain LO=GCP is obtained. Thereby the sensitivity, load
rejection, complementary sensitivity, noise distortion plots are obtained, all are not provided because of
space constraint. Then the pre-filter is designed, shown in Fig. 12. Using controller and pre-filter, the robust
performance and its working is obtained. With the obtained controller parameter simulation of proposed
converter is carried out which resulted in obtaining the output voltage regulation and load sharing shown
in Fig. 7. The remaining results and hardware results will be submitted in the final paper.
Fig. 8 Block diagram representing Plant models and interactions for implementing MIMO QFT
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Fig. 9 Templates for G_22 Fig. 10 Weight Function
Fig. 12 Bode Plot of Loopgain (L_o), Complementary
Fig. 11 Controller GC sensitivity (T), and Sensitivity (S)
V CONCLUSION
A new two-input converter topology is proposed, the steady state analysis, shows that it can provide
excessive bucking operation. The dynamic analysis of proposed converter is carried, and is analyzed for
the trailing-edge synchronized switching signals. By using QFT different bounds are obtained, the closed
loop robust controllers for voltage regulation and load sharing are obtained for the proposed SICHBSTIC
converter.
REFERENCES
[1] Mummadi Veerachary , Twoloop controlled Buck-Sepic converter for input source power management IEEE transactions
on industrial electronics ,Vol.59, No. 11, Nov2012.
[2] Axelrod, Boris, Yefim Berkovich, and Adrian Ioinovici. "Switched-capacitor/switched-inductor structures for getting
transformerless hybrid DCDC PWM converters." Circuits and Systems I: Regular Papers, IEEE Transactions on 55, no. 2
(2008): 687-696.
[3] Veerachary, Mummadi, Ramakanth Naidu Gowra, and Dileep Ganta. "Discrete-time modeling of multi-state DC-DC
converters." Power Electronics, Drives and Energy Systems (PEDES) & 2010 Power India, 2010 Joint International
Conference on. IEEE, 2010.
[4] Altowati, A., Zenger, K., Suntio, T., QFT-Based robust controller design for a dc-dc switching power converter, Power
Electronics and Application, 2007 European Conference on, Sept. 2007 pp. 1-11
[5] Olalla, C., Leyva, R., El Aroudi, A., and Pedro Garces, QFT Robust Control of Current-Mode Converters: Application to
Power Conditioning Regulators, International Journal of Electronics,Vol.96, Issue.5,May-2009 pp. 503-520.
[6] Houpis, C.H., Rasmussen, S.J.: Quantitative Feedaback Theory, Fundamentals and Applications, (Marcel Dekker, Inc. 2 nd ed.
2005)
[7] Borguesani, C., Chait, Y. and Yaniv, O.: The QFT Frequency Domain Control Design Toolbox- For use with MATLAB
