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Second Order High Pass Filter

The document contains graphs of various electronic circuits including high pass and low pass filters with their frequency responses, series voltage regulators showing input and output voltages over load and line variations, a switching regulator output voltage over time, voltage and current feedback circuits, a 16:1 multiplexer using two 8:1 multiplexers and another using NAND gates, and half adder and full adder circuits showing input and output signals over time.

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Prasanna Pai
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78 views4 pages

Second Order High Pass Filter

The document contains graphs of various electronic circuits including high pass and low pass filters with their frequency responses, series voltage regulators showing input and output voltages over load and line variations, a switching regulator output voltage over time, voltage and current feedback circuits, a 16:1 multiplexer using two 8:1 multiplexers and another using NAND gates, and half adder and full adder circuits showing input and output signals over time.

Uploaded by

Prasanna Pai
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Second order High Pass Filter

40

-40

-80
100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
VDB(R5:2)
Frequency

Second order Low Pass Filter

40

-40

-80
100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
VDB(R5:2)
Frequency

Series voltage reg.(load)

16V

12V

8V
0 0.1K 0.2K 0.3K 0.4K 0.5K 0.6K 0.7K 0.8K 0.9K 1.0K
V(REGULATED_OP) V(UNREGULATED_IP)
R
Series voltage reg.(line)

20V

16V

12V

8V
10V 11V 12V 13V 14V 15V 16V 17V 18V 19V 20V
V(REGULATED_OP) V(UNREGULATED_IP)
V_V1

Switching reg.

8.0V

6.0V

4.0V

2.0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(REG_OP)
Time

Voltage series fb

2.0V

0V

-2.0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(op) V(ip)
Time
Current Series Fb

400mV

0V

-400mV
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(output) V(input)
Time

16:1 MUX using two 8:1 MUX

A
B
C
D
y

0s 2.00us 4.00us 6.00us 8.00us 10.00us 12.00us 13.04us


Time

MUX using NAND gates

S0
S1
10
11
12
13
y

0s 0.4ms 0.8ms 1.2ms 1.6ms 2.0ms


Time
Half adder

B
A
Sum
Carry

0s 1.0us 2.0us 3.0us 4.0us 5.0us 6.0us


Time

Full adder

C
B
A
Sum
Carry

0s 0.50us 1.00us 1.50us 2.00us 2.50us 3.00us 3.50us 4.00us 4.48us


Time

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