Logic NAND Gate Definition
The Logic NAND Gate is a combination of the digital logic AND gate with that of an inverter
or NOT gate connected together in series. The NAND (Not AND) gate has an output that is
normally at logic level 1 and only goes LOW to logic level 0 when ALL of its inputs are at
logic level 1. The Logic NAND Gate is the reverse or Complementary form of the ANDgate we
have seen previously.
Logic NAND Gate Equivalence
The logic or Boolean expression given for a logic NAND gate is that for Logical Addition, which is the
opposite to the AND gate, and which it performs on the complements of the inputs. The Boolean
expression for a logic NAND gate is denoted by a single dot or full stop symbol, ( . ) with a line orOverline,
( ) over the expression to signify the NOT or logical negation of the NAND gate giving us the Boolean
expression of: A.B = Q.
Part of the Electronics glossary:
AND | OR | XOR | NOT | NAND | NOR | XNOR
A logic gate is an elementary building block of a digital circuit. Most logic gates have two
inputs and one output. At any given moment, every terminal is in one of the
two binaryconditions low (0) or high (1), represented by different voltage levels. The logic
state of a terminal can, and generally does, change often, as the circuit processes data. In
most logic gates, the low state is approximately zero volts (0 V), while the high state is
approximately five volts positive (+5 V).
There are seven basic logic gates: AND, OR, XOR, NOT, NAND, NOR, and XNOR.
The AND gate is so named because, if 0 is called "false" and 1 is called "true," the gate acts
in the same way as the logical "and" operator. The following illustration and table show the
circuit symbol and logic combinations for an AND gate. (In the symbol, the input terminals
are at left and the output terminal is at right.) The output is "true" when both inputs are
"true." Otherwise, the output is "false."
AND gate
Input 1 Input 2 Output
1 1 1
The OR gate gets its name from the fact that it behaves after the fashion of the logical
inclusive "or." The output is "true" if either or both of the inputs are "true." If both inputs
are "false," then the output is "false."
OR gate
Input 1 Input 2 Output
1 1
1 1
1 1 1
The XOR ( exclusive-OR ) gate acts in the same way as the logical "either/or." The output is
"true" if either, but not both, of the inputs are "true." The output is "false" if both inputs
are "false" or if both inputs are "true." Another way of looking at this circuit is to observe
that the output is 1 if the inputs are different, but 0 if the inputs are the same.
XOR gate
Input 1 Input 2 Output
1 1
1 1
1 1
A logical inverter , sometimes called a NOT gate to differentiate it from other types of
electronic inverter devices, has only one input. It reverses the logic state.
Inverter or NOT gate
Input Output
The NAND gate operates as an AND gate followed by a NOT gate. It acts in the manner of
the logical operation "and" followed by negation. The output is "false" if both inputs are
"true." Otherwise, the output is "true."
NAND gate
Input 1 Input 2 Output
1 1
1 1
1 1
The NOR gate is a combination OR gate followed by an inverter. Its output is "true" if both
inputs are "false." Otherwise, the output is "false."
NOR gate
Input 1 Input 2 Output
1 1
The XNOR (exclusive-NOR) gate is a combination XOR gate followed by an inverter. Its
output is "true" if the inputs are the same, and"false" if the inputs are different.
XNOR gate
Input 1 Input 2 Output
1 1 1
Using combinations of logic gates, complex operations can be performed. In theory, there is
no limit to the number of gates that can be arrayed together in a single device. But in
practice, there is a limit to the number of gates that can be packed into a given physical
space. Arrays of logic gates are found in digital integrated circuits (ICs). As IC technology
advances, the required physical volume for each individual logic gate decreases and digital
devices of the same or smaller size become capable of performing ever-more-complicated
operations at ever-increasing speeds.
This was last updated in January 2011
