LAB # 4
STICK DIAGRAM & BOOLEAN FUNCTION
ASSIGNMENT # 2
Implement AND & OR Gate Using CMOS
Transistors
(Transistor level circuit, Layout, Simulations)
SUBMISSION IN NEXT LAB !!!
Lab Engr : Sara Nawaz
STICK DIAGRAM
Lab Engr : Sara Nawaz
Stick Diagram
Acts as an interface between transistor level circuit
and the actual layout
Useful for planning layout
Stick diagrams convey layer information through
color codes
Does show all components/contacts
Does not show exact placement of components,
transistor sizes, wire lengths, wire widths etc
Lab Engr : Sara Nawaz
Lab Engr : Sara Nawaz
Stick Diagram Notation (Color Coding)
Lab Engr : Sara Nawaz
Stick Diagram Rules
Rule # 1
When STICKS of same type touch or cross each other that
represents an electrical contact
Lab Engr : Sara Nawaz
Rule # 2
When two or more sticks of different type cross or touch each
other there is no electrical contact
If electrical contact is needed we have to show the connection
explicitly
Lab Engr : Sara Nawaz
Rule # 3
When a poly crosses diffusion it represents a transistor
If a contact is shown then it is not a transistor
Lab Engr : Sara Nawaz
Rule # 4
Avoid touching of p-diff with n-diff
All PMOS must lie on one side and all NMOS will have to be
on the other side
Lab Engr : Sara Nawaz
Stick Diagrams Of CMOS Inverter
1. 2.
Lab Engr : Sara Nawaz
Stick Diagrams Of CMOS NOR
Gate
Lab Engr : Sara Nawaz
BOOLEAN FUNCTION
Lab Engr : Sara Nawaz
Problems In Implementing Boolean Function Using
Individual CMOS Inverters
Complex
Area
Redundancy
Overlapping of Metals
Lab Engr : Sara Nawaz
Layout Using Individual Inverters
Lab Engr : Sara Nawaz
Layout
Lab Engr : Sara Nawaz
Implement Layout Of Given Boolean
Function
Lab Engr : Sara Nawaz