Sundar 2016
Sundar 2016
1s IEEE International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES-2016)
                 Nair Syam Sundarl; Libin Philip2; Patel Tapasvi3; Mistry Akash4 and Dholiya Hira/
             12345
              , , , , Department of Electrical Engineering; Chhotubhai Gopalbhai Patel Institute of Technology;
                                         Uka Tarsadia University; Surat; Gujarat-394350; India
                                                       I
                                               E-mail: syamakrishnan.nair@gmail.com
    Abstract-Nowadays         electric    power generation from                the non critical loads like electronic appliances including
renewable sources of energy is growing vastly. In India;                       TV;    music system; DVD; etc possess inbuiIt SMPS
twenty eight percent of total power is being generated using                   (Switched Mode Power Supply) converting 230 to 12/24
non-renewable sources like solar;          wind;    biogas etc.    The
                                                                               V; so these can bear voltage fluctuations up to some
power generated is fed to the main grid via micro grid
                                                                               extent. Taking advantage of this; ELECTRIC SPRING
system. As the nature does not remain similar all the time;
                                                                               (ES) is used to connect in series with the non-critical load
there is disturbance in wind velocity;             intensity of solar
radiation; etc. This results in the voltage fluctuation for short              and the series combination in parallel with the critical
as well as long period. Some of the loads cannot withstand                     load. ES is a five level cascaded H-Bridge multilevel
such variations; or to be specific; critical load. There are                   inverter which gives a sinusoidal signal whose R. M.S.
voltage and reactive power compensating devices such as                        value is decided as per command signal provided to it as
DVR; DSTATCOM; SSSC etc. to overcome such problems.                            feedback. Thus; this becomes a closed loop system. Also;
But it cannot be used at particular demand side due to its                     from the input side the reactive power is reduced and the
high cost. This paper gives an idea to mitigate the voltage of
                                                                               power factor gets improved. This becomes a plus point for
critical load by varying the voltage of non-critical load to
                                                                               the device.
some extent employing electric spring-MLI (5 levels).
                                                                                     The phase angle between the ES voltage and the non
    Keywords-Electric Spring; 5 Level Casacaded H-Bridge
MLl; Design of LC Filter; Active-reactive Power Control                        critical load current is maintained at 90. It is not always
                                                                               necessary that this relation results in positive response. It
                     I.   INTRODUCTION                                         specifies some range to operate. As it is a closed loop
                                                                               system; it is necessary to sense the voltage magnitude of
     The topic electric spring refers to the device which
                                                                               critical load; phase angle of non-critical load current and
acts as a compensator in tenns of voltage or reactive
                                                                               respond to error signal generated after comparing the
power or power factor. This is a project on which the
                                                                               R. M.S. value of critical load voltage and reference signal
research is carried out still. To maintain the critical load
                                                                               (magnitude). This response results in the variation of pulse
voltage to a constant value some voltage variation has to
                                                                               width of the gate signals fed to the 5-Level MLI and thus
be made across the non critical load. This principle is
                                                                               leads to variation in the magnitude ES voltage.
based on Hooke's law for a mechanical spring which is
analogue to electric spring [1]. The voltage fluctuation is                                      II.   ELECTRIC SPRING
mainly due to the change in the nature-wind speed
                                                                               A. 5-Level Cascaded H-Bridge MLi
variation; change in the intensity of solar light etc. which
are renewable source of energy. So the micro-grid system                             This multilevel inverter is of 5-level Cascaded H
supplies power collected from the renewable source of                          Bridge type (Vdc; 2Vdc; 0; -Vdc; -2Vdc). The level shifting
energy to the main grid system [2]. There are many                             principle is applied over here. The importance of this
devices used to compensate such fluctuation w.r. t. voltage                    inverter is that it generates nearly sinusoidal waveform
and reactive power like DVR also DST ATCOM; SSSC                               which is essential in ES (Electric spring). The SPWM
and other such devices [3]. But this electric spring is a                      (sinusoidal pulse width modulation) technique is used here
new a device accommodated as a smart load system [4].                          to obtain sinusoidal waveform. The reference signal is sine
     This electric spring is a device which maintains a                        wave of 50 Hz while the carrier signal is triangular
constant   voltage    level    across      the   critical   load    by         waveform of 5 KHz. These are compared in comparator
compensating the voltage across the non-critical load. The                     and the pulses generated from the comparator are given to
critical loads such as medical instruments of hospital;                        the gate circuit of Cascaded H-Bridge inverter as per the
security system of the building; air conditioning system                       switching pattern. There are four comparators which are
etc. cannot bear even minor voltage fluctuations; whereas                      given common reference signal and individual carrier
                                                                                  2
signal of different magnitudes. The first carrier generator
generates carrier signal of magnitude level 0 to 1; the
second one generates the magnitude level of 1 to 2; the
third one generates 0 to -1 and the fourth one generates the
magnitude level of -1 to -2. The magnitude level of sine
                                                                                ! .��lIil l Ilr�l �
wave is 0 to 2.
     Thus the output of comparator which compares the
                                                                                                 ijl l lt
reference and carrier signal of level 1 results in Vdc at the
output of cascaded H-Bridge inverter.                Similarly;    the
comparator output of magnitude level 1 to 2 generates the
2Vdc. Here; both the comparators generate the pulses at the
same time for level 2Vdc. Comparators can be Op-Amp in
which reference (sine) signal is given to the non-inverting                           o       0,(02   0.004        0.0:6        0.003      0.Q1       0,012       0,014   0.Q16   0.018   0,(12
                                                                                                                                        Time (sec)
input while the carrier signal to the inverting input of Op
                                                                                            Fig. 2: Comparators' Input Signal-one is Sinewave and
Amp. So during comparison; when the magnitude of sine
                                                                                                Others are Four Level Shifted Triangular Signals
wave is more than that of the carrier signal; pulse of logic
1 is generated and for the reverse case i. e. if carrier is                           Now it becomes simpler to filter out nearly sine signal
more than sine wave; logic 0 is generated. So; during the                      from the SPWM (Sinusoidal Pulse Width Modulated)
generation of the level 2Vdc; multi pulses are generated by                    output as shown in Fig. 2.
1-2 level comparator while on the other hand; only one
pulse is generated by 0-1 level comparator. The same case
                                                                               B. Design ofLe Filter
is applicable for comparators doing comparison operation                              A mathematical expression is needed to ease the out
between negative half of the reference signal and the                          pass filtering process.
negative magnitude level carrier signal for obtaining -Vdc                            First of all it is assumed that the square wave is the
and -2Vdc. Thus after one cycle the output of cascaded H                      input and L (inductor) and C (capacitor) are the filter
Bridge inverter will be stepped sine wave predicting 5-                        components.
Levels. So; for positive half wave generation of H-Bridge                                 The square wave as a function of time can be defined
inverter; two comparators will be under operation out of
                                                                                                                           OO
                                                                               by Fourier series;
four and the other two comparators for negative half
                                                                                          f(t) - --
                                                                                                 4xVdc                                       ( -)
                                                                                                                  L
                                                                                                                                        1          .  nnt
                                                                                                                                        -         SIn                                     (1)
generation.                                                                                        n                                    n              2
                                                                                                                           n=1,3,5
              S2,S3,S6,D5
              S2,S3,S6; S7
                                                     -V dc                                      1                 R
                                                    -2Vdc                                     A squa.-e
                                                                                              Y Wave
     The switching pattern is designed in such a manner
the switching losses are reduced compared to all other
patterns and fulfill efficient use of all the switches.
                                                                                                                  Fig. 3: Concept of LC Filter
                                                                                      Where,
                                                                                          i(t)=current flowing in the RLC circuit
                                                                                      Assume that the voltage across capacitor is function
                                                                               of sine wave such that Vc(t)= Vm*sin(wt). Thus i(t) can be
                                                                               found out from the equation of capacitor voltage Vc(t).
                                                                               Substituting obtained Vc(t); i(t) and eq.(1) in eq.(2); a
                                                                               equation is formed and evaluate the equation by keeping
                                                                               the value of t such that the sine term present in the
                                                                               equation becomes 1 i.e. wt=90.
                                                                                      Here at this stage; R (resistance) of RLC branch gets
                                                                               deleted. And defining the value of L; V m (peak amplitude
                                                                               of sinusoidal output) and Vdc (obtained after summ ation of
 Fig. I: Comparator Simulation for Generating Gate Signals to 5-Level
                                                                               the dc voltages of both individual H-Bridge inverters)
                                 MLI
                                                                         [21
                                  t
                                1s IEEE International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES-2016)
value of capacitance C can be known. The resistance can                                                                                                                                                        Where; Vnel = Non-Critical Load Voltage; Vel =
be kept above 1 11 in the simulation.                                                                                                                                                                      Critical Load voltage; Vin= input voltage; ES = electric
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                                                                                                                                                                                                           spring voltage or inverter voltage; Inel = non-critical load
                                                                                                                                                                                                           current and Vline = line voltage drop.
                                                                                                                                                                                                               Case-2
                                                                                                                                                                                                               If     the     transmission               line     impedance           is
 �  : :: : : :
      10
            o                  0.02
                                   :
                                                     0,04              0.00                          0,03                 0.1                    0.12                 0,14                    0.16
                                                                                                                                                                                                           resistive+capacitive     (RC);      then       for   under-voltage
                                                                                                                                                                                                           phase angle relation between ES voltage vector and non
                                                                                                                                                                                                                                                                                    the
 I: �. 10
            0                  om                    0,04              0.00                          D.1lI
                                                                                                  Time (sec)
                                                                                                                          0.1                    0.12                 0.14                    0.16
                                                                                                                                                                                                           critical load current vector should be +90° and during
                                                                                                                                                                                                           over-voltage condition it should be _90°.
Vel
                                                                                                                                                                                                                                                                Vline
                Fig. 4: Output Voltage before Filter and After Filter Circuit                                                                                                                                               ��----��----�
                                           �
        Fig. 5: Under-Voltage Condition _900 between ES and 1,,,,,; Line
                                                                                                      Vel
                                                                                                                          Vln
Impedance is of RL Characteristic
                                                                                                                                                                                                     [31
              t
            1s IEEE International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES-2016)
     The R. M.S. value of critical load voltage is compared                              The overall active power consumption from the input
with the reference voltage as shown in the above diagram.                           side gets reduced. As shown in the figure.1O when ES
The error signal generated is given to PI (Proportional                             comes into the picture the active power to critical load
Integrator). The output of PI can be decided as per the                             gets increased to a determined value decreasing the active
values of Kp (proportional gain) and Ki (integral gain).                            power across the non-critical load.
This can be positive or negative as per the error signal
generated depending on over voltage or under-voltage
condition. In this paper the comparator is selected in such                                 �IIXlJj
                                                                                            1
a manner that error signal generated will be positive for
                                                                                            &.� = �--�--
                                                                                                          ----------
                                                                                                                   '---'----�
under-voltage case and negative for over-voltage case.                                            EOD
                                                                                                        1
                                                                                            �      F---�
Thus the output of PI can be +a or -a.                                                      .�.all       _
                                                                                                          --------��---'i
                                                                                                             p.,
                                                                                                         �--�----�
Inverter). At last the voltage across the critical load gets                                .��   1001
            aa��--�-7--+--+,--+-�--7-��
                                    Time (scc)
     In the Fig. 10 the ES is bypassed till 2 sec. After this                         Fig. 13: R.M.S. Values of Voltages during Over-Voltage Condition
period the ES comes into the picture and thus the value                               Vin = Input Source Voltage; Vel = Critical Load Voltage Vnel = Non
                                                                                                Critical Load Voltage; ES = MLI Output Voltage
critical load voltage which was below 230 volts before 2
sec boosts up to 230 volts. Its stability period is around                              In overvoltage condition; the critical load voltage is
500 millisecond and completely gets stable after 1 sec.                             more than 230 V and due to voltage drop across the line
     Pin   =    Input    Active      power;      Pel = ActivePower                  impedance the input voltage is obviously more than that of
consumed by          critical Load and Pnel = Active Power                          the critical load voltage. As shown in the fig. 13; before 2
consumed by non-critical load                                                       secs the voltage across the critical load is more than 230 V
                                                                              [41
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                1s IEEE International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES-2016)
and after 2 secs when the ES comes into the picture; the                     the same as this matter depends on the line impedance
voltage gets reduced to 230 V. Here there is some change                     parameter.
of voltage across the non-critical load. Thus; from the
above analysis it can be said that there is a spring effect in                                      IV.   CONCLUSION
order to maintain critical load voltage.                                           After the detailed analysis and research on electric
     The voltage variation across the non-critical load is                   spring     as   a   voltage     regulator;    a   reactive    power
not more as compared to critical load condition. Also the                    compensator or line power factor improver and power
voltage-range above 230 V for which the voltage across                       quality improver it can be concluded that electric spring
the critical load can be set to reference cannot be decided.                 can be termed as smart load system for modem grid
                                                                             system including microgrid which growing fastIy all over
                                       ---    ..                             the globe keeping in mind the conservation of non
           �mll                                                              renewable source of energy. The variation in the non
           �
           •    ""F-----------------1                                        critical load in order to avoid the voltage fluctuation of
           &    em'i----....
           .�
                                                                             critical load is quite more which mainly depends on the
           �    an             ----
                                ;. . ,. . ----1
                                                                             system parameters. Apart from the power part the input
                                                                             active power gets reduced without disturbing the power of
                 00                       .
                                      Time (sec)                             critical load in both under-voltage and over voltage
                                                                             conditions.     The input reactive power gets decreased
Fig. 14: Active Power Consumption by the System and the Loads during
                      Over-voltage Consumption                               (supplying to the input) in under-voltage condition while it
                                                                             gets increased (absorbing from the input) in over-voltage
     In over-voltage condition there is not much difference
                                                                             condition. Thus power quality of the critical load is
in the power from the input side compared to that of                         improved by the device electric spring and the device can
under-voltage condition. The power across the critical                      be driven in both supplying and absorbing mode as
load gets reduced as the voltage across it is reduced by                     reactive power compensator. And at the end; the concept
230 V. Similarly;              following the spring principle; the           of phase shifting of ±90 between ES voltage and non
power of non-critical load also gets reduced to maintain a                   critical load parameter can be decided from the the
constant power across the critical load.                                     characteristic of line impedance       (RL or RC).
                                                                                                       ACKNOWLEDGMENT
           � ...
           �Ym
           • ""f---{                                                               The authors would like to thank their professors and
           !zm                                                               colleagues at Chhotubhai Gopalbhai Patel Institute of
           �=
           'H 1U1F    ________________                                       Technology for their support and for availing the facilities
           "',�
                                                                             and equipments at the institute.
                 00                       .
                                     Timc(sec)
                                                                                                          REFERENCES
  Fig. IS: Reactive Power Consumption by the System and the Loads
                                                                             [I]   Jayantika Soni; Krishnanand K.R. and Panda Sanjib in "Load Side
                  during Under-Voltage Consumption
                                                                                   Demand Management in Buildings Using Electric Springs" in
     In Fig. 14; it can be clearly seen that after 2 secs the                      CREST Center for Research and Energy System Transformations
                                                                                   and in University of California; August 20 14,eScholarship
reactive power gets increased as the ES phase voltage is
                                                                             [2]   Siew Chong Tan; Xia Chen; Yuhen Hou and other IEEE crew
shifted by +90°. So the resultant current flowing through                          members "Mitigating Voltage and Frequency Fluctution in
the line impedance lags behind the input voltage by some                           Microgrids Using Electric Springs"; IEEE Transaction on Smart
angle. So after 2 secs when ES comes into the picture the                          Grid; November 2 0 14
                                                                             [3]   Siew Chong Tan and the crew "DC Electric Springs- An Emerging
reactive power of critical load is increased decreasing the
                                                                                   Technology for DC Grids"; in University of Hong Kong; published
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                                   TABLE 2                                         H. Shu Yuen; L. Chi Kwan and F. F. Wu; "Electric springs- a new
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 SYstem Frequency                             50 Hz
                                                                                   in 20 12.
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Non-Critical Load Parameters                  R-9fl; L-1.385 H               [6]   Nilanjan Ray Chaudhuri; Chi Kwan Lee; Balarko Chaudhuri and
Line Parameters                               R-O.I fl; L-1.22 mH                  S.Y. Ron Hui "Dynamic Modeling of Electric Springs"; IEEE
 Individual DC source voltage                 360 V                                Transaction; published in 20 IS
 To Cascaded H-Bridge Inverter                                               [7]   Yan Shuo; Siew-Chong Tan; C.K. Lee; S.Y.R. Hui "Electric Spring
 Outpass Filter Parameter                     R-2 fl; L-I mH; C- 5mF
                                                                                   for Power Quality Improvement"; IEEE Transaction; published in
     The similar case can be considered by approaching the                         2 0 14
                                                                             [8]   C. K. Lee; Hui and S. Y. R. Hui; "Reduction of energy storage
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                                                                                   requirements in future smart grid using electric springs," IEEE
critical load voltage and non-critical load current remains                        Transaction on Smart Grid; published in 20 13.
[5)