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US005530338A
United States Patent [19] [11] Patent Number: 5,530,338
Beckwith [45] Date of Patent: Jun. 25, 1996

[54] LOAD TAPCHANGER TRANSFORIVIER 3,944,913 3/1976 Kugler .................................. .. 323/258

PARALLELING BY DAISY CHAIN 4,130,789 12/1978 Neumann .............................. .. 323/340
COMPARISON OF LOAD CURRENTS 5,155,672 10/1992 Brown . . . . . . . . . . . . . . . .. 323/255
_ 5,210,443 5/1993 Kugler .................................... .. 307/17

[76] Inventor: Robert W. Beckwith, 2794 Camden

Rd" Clearwater’ Fla‘ 34619 Primary Examiner—MattheW V. Nguyen
Attorney, Agent, or Firm—Le0 J. Aubel
[21] Appl. No.: 398,869
[22] Filed: Mar. 6, 1995 [57] ABSTRACT
Int. Cl-6 ...................................................... .. A System and method of [apchanging transfornk
[52] US. Cl- 323/255 ers. The transformers are connected to provide a daisy chain
[5 8] Field of Search ................................... .. 323/247, 255, of output load currents processed as pairs of currents by each
323/256, 257, 258; 336/137, 138, 142, tapchanger control. Transformer load currents are balanced
143, 145, 150 as desired regardless of whether or not transformer primaries
are supplied in parallel.
[56] References Cited
U.S. PATENT DOCUMENTS
3,747,038 7/1973 McGill .................................. .. 336/150 9 Claims, 10 Drawing Sheets

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US. Patent Jun. 25, 1996 Sheet 1 of 10 5,530,338

W19 “20 w
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802

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L___....______
US. Patent Jun. 25, 1996 Sheet 2 of 10 5,530,338

E6E N.91
U.S. Patent Jun. 25, 1996 Sheet 3 of 10 5,530,338

MAIN CIRCUIT
3 LTC POWER TRANSFORMER’

120 V ill-0127
3 1

MOTOR
POWER

LOAD

(i)
CIRCUITS
BREAKER

IPNOWUETR LTC
POWER
TRANS CIRCUIT
BREAKER
US. Patent Jun. 25, 1996 Sheet 6 0f 10 5,530,338

Fig. 7a)

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\ 120"’;
12c
<————-—--—-—— Foreshortened from 20"

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11 C

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US. Patent Jun. 25, 1996 Sheet 7 of 10 5,530,338
IL

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US. Patent Jun. 25, 1996 Sheet 8 of 10 5,530,338

87

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68%

r/
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G3 B3

9
Fig.
US. Patent Jun. 25, 1996 Sheet 9 of 10 5,530,338

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US. Patent Jun. 25, 1996 Sheet 10 of 10 5,530,338

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Fig. 13
 5,530,338
I 2
LOAD TAPCHANGER TRANSFORMER lating current in such a way to change and reduce the
PARALLELING BY DAISY CHAIN circulating current towards zero.
COMPARISON OF LOAD CURRENTS This method has the disadvantage of requiring experi
mental setting of the gain of the system by devices, K3, as
BACKGROUND OF INVENTION seen in the Model M-01l5 units of FIG. 3, so as to establish
an operating point where the paralleled controls do not hunt
It is sometimes desirable at an electric utility substation to and yet operate with tap switches within one or two taps of
use more than one load tapchanging (LTC) transformers each other.
such as 9, 10, or 11 of FIG. 1a or ?xed transformer/regulator A third method is introduced by US Pat. No. 5,210,443
combinations such as 39/42, 40/43, or 41/44 shown in FIG. 10 issued to Kurt Kugler on May 11, 1993. The Kugler method
1b, with the primary inputs and secondary outputs selec uses a parallel digital processor with radial two way data
tively connected in parallel. The term, ‘tapchanging unit’ or exchange between each tapchanging unit and a central
‘unit’ is used hereinunder to be either: processor. This is essentially a use of the principle of
a) a single LTC transformer containing the tapchanging circulating current except that measurements are made in
switch and related auxiliary components, or 15 each control sufficient to determine the circulating current
b) the combination of a ?xed ratio transformer directly fed but with computations of the circulating currents necessary
into a tapchanging regulator wherein the combination for paralleling being done in a central computer rather than
performs essentially the same task as an LTC trans in each individual control as in the circulating current
former. method, described with reference to FIG. 3.
In either case it is accepted industry practice to provide a 20 The prior art also discloses computer programs for solv
central tap switch position with 16 steps of voltage raise and ing alternating current (AC) networks wherein elements are
16 steps of voltage lower on either side of the center. A phasors. For example, networks as depicted in FIGS. 9 and
further industry practice is for each step to give 5/s% output 10 can be investigated with elements represented either by
voltage change, thereby providing a maximum range of a series resistive (R) part and a reactive (X) part or by
+/—10% in voltage adjustment. 25 parallel conductance (G) part and a susceptance (B) part.
FIG. 2 shows the tapswitching details of one phase of a FIGS. 9 and 10 will be discussed in more detail hereinbelow.
three phase tapchanging transformer. At neutral, a buck/
boost switch operates and together with a center tapped
SUMMARY OF THE INVENTION
bridging autotransformer gives a +/—l0% voltage regulation
range. The output voltage, E, comes from the center tap of The inventive method takes advantage of phase angle
the autotransforrner with the contacts stepping, for example, relations between transformer load currents as indications of
from neutral (N) position to a position with one switch the circulating currents between paralleled LTC transform
contact on (N) and the other on (1), and with the autotrans ers without actually measuring the circulating currents. In
former dividing the tap to tap voltage of %% down to %% the present invention, only the relative signs of these phase
of the output voltage. At the next step, both contacts could angles are used as an indication of the circulating current to
be on position (1). form logic rules which permit tapchanger switches to follow
Winding C of transformer T1 is generally a higher voltage each other when connected in a ring con?guration.
than winding B in the normal use of stepping voltages down The foregoing features and advantages of the present
from transmission level to subtransrnission or from sub invention will be apparent from the following more particu
transmission further down to distribution levels. Alterna 40 lar description. The accompanying drawings, listed herein
tively a ?xed ratio transformer is used to step the voltage below, are useful in explaining the invention.
down followed by a regulator for voltage regulation.
FIG. 2 also represents a single phase regulator wherein the
voltage is brought in at point A and winding C is not used. DESCRIPTION OF THE DRAWINGS
One method of paralleling uses various combinations of 45
FIG. 1a is a one line diagram of a parallel connection of
auxiliary switches on each transformer in order to sense
from two to “n” parallel LTC transformers for both prior art
whether the two tapchanging switches are on the same
and for this invention.
position and to determine which transformer should move its
tapchanger switch next in order to bring the tapchanger FIG. lb is a one line diagram of a parallel connection of
switches back to the same tap when a deviation is detected. from two to “n” parallel transformer/regulator combinations
This method of paralleling often used an auxiliary switch on for both prior art and for this invention.
each tapchanger mechanism that was, say closed on even FIG. 2 shows the details for a load tap changing switch.
taps and open on odd taps. This method has fallen into FIG. 3 is a schematic of a prior art paralleling scheme for
disfavor due to the complexity of the switching circuitry and two tapchanging units using the circulating current method
the auxiliary switch maintenance requirements. 55 of paralleling.
FIG. 3 illustrates the circulating current method of par’ FIG. 4 is a circuit diagram for eight paralleled units,
alleling in most common use today. This illustration is taken simpli?ed to emphasize the single conductor daisy chain
from an instruction book by the Beckwith Electric Co. Inc., connection of current circuits as required by the inventive
Largo, Fla. 34643 and illustrates use of the Beckwith Elec method of paralleling.
tric Model M-0115 parallel balancing units, Model M-0067 60
FIG. 5 is a circuit diagram illustrating in greater detail the
tapchanger controls, Model M-0127 overcurrent relays and inventive connection of load currents for paralleling two
Model M-0l69 auxiliary current transformers. The network
essentially forms a 60 Hz current analog of the quadrature tapchanging units.
current ?owing between the two LTC transformers. When FIG. 6 depicts electrical connections for an LTC trans
ever the transfonners are not on the same tap positions, the 65 former, tapchanger control and associated components.
network feeds a measure of the circulating current into the FIG. 7a is a diagram showing internal models for two
M-0067 controls as a voltage in quadrature with the circu paralleled transformers.
 5,530,338
3 4
FIGS. 71; through 7g depicts phasor diagrams useful in current transformer, not otherwise shown here but shown in
explaining circulating reactive current ?owing between two FIG. 12, located in tapchanger control 322, and from there
tapchanging transformers operating in parallel. through a contact 331 of AC voltage relay 330, through
FIG. 8 is a diagram of paralleled units having a phase switch 370 contact 341 of unit control 320, through switch
angle difference in unit supply voltages. 371 contact 363 of unit control 321, through contact 352 of
AC voltage relay 350, through primary 358 of an auxiliary
FIG. 9 is an impedance diagram corresponding to the current transformer, not otherwise shown here but shown in
circuit of FIG. 1a. FIG. 12, located in tapchanger control 323, and then to a
FIG. 10 is an impedance diagram corresponding to the common ground with current supply transformer 304,
circuit of FIG. 8. thereby completing a loop for the ?rst current. A second load
FIG. 11 is a phasor diagram showing the addition of three current is obtained from current transformer 305 of and
paralleled unit output currents to form a single load current. ?ows through the primary 357 of an auxiliary current
FIG. 12 is a circuit diagram showing a circuit for mea transformer, not otherwise shown, located in tapchanger
surement of the phase angle between two currents. control 323, and from there through a contact 351 of AC
FIG. 13 shows the digital sampling of two current waves
voltage relay 350, through switch 371 contact 361 of unit
using the circuit of FIG. 12. control 321, through switch 370 contact 343 of unit control
320, through contact 332 of AC voltage relay 330, through
DESCRIPTION OF THE INVENTION primary 338 of an auxiliary current transformer, not other
wise shown, located in tapchanger control 322, and then to
In contrast to the prior art circulating current method of
20 a common ground with current supply transformer 305,
paralleling, FIG. 4 shows the present invention using a ring thereby completing a loop for the second current.
of 8 tapchanger controls 162 with a daisy chain connection
404 of analogs of load currents, wherein each control inputs Circuit breakers 301 and 308 are operable to remove
its own analog of load current and the load current of the tapchanging unit 313 from service, thereby removing volt
next tapchanging unit around the ring. While FIG. 4 shows age from relay 330. Circuit breakers 303 and 309 are
a ring of 8 tapchanging units with all circuit breakers 25 operable to remove tapchanging unit 314 from service,
omitted, it represents any number of paralleled tapchanging thereby removing voltage from relay 350.
‘units 410 which may be paralleled using the daisy chain Single phase transformer 306 furnishes AC voltage for
connections 404 for the load current circuits. Note that the tapchanger control 322 and AC voltage relay 330. Single
ring has neither a beginning nor an end. phase transformer 307 furnishes AC voltage for tapchanger
As indicated by two windings and an arrow, tapchanging 30 control 323 and AC voltage relay 350.
units are shown as load tapchanging power transformers, Upon loss of AC voltage, relay 330 drops out thereby
410, and are connected in parallel between input bus 402 and opening paths for the ?rst and second currents by means of
output bus 403. Analogs of units 410 load currents are contacts 331 and 332 and connecting the paths for the ?rst
carried from current transformers 107 to primary windings and second currents together by closing contact 333 thereby
of auxiliary current transformers 400 contained in controls automatically taking tapchanger control 322 out of service.
162 thence from windings 400 via conductors 404 to pri Upon loss of AC voltage, relay 350 drops out thereby
mary windings of auxiliary current transformers 401 con opening the ?rst and second currents by means of contacts
tained in each adjacent control 162 in a clockwise direction 351 and 352 and connecting the paths for the ?rst and second
around the loop and thence from the windings 401 to currents together by closing contact 353 thereby automati
grounds returning the current paths to the ground connec 40 cally taking tapchanger control 323 out of service.
tions on current transformers 107. High voltage bus 402 is Contacts 340, 341, 342 and 343 of switch 370 are manu
shown as a closed ring as is sometimes the industry practice. ally operable from unit control 320 to open the ?rst and
Bus 402 could be divided into sections, however, with each second currents, bypassing their paths and providing a
section fed from divergent points in the power supply ground return for the ?rst current thereby manually remov
45
network. The low voltage output bus 403 is shown with a ing tapchanger control 322 from service. Contacts 360, 361,
single break in the ring with all unit outputs operating in 362 and 363 of switch 371 are manually operable from unit
parallel. control 321 to open the ?rst and second currents, bypassing
With parallel sources of power, as for example provided their paths and providing a ground return for the second
by bus 402, no other conductors or communications circuits current thereby manually removing tapchanger control 323
are required between tapchanger controls 162 by the inven from service.
tive method for parallel operation. No other form of data Upon opening of contacts 331, 341, 363, or 352, the
exchange is required and the need for circulating current combination of triac 335 and zener diode 336 are operable
balance equipment is eliminated. The present inventive to provide a return path to ground for the ?rst current. Upon
method uses only the sign of the phase angle between the opening of contact 351, 361, 343, or 332, the combination of
analogs of load currents connected to each control with logic triac 355 and zener diode 356 are operable to provide a
determined in each transformer control wherein the controls return path to ground for the second current.
follow each other in tapchanging so as to minimize the Three phase high voltage bus 310 receives power from
differences in tap positions between units around the ring. transmission line 372. Three phase high voltage bus 311
Referring now to FIG. 5, a ring of transforming units is 60 receives power from transmission line 373. Circuit breaker
used to describe methods of automatically taking one unit 302 is closable to provide local parallel power feed to
out of service and leaving the others in operation. For clarity, tapchanging units 313 and 314 and openable to provide
only two units, 313 and 314 and their controls 320 and 321 power feed from divergent points in a power network (not
are shown in detail, however box 380 indicates where shown).
additional tapchanging units could be inserted. 65 Low voltage bus 312 feeds one or more sub~transmission
A ?rst load current is obtained from current transformer or distribution circuits 374, in parallel; receiving power via
304 and ?ows through the primary 337 of an auxiliary circuit breakers 308 and 309 when the breakers are closed.
 5,530,338
5 6
FIG. 7a illustrates an internal diagram of a transformer I2c could have been shown with polarity reversed as leading
and FIGS. 7b through 7g are phasor diagrams which are current ?owing into transformer T511 as a sink.
used hereinunder to explain the circulating current that ?ow FIG. 70 is the same as FIG. 7b but with about l/zoth of the
between transformers when connected in parallel. magnitude of load current. As can be seen, the angle between
The impedance of a tapchanging transformer is typically currents I1 and I2 is now approximately 60°.
0.05 per unit or 5% In FIG. 7a this is the ratio of series FIG. 7d shows currents I1 and 12 with zero load current.
impedance 504 to the sum of impedances 504 and 507 in Here the currents I1 and I2 are 180° apart and the sign of the
transformer T510 and the ratio of impedance 505 to the sum angle changes polarity, as it does again at zero degrees. The
of impedances 505 and 508 for transformer T511. The control 162 recognizes any phase angle between currents I1
and 12 as either positive or negative with no indeterminant
impedance actually consists of an inductance and resistance 10
conditions allowed.
in series with an XIR ratio, at 60 Hertz, as high as 100. FIG. 7e is similar to FIG. 7a and shows a load current that
Because of this high ratio, it is common practice to assume is 45° lagging (a power factor of 70.7). Here the angle to be
that the resistive component is Zero and henceforth here only sensed is reduced to a value of 0.70><6° or 42".
the inductive portions are shown in FIG. 7a. FIG. 7f is similar to FIG. 7e but with approximately 1/zoth
Other parts of FIG. 7a consist of the high voltage (HV) of the magnitude of load current. Here again the angle has
power feed 501 to transformers T510 and T511, a power increased, perhaps to 30°.
output bus 502, input impedances 503 and 506, and ground This analysis shows that, under some conditions, the
or neutral circuit 509. The load impedance for the parallel present inventive method of paralleling requires rather accu
connection of the two transformers consists of a series rate measurement of AC voltages and relative phase angles
combination of resistance R and reactance X. of two currents. A system and programming means and
methods for use with the present invention for obtaining
A single step difference in switch 104 (see FIGS. 2 and 6) accurate measurements by the zero crossing method of
positions will cause a 5/s% difference in the internal trans phase angle measurement are disclosed in US. Pat. No.
former voltages E1 and E2 each driving current through the 5,315,527 issued to Robert W. Beckwith, the inventor herein
transformer impedances 504 and 505 respectively to a and in US patent application Ser. No. 08/246,630, ?led by
25
common paralleling connection point 502. Thus with typical Robert W. Beckwith on May 20, 1994. U5. Pat. No.
values of 5% for transformer impedances 504 and 505, the 5,315,527 and US. application Ser. No. 08/246,630 are
5/2;% difference in voltages E1 and E2 will cause a current to incorporated herein by reference.
circulate between the transformers T510 and T511 of I=EIZ The accuracy of the voltage measurement assures proper
or in the example given: coordination of the band edge voltages on the various
30
controls. The effective bandwidth is from the highest voltage
limit of one control to the lowest voltage limit of the other
I=0.0625%/(2><0.05)=0.625% current
control. With the accuracy of +/—O.l% in determining volt
where 100% is full load current. age magnitude obtainable from use of the above referenced
Since the transformer impedance is inductive, the circu patent and patent application, this widening will be so small
lating current will be 90 degrees displaced from unity power as to be negligible.
factor load current. Assuming transformer T510 is on the An further inventive improvement in accuracy and sim
higher tap and as a result voltage E1 exceeds voltage E2. pli?cation in measurement of the phase angle between two
With no external R and X load, transformer T510 load current signals is described hereinunder, capable of deter
current I1 (the circulating current) will therefore lead the 40 mining the relative phase angle between two current waves
parallel output voltage EL by 90° and transformer load to within +/—0.22° which is adequate for the present inven
current I2 (the reverse of the circulating current) will lag the tive method of paralleling as indicated above using FIG. 7a
parallel output voltage EL by 90°. Note that it is common through 7g. Suitable accuracy may be possible using other
industry practice to call a provider of leading current a known methods of determining relative phase angles of two
source of VARs and a provider of lagging current a sink for 45 currents.
VARs. Therefore a paralleled transformer with a higher The inventive method blocks the raise commands to move
internal voltage is termed the source of circulating current the tap position to raise the voltage, but permits lower
and paralleled transformers with a lower internal voltage commands to move the tap position to lower the voltage
termed sinks for circulating current. when the ?rst load current leads the second load current, as
The reactive current which circulates between two trans 50 represented by an upward arrow, T, in Table 1. Conversely,
former units T510 and T511 when connected in parallel the inventive method blocks lower but permit raise where
creates a load current phase difference between the two the ?rst load current lags the second load current, as repre
transformers. The difference may be due to a difference in sented by a downward arrow, i, in Table 1. In both
tap position between the paralleled units or may be due to instances, this permits only the control which should make
slight differences in the manufacture of the transformers. 55 a tap change to do so, thereby keeping the tapchangers
FIG. 7b is a phasor diagram for a full resistive load on the together. The performance is better understood by following
parallel combination where transformer load currents I1 and several typical sequences of operation illustrated by Table l
I2 are shown together with the load current I1 ?owing and the accompanying explanation.
through R. With 5% transformer reactances, the phase angle It is conventional practice for tapchanger controls to have
between the two transformers individual output currents I1 60 a bandwidth of from 2 to 6 Vac. The tapchanger does not
and I2 will be the angle whose tangent is approximately 0.1 operate so long as the measured voltage is within the band
giving an angle of approximately 6 degrees. and therefore this invention does not correct tap differences
Phasor I1c of FIG. 7 b is the component of leading reactive until the measured voltage goes above or below the band
current ?owing out of transformer T510 and phasor He is edges for durations of time T or T+T' as described here
the component of lagging current ?owing out of transformer 65 inunder.
T511. Phasor I2C cancels phasor 110 so that no reactive 1) For a ?rst elementary example, assume that two units
current ?ows through load resistor R. Equivalently phasor are connected in parallel as illustrated by FIG. 5 and
 5,530,338
7 8
initially are on the same taps with the voltage within the LEGEND FOR TABLE 1
band. Now assume that the voltage goes only a slight
Trl, Tr2, . . . Trn: Paralleled units 410, number l through
amount below the band, say 0.1% and stays there for
number n. See FIG. 4 where n=8 and the choice of num
some time. Assume slight differences in voltage mea
bering around the ring is arbitrary.
surement, causing the ?rst control 313 to time out and 5
raise its switch one tap. This will cause a 5/s% increase T under Trx means tap logic allows a move to a higher tap.
in transformer 313 internal voltage but this causes only l under Trx means tap logic allows a move to a lower tap.
5/16% increase in the voltage at the point of paralleling TAP: Tap position
with the transformers’ impedances 313 and 314 acting The inventive method is very nonlinear as compared to
as a voltage divider. Assume that the voltage returns to 10 the circulating current method and therefore its performance
within the band and therefore no correcting change is can best be explained by listing a series of tapchanging
made. It is well known that the added loss due to a one operations of a ring of paralleled units, as shown in FIG. 4,
step diiference is small and is accepted so long as a and by making assumptions as to the conditions of each
forthcoming change in voltage leads to correction. paralleled unit and the errors of measurement after each step
as illustrated in Table l. The following is a list of those
2) Assume next, that the voltage again goes a slight 15 assumptions and their explanation. The list is numbered to
amount below the band. The ?rst control, on the correspond with the steps of Table l. The numbered lines
transformer whose tap is high, measures a leading show the tap positions of each paralleled unit which result
angle and is properly blocked from raising and there from the previous line conditions together with the direc
fore caused to wait for the second control 323, whose tional arrows indicating the next allowable switch change
tap is low. The second control 323 measures a lagging 2° for each unit after time T.
angle and is permitted to raise its tap after time T, thus The rules which the inventive control follows are:
eliminating the tap position dilference. 1) With T showing, a raise output is given after an
3) Assume now that instead of the action described under integrated
‘ low voltage out of band condition is seen for
paragraph 2), above, that the voltage slowly goes to the [H116 T
. . . . . - 25

upper band limit. During this t1me, the one tap differ 2) With T showing, a lower output is given after an
ence will persist, however will be corrected in the ?rst integrated low voltage out of band condition is seen for
excursion above the band as follows: The ?rst control time T+T'
322 on the transformer 313 whose tap is high again 3) With l showing, a lower output is given after an
measures a leading angle and is properly blocked from integrated high voltage out of band condition is seen for
raising but lowers its tap as its timer times out. The 30 time T.
second control, measuring a lagging angle is blocked 4) With 1, showing, a raise output is given after an
from lowering and forced to wait for the ?rst control to integrated high voltage out of band condition is seen for
sense the above band condition and to time out. time T+T'_
It is seen by these examples that at band edges, the logic 5) A change in the sign of the angle resets the timers.
driven by the relative phase angle causes controls and the 35
associated transformer to alternate in their response to out of 6) Any tap change resets the timers.
band conditions. This alternation can result in a one step 7) A voltage return to within the band reset the timers.
difference to persist while the voltage goes from one band A ?rst illustrative tapchange sequence uses lines 1)
edge to the other, however this acceptable one step differ through 6) of Table l.
ence is generally the limit which the inventive scheme will 40 1) This starting condition is arbitrarily set to show a
allow. potential hang-up condition. All units are on tap 5 in

TABLE 1
Trl Tap Tr2 Tap Tr3 Tap Tr4 Tap Trn Tap
1) T 5 T 5 T 5 T 5 T 5
2) T 4 l 4 T 4 T 4 T 4
3) l 4 T 3 T 4 T 4 T 4
4) T 3 T 3 T 4 T 4 l 4
5) T 3 T 3 T 4 T 4 T 3
6) T 3 T 3 T 3 T 3 T 3
7) T 3 T 6 T 6 T 6 l 6
s) T 4 T 7 T 7 l 7 l 6
9) T 5 T 8 l s l 7 l 6
10) T 6 l 9 l s l 7 T 6
11) T 7 l 9 l s T 7 T 7
12) T s l 9 T s T s T s
13) T 9 T 9 T 9 T 9 T 9
14) l 9 l 7 T 5 T 6 T 8
15) l s l 6 T 5 T 6 l s
16) l 7 l 5 T 5 T 6 T 7
17) l ' 6 T 4 T 5 T 6 l 7
is) l 6 T 5 T 6 l 7 l 7
19) l 5 T 5 l 6 T 6 l 6
20) T 4 T 5 T 5 l 6 l 5
21) T 5 l 6 T 6 l 6 T 5
22) T 5 T 5 l 6 T 5 T 5
T 5 l 5 l 5 T 5 l 5
 5,530,338
9 10
which case, in theory, the two currents to each control This results in line 5 of Table l.
should be identical. We ?rst assume that small errors 5) Assume that the voltage remains high and that units Tr3
are consistent and that each control chooses+as the and Tr4 continue to time out to T+T' time upon which
relative phase angle of the currents, that the voltage is each will move to tap position 3.
high and thus each control calls for a lowering of the This results in line 6 of Table l.
tap position in T+T' time. 6) And all units are on the same tap!
Assume that all controls time out in nearly the same time
A second illustrative tapchange sequence uses lines 7)
and moreover assume that the control logic is such that, once
a tapchange is started it continues until the control receives through 13) of Table l.
a counter contact 108 (see FIG. 4) transition indicating that 7) Now assume that unit Tr3 is taken out of service and
the tapchange is complete. Thus, each tapswitch lowers from that all other units have moved to tap 6. Then assume
tap 5 to tap 4 even though the total time required for each that unit Tr3 is placed in service without having its tap
switch to do so is variable. position corrected to position 6 as it could have been
Once all are on tap 4, the relative current angles are likely manually. The voltage is within the band and all timers
to me measured as + for the same reasons as when all were have reset.
on tap 5 in step 1. One reason for a deviation with tap 15 Assume that the voltage goes down and that all timers
position, however, is that the actual tap position may vary time out to time T. Since Trl sees its own load current as
slightly in manufacture of the transformer, giving a slight well as Tr2, it assigns + thereby permitting an increase to tap
voltage di?’erence between units even though on the same 4. Tr2 sees its own load current as well as Tr3. Since both
tap. To illustrate this phenomena we assume that unit Tr3 has are on tap 6, by chance Tr2 assigns + thereby permitting an
a slightly lower voltage than the other units which are increase to tap 7. Tr3 sees its own load current as well as Tr4.
essentially the same as each other. Since both are on tap 6, by chance Tr3 assigns + thereby
Unit Tr3 load current then lags the other units. Since Tr3 permitting an increase to tap 7. Tr4 sees its own load current
measures its own load current as well as its companion Tr4,
as well as Trn. Since both are on tap 6, by chance Tr4
it assigns + to the relative phase angle, thereby permitting a
tap raise. Unit Tr2 also measures unit Tr3 load current and 25 assigns+thereby permitting an increase to tap 7. Trn sees its
assigns + to the relative current phase angle and permits a own load current as well as Trl. Due to the difference in tap
lowering of its tap position. Unit Tr4 compares its current to positions, Trn assigns — thereby indicating a decrease to tap
that from Tm; Trn compares its current to that from Trl; and 5, however the change is blocked until T+T' time.
Trl compares its current to that from Tr2. These pairs of This results in line 8 of Table l.
currents are theoretically in phase and again it is assumed 8) Assume that the voltage returns to within the band
that Tr4, Trn, and Trl assign a + thereby only permitting tap resetting timers T and T‘, then goes down again and that
raises in time T. all timers time out to time T. Since Trl sees its own load
This results in line 2 of Table l. current as well as Tr2, it assigns + thereby permitting
2) Now assume that the voltage has returned to within the an increase to tap 5. Tr2 sees its own load current as
band, resetting all timers and then goes up again. Tr2 35
well as Tr3. Since both are on tap 7, by chance Tr2
then times out in time T, lowering its tap to position 3. assigns +Vthereby permitting an increase to tap 8. Tr3
This results in line 3 of Table l. sees its own load current as well as Tr4. Since both are
3) Unit Tr2 load current then lags the other units. Since on tap 7, by chance Tr3 assigns+thereby permitting an
Tr2 measures its own load current as well as Tr3, it increase to tap 8. Tr4 sees its own load current as well
assigns + to the relative phase angle, thereby permitting 40
as Trn. Due to the difference in tap positions, Tr4
a tap raise. Unit Trl also measures unit Tr3 load current assigns — and is blocked from making a tap change;
and assigns — to the relative current phase angle and staying on tap 7. Trn sees its own load current as well
permits a lowering of Trl tap position. Unit Tr3 com as Trl. Due to the difference in tap positions, Trn
pares its current to that from Tr4, Tr4 compares its assigns — and is blocked from making a tap change;
current to that from Trn, and Trn compares its current 45 staying on tap 6.
to that from Trl. These three pairs of currents are This results in line 9 of Table l.
theoretically in phase and again it is assumed that Tr3, 9) Assume that the voltage returns to within the band
Tr4, and Trn assigns + to the phase angle measurements resetting time T, then goes down again and that all
thereby permitting only tap raises in time T. timers time out to time T. Since Trl sees its own load
Now assume that the voltage has returned to within the 50 current as well as Tr2, it assigns + thereby permitting
band, resetting all timers and then goes up again. Trl then an increase to tap 6. Tr2 sees its own load current as
times out in time T, lowering its tap to position 3. well as Tr3. Since both are on tap 7, by chance Tr2
This results in line 4 of Table l. assigns + thereby permitting an increase to tap 9. Tr3
4) Unit Trl and Tr2 load currents then lags the other units. sees its own load current as well as Tr4. Due to the
Since Trl measures its own load current as well as Tr2, 55 diiference in tap positions, Tr3 assigns — and is blocked
it assigns + to the relative phase angle, thereby permit from making a tap change; staying on tap 8. Tr4 sees its
ting a tap raise. Unit Trn also measures unit Trl load own load current as well as Trn. Due to the diiference
current and assigns — to the relative current phase angle in tap positions, Tr4 assigns — and is blocked from
and permits a lowering of its tap position. Unit Tr3 making a tap change; staying on tap 7. Trn sees its own
compares its current to that from Tr4 and Tr4 compares load current as well as Trl. Due to the difference in tap
its current to that from Trn. These two pairs of currents positions, Trn assigns —- and is blocked from making a
are theoretically in phase and again it is assumed that tap change; staying on tap 6.
Tr3 and Tr4 assign + to the relative phase angle This results in line 10 of Table 1.
measurements thereby permitting tap raises. l0) Assume that the voltage returns to within the band
Now assume that the voltage has returned to within the 65 resetting time T, then goes down again and that all
band, resetting all timers and then goes up again. Trn then timers time out to time T. Since Trl sees its own load
times out in time T, lowering its tap to position 3. current as well as Tr2, it assigns + thereby permitting
 5,530,338
11 12
an increase to tap 7. Tr2 sees its own load current as a transformer is non-linear for two reasons. First the mag
well as Tr3. Due to the di?’erence in tap positions, Tr2 nitude of the vector sum of the real and reactive components
assigns — and is blocked from making a tap change; of current increases non-linearly as the square root of the
staying on tap 9. Tr3 sees its own load current as well sum of the squares of the two components. Secondly, the life
as Tr4. Due to the difference in tap positions, Tr3 of the units decreases non-linearly with overload conditions
assigns — and is blocked from making a tap change; reaching a point where sudden and catastrophic failure
staying on tap 8. Tr4 sees its own load current as well results. When two units are overloaded, any unbalance in
as Trn. Due to the difference in tap positions, Tr4 paralleling reduces the temperature of one unit and increases
assigns — and is blocked from making a tap change; the temperature of the other thereby reducing the life of the
staying on tap 7. Tm sees its own load current as well hotter unit and causing costly power losses in the combina
as Trl. Due to the difference in tap positions, Tm tion of units.
assigns - and is blocked from making a tap change; FIG. 8 shows one situation where the source voltage of
staying on tap 6. two paralleled transformers may be out phase with each
This results in line ll of Table 1. other. Transformer 801 and 803 operate in parallel to supply
11) Now assume that the voltage has returned to within 15 power to 69 kV bus 812. Transformer 802 supplies power to
the band, resetting all timers and then goes down again. 115 Kv bus 818 and also supplies power to the primary of
Trl, Tr4 and Tm then time out in time T, and raise their paralleled transformer 803. The effect of current I3 into load
taps to position 8. The other units remain blocked 816 on the 115 kv bus 818 together with current 14 feeding
immediately after time T. power to transformer 803 will cause a phase shift between
This results in line 12 of Table l. primary and secondary voltage of transformer 802 as a result
12) Now assume that the voltage has returned to within of the impedance of transformer 802. Thus the voltage of the
the band, resetting all timers and then goes down again. 115 Kv bus 818 will not be in phase with the 230 Kv bus
Trl, Tr3, Tr4 and Trn then time out in time T, and raise 800.
their taps ‘to position 9. Unit Tr2 is blocked from raising An unmodi?ed paralleling scheme as described above or
and therefore remains on tap 9 along with all other as in prior art minimizes circulating current I2 and makes
units. current I4 equal to 11. Because of the difference in phase
13) Again, all units are on the same tap! angle between transformer 801 source voltage 800 and
A third illustrative tapchange sequence uses lines 14) transformer 803 source voltage 818, the power ?owing
through 23) of Table l. through transformers 801 and 803 will be unequal. The
30
heating of transformers 801 and 803 will therefore not be
14) Now assume that units have been placed on various balanced even with proper operation of an unmodi?ed
taps as shown on line 14 for the purpose of demon
paralleling scheme. It is desirable, therefore, when source
strating convergence of the inventive method of paral voltages and currents are not in phase with each other, to
leling. From the above 13 steps it can be seen that
balance the currents through each paralleled transformer so
simpli?ed rules can be stated: 35 as to equalize the temperature rise of the two transformers.
Rule A. When the unit to the right is on a higher tap, the
Solution of the electric power network together with LTC
arrow is T; when on a lower tap the arrow is i; when transformers operated with outputs in parallel may be quite
on the same tap the arrow is chosen by chance.
complex. A matrix of answers may be computed and stored
Rule B. If a unit has an up arrow and the voltage goes as a table lookup for operation of transformers with outputs,
down, the unit will move to the next higher tap in the 40 but not inputs, in parallel. Such a table is formed with the
next line. real and imaginary components of the sum of paralleled
Rule C. If a unit has a down arrow and the voltage goes transformer output currents as two dimensions of the lookup
up, the unit will move to the next lower tap in the next matrix. The answers are stored as correction angles are
line. stored for the controllers for all paralleled transformers.
45
Rule D. If a unit is blocked by the direction of its arrow Note that the correction angles are the diiferences in the load
in a ?rst line and if the voltage does not return to within current phasor angles progressing around the ring of paral
the band in a second line then the unit can move in the leled units and therefore the sum of the correction angles
direction opposite to its arrow in a third line. must be zero.
15) Assume that the voltage goes above the band and 50 This inventive process is useful with all networks where
follow the rules. such a table can be made. Note further that such a table may
In steps 16 through 23, assume that the voltage returns to not be feasible for all possible paralleled networks.
the band, resetting the timers and then goes above the band, The inventive process, therefore, is to communicate the
and follow the rules. phasor values of each unit’s load current from each control
23) Again the units are on the same tap 55 to a central computer where a phasor sum is made and
No formal closed proof in a strict mathematical sense is answers determined from a lookup table for transmission
known that establishes that the inventive method will always back to the controls.
bring paralleled units to the same tap or to some limiting For example, refer to FIGS. 1a and 9 wherein FIG. 9
number of tap di?erences; however all examples empirically shows one representation of the network of FIG. 1a with
analyzed appear to show that this is the case. 60 breaker 4 open. Impedances R1 and X1 represent the power
input line 1, and R6 and X6 represents the power input line
DIFFERENCES IN INPUT POWER SOURCE 2. Impedances R2, X2, R4, X4, G1, and B1 together with an
VOLTAGES assumed perfect transformer T1 represent unit 9. Imped
ances R3, X3, R5, X5, G2, B2 together with an assumed
It is instructive to consider the consequences of unbalance 65 perfect transformer T2 represents unit 10. Impedances R7,
with two paralleled units having source voltages which are X7, R8, X8, G3, B3, together with an assumed perfect
not in phase. The heating effect of reactive current through transformer T3 represents unit 11. Impedances G4 and B4
 5,530,338
13 14
represent the load on paralleled bus 57 of FIG. 9, which Microprocessor 421 of control 162, preferably a Motorola
consists of busses 24, 25 and 15 of FIG. 1 with breakers 22 HCl1E9, having ADC 422, ROM 423, RAM 424, EEPROM
and 23 closed. 426, asynchronous port 425, CPU 428, oscillator 429, ADC
FIG. 11 illustrates how phasors representing currents I1, control registers 430 controlled by NC control status reg
12, and I3 shown on FIG. 9 add to form the bus 57 load ister (ADCTL) 431. The frequency of oscillator 429 is
controlled by crystal 435. Port 425 is connected to remote
current IL (of FIG. 9). FIG. 11 shows currents I2 and I3
personal computer 381 by a cormnunications path 383, see
twice, once adding head to tail to phasor I1 to form IL, and also FIG. 5. Raise and lower outputs R and L, see FIGS. 6
also shown emanating from the origin where they are more and 12, are provided by ports B & C 427. Power for the
easily related to phase reference phasor E57 representing the microprocessor is provided by supply 420, which also
voltage on bus 57 of FIG. 9. FIG. 11 also shows phasor provides ADC voltage references VRH and VRL.
difference angles 11-2, I2-3 and I3-1. These are the angles Using techniques described in the above mentioned patent
whose signs are used to determine the sequence of
application, Ser. No. 08/246,630, ADCTL 431 is set to
tapchanges explained in relation to Table 1, above. Note that control ADC 422 to sample ADC inputs A4, A5, A6, and A7
angle 11-2 is negative since 12 occurs earlier in time than I1.
sequentially into registers 430 in the corresponding order
Angle 12-3 is positive since I3 occurs later in time than I2
R1, R2, R3 and R4 and to continue this sequence of
and 13-1 is also negative since I1 occurs earlier than 13.
sampling in daisy chain fashion. The CPU program then
FIG. 10 depicts one representation of the power network samples the registers in the same order, thereby obtaining
of FIG. 8 wherein again angular displacements are deter alternate samples 441 of signal 440 and samples 442 of
mined for units 801, 802 and 803 to produce a desired signal 443 (see FIG. 13). Table 2 illustrates a sampling
20
balance of losses between the three units. Impedances R9 sequence.
and X9 represent the line from bus 800 to the primary of
transformer 801. Impedances R10, X10, R11, X11, G4, B4, TABLE 2
and assumed perfect transformer T4 represent transformer
Signal 440 0 * * * * 0
801. Impedances R12 and X12 represent the line from bus
800 to the primary of transformer 802. Impedances R13, 25 .
Signal 443
\ 0
/ \ *
/ \ *
/ \ *
/ \ /
X13, R14, X14, G5, B5 and assumed perfect transformer T5
Sample # t0 tl t2 t3 . . . . . . . . . . . t4 t5 t6 17
represent transformer 802. Impedances G7 and B7 represent
the load on bus 818. Impedances R15 and X15 represent the
line from bus 818 to the primary of transformer 803. Count of tiks 0 0 3 4 . . . . . . . . . . . . . . . . . . . 33 34

Impedances R16, X16, R17, X17, G6, B6 and assumed

perfect transformer T6 represent transformer 803. Imped
ances G8 and B8 represent the load on bus 812. Where 0 means that the signal sample is zero and * means
There are many network representations, similar to those the signal sample was non-zero.
demonstrated in FIGS. 9 and 10, corresponding to the many At the leading edge, signal 440 leads signal 443 by:
con?gurations of power networks and related LTC trans
formers. In general, these phasor representations of such
networks are reduced to lookup tables of correction angles 3-4X-1 tik
for entry into unit controls to enable the controls to change
taps so as to maintain a desired balance of the units involved, 40 At the trailing edge, signal 440 leads signal 443 by:
such as a balance in temperature rise.
For example, tapchanger control 804, controlling trans
former 801, provides data including the phasor components
in load current I1 from currenttransformer 807 over com The average is (—l+—l )/2=—l tik, and the sign is negative.
munications channel 814 to computer 816. In a similar The CPU program starts synchronously with the setting of
manner, tapchanger control 806, controlling transformer ADCTL 431 so as to identify the ?rst sample as coming, say,
803, provides data including the phasor components in load from signal 440. It ?rst looks for all zero samples, as at
current I4 from current transformer 809 over communica samples t0 and t1. It then looks for the ?rst +, as at sample
tions channel 815 to computer 816. Using the current data t3 and records the count of tiks, 3, as the time mark for a znz
supplied to computer 816 by controls 804 and 806, together 50 transition of signal 440. It then looks for the ?rst succession
with the afore mentioned look-up tables, computer 816 of two +’s as at sample t4 and records the count of tiks, 4,
determines the appropriate phase angle corrections and as the time mark for aa znz transition of signal 443. Counting
sends them to controls 804 and 806. the number of samples from the setting of ADCTL, it
FIG. 12 shows a circuit for a tapchanger control 162, see records the count, for example 33 in Table 2, when the ?rst
also FIG. 4. The circuit uses the means and methods of non-zero is obtained and then also records the count,-'for
above referenced patent US. Pat. No. 5,3l5,527. The cur example 34, when successive samples are both non-zero. It
rent from current transformer 107 enters primary 400 and by thus records time in tiks of the non-zero to zero transition
its secondary, not shown, induces a voltage signal, I1, (nzz) of signal 440 and also the (nzz) transition of signal
proportional to the current across capacitor C1. The signal I1 443. As used in reference patent application Ser. No. 08/246,
is scaled by resistors R72 and R73, protected by diode D71, 60 630, a tik is de?ned as the time in CPU clock cycles for the
and connected to analog to digital (ADC) inputs A4 and A6 ADC to take a sample.
of microprocessor 421. Likewise, current from the adjacent The phase angle difference between 11, represented by
unit control 162n, enters primary 401, of control 162a (see signal 440 of FIG. 13, and I2, represented by 443 of FIG. 13,
FIG. 4) and by its secondary, not shown, induces a voltage is proportional to the average between a ?rst difference in
signal I2 across capacitor C2. The signal I2 is scaled by 65 records of counts of tiks between the znz transitions of
resistors R74 and R75, protected by diode D72, and con signals I1 and I2 and a second difference in records of tiks
nected to ADC inputs A5 and A7. at the nzz transitions of I1 and 12. As shown in FIG. 13, I1
 5,530,338
15 16
leads I2 and the arrow will be l for use in Table 1, above. b) permitting tapchanges which lower the tapswitch posi
Note that signal II, in FIG. 12 is shown coming through tion of said ?rst tapchanging unit and blocking those
transformer 400 which relates to FIG. 4. It therefore repre tapchanges which would raise said tapswitch position
sents the load current from some control 162’s own unit 410. when said ?rst AC load current phase leads said second
In like manner, current 12, coming through transformer 401 AC load current phase,
represents load current from an adjacent unit 401. c) permitting tapchanges which raise the tapswitch posi
The circuits and methods described by FIGS. 11 and 12 tion of said ?rst said tapchanging unit and blocking
allow resolution of the phase angle dilference between two those tapchanges which would lower said tapswitch
signals to within one tik. Using the preferred Motorola position when said ?rst AC load current phase lags said
HCll microprocessor, the ADC updates in 32 clock cycles. 10 second AC load current phase,
With a 3 megabit clock, a tik is then 10.07 microseconds or d) initiating said permitted tapchanges after duration of a
0.218o of angular resolution; well within the requirements ?rst time T, and
developed above. e) initiating said blocked tapchanges after-duration of a
second longer time T+T'.
ADVANTAGES OF THE INVENTION
3. A method as in claim 1 further including the step of
1) Fewer components required. seeking the same time of occurrence of said AC load
currents.
2) No trial and error adjustments required. 4. A method as in claim 1 further including the step of
3) Better'tracking of tap position than generally obtain seeking the same tap positions on all units.
able with the prior art circulating current method. 20 5. A method as in claim 1 further including the step of
4) Is usable with transformers having outputs connected providing a phase angle bias for each of said control
in parallel and with inputs supplied from non-paralleled whereby said controls cause tap switches to move to seek
sources. desired relations between times of occurrence of all said
While the invention has been particularly shown and load currents.
described with reference to a preferred embodiment thereof, 25 6. A method as in claim 1 further including the steps of:
it will be understood by those skilled in the art that various a) disconnecting a selected unit and its control from said
changes in form and in details may be made therein without ring,
departing from the spirit and scope of the invention. b) reconnecting the remaining unit’s controls in a ring
I claim:
whereby the remaining units continue to operate in the
1. A method for utilizing alternating current (AC) voltage 30 same manner as in claim 1.
controlling load tapchanging transformers and regulator/ 7. A method as in claim 1 further including the steps of:
transformer combinations (tapchanging units) each having
AC load currents connected to a common paralleling output a) providing each said control with positive half cycles of
point, wherein said tapchanging units have tapswitches with a ?rst AC signal representive of said load current of
multiple tap positions and controls to selectively cause said said ?rst unit,
35
tapswitches to move to selected tap positions, said method b) providing each unit control with positive half cycles of
comprising of the steps of: a second AC signal representive of said load current of
a) forming a ring connection of said controls, said second unit,
b) determining the AC load current ?owing from each c) sensing which full positive half cycle of said ?rst and
said tapchanging unit to said common paralleling out second current signals comes ?rst in time, and
put point, d) selectively raising and lowering tapswitches in
0) combining pairs of AC load currents provided by a ?rst response to said ?rst in time determination by each said
unit and a second unit, said second unit being adjacent control.
to said ?rst unit in a selected direction around said ring, 8. Apparatus including alternating current (AC) voltage
45 controlling tapchanging units having AC load currents each
d) each said control determining the relative time of with a distinct phase connected to a common paralleling
occurrence of the cycles of said combined pair of AC
output point, control means for said tapchanging units
load currents, and
having tapswitches with multiple tap positions providing
e) utilizing said determinations to cause said tapswitch to selected output voltages, said controls causing said
move to seek desired relations between times of occur— 50 tapswitches to move to selected tap positions, said apparatus
rence of all said AC load currents. comprising in combination:
2. A method for utilizing alternating current (AC) voltage a) said control means controlling a ?rst tapchanging unit
controlling load tapchanging transformers and regulator/ and including means for sensing the AC load current of
transformer combinations (tapchanging units) each having said unit,
?rst and second AC load currents of distinct phases depen 55
dent on the associated tapchanging unit, and said currents b) said sensing means connected to provide pairs of AC
being connected to a common paralleling output point, load currents in a daisy chain con?guration,
wherein said tapchanging units have tapswitches with mul c) said sensing means sensing the AC load current in each
tiple tap positions and tap changing controls, said controls unit and the AC Load current in an adjacent unit in one
selectively measuring the duration of time of AC voltages direction around said daisy chain con?guration,
above and below upper and lower AC voltage bandedges to d) said sensing means determining which current of each
selectively cause said tapswitches to move to selected tap said pair leads in phase, and
positions, said method comprising the steps of: e) said daisy chain con?guration enabling said control
a) sensing the AC load current on a ?rst Of said tapchang means to react to said determinations to cause said
ing units being controlled and sensing the AC load 65 tapswitches to move to selected tap positions to estab~
current on a second tapchanging unit, said second unit lish desired relations between the phases of all said AC
being adjacent to said ?rst tapchanging unit, load currents.
 5,530,338
17 18
9. A method as in claim 2 further including the steps of: said time T+T' when said ?rst load current lags said
a) raising said tapswitch one tap position in response to second load current, and
said voltage being below said voltage bandedge after d) raising said tapswitch one tap position in response to
said time T when said ?rst load current lags said second said voltage being above said voltage bandedge after
load current,
said time T+T' when said ?rst load current leads said
b) lowering the tapswitch one tap position in response to
second load current
said voltage being above said voltage bandedge after
said time T when said ?rst load current leads said whereby the combined control action precludes potential
second load current, blocking conditions.
c) lowering said tapswitch one tap position in response to
said voltage being below said voltage bandedge after *****