MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)

Topic 1: - Basics of Microprocessor Marks:08

 Evolution of Microprocessor and its types:-

 8085 Microprocessor:-
o Salient features
o Pin description
o Architecture of 8085
o Functional Block diagram and register organization

Introduction about microprocessor:-

o The word comes from the combination micro and processor.
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o Processor means a device that processes whatever.
o In this context processor means a device that processes numbers, specifically binary numbers, 0’s
and 1’s.
o In the early 1970’s the microchip was invented.
o All of the components that made up the processor were now placed on a single piece of silicon.
o The size became several thousand times smaller and the speed became several hundred times faster.
The “Micro-Processor” was born.

“The microprocessor is a programmable device that takes in numbers, performs on them arithmetic or logical
operations according to the program stored in memory and then produces other numbers as a result”.

Let’s expand each of the underlined words:-

Programmable device:
o The microprocessor can perform different sets of operations on the data it receives depending on the
sequence of instructions supplied in the given program.
o By changing the program, the microprocessor manipulates the data in different ways.
Instructions:
o Each microprocessor is designed to execute a specific group of operations. This group of operations is
called an instruction set.
o This instruction set defines what the microprocessor can and cannot do.

Data source:
o The data that the microprocessor manipulates must come from somewhere. It comes from what is called
“input devices”.
o These are devices that bring data into the system from the outside world.
o These represent devices such as a memory, keyboard, a mouse, switches, and the like.

Memory:-
o Memory is the location where information is kept while not in current use.
o Memory is a collection of storage devices.
o In most kinds of memory, these storage devices are grouped into groups of 8-bit.
o These 8 storage locations can only be accessed together.
o So, one can only read or write in terms of bytes to and from memory.
o Memory is usually measured by the number of bytes it can hold.
o It is measured in Kilos, Megas and lately Gigas.
o A Kilo in computer language is 210 =1024. So, a KB (KiloByte) is 1024 bytes. Mega is 1024 Kilos and
Giga is 1024 Mega.
o When a program is entered into a computer, it is stored in memory. Then as the microprocessor starts
to execute the instructions, it brings the instructions from memory one at a time.
o Memory is also used to hold the data.
o The microprocessor reads (brings in) the data from memory when it needs it and writes (stores) the
results into memory when it is done.

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Memory organization

Output:
o For the user to see the result of the execution of the program, the results must be presented in a human
readable form.
o The results must be presented on an output device.
o This can be the monitor, a paper from the printer, a simple LED or many other forms.

Basic block diagram and operation of microcomputer system:-

Address bus

Memory Peripherals
(I/O devices)
Central (RAM, ROM, etc) (Monitor, mouse,
Processing unit keyboard, etc)

(CPU)
Data bus

Control bus

 The internal working of the computer is divided into 3 parts:-

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o CPU (central processing unit):-
 A central processing unit (CPU) is the hardware within a computer that carries out
the instructions of a computer program by performing the basic arithmetical, logical,
and input/output operations of the system.
 All modern CPUs are microprocessors, meaning contained on a single chip.
 The CPU executes (process) the information stored in the memory (which can be temporary or
permanent), to perform the operation or to display it on monitor.
 The CPU is connected to the memory and I/O devices through strips of wire called “bus”.
 For a device (memory or I/O) to be recognized by the CPU, it must be assigned a unique address.
o Memory:-
 For the CPU to process the information, the data must be stored in the RAM or ROM.
 The function of the ROM in the computer is to provide information that is fixed and permanent,
such as tables for character patterns to be displayed on the monitor.
 The RAM is used to store information that is not permanent and can change with time, such as
variations in the versions of the operating system.
o Peripherals (I/O devices):-
 The function of I/O devices such as keyboard, monitor, etc is to provide a means of
communicating to the CPU.
 Buses:-
o The bus carries information from place to place inside a computer just as a street bus carries people from
place to place.
o In every computer there are three types of buses: - address bus, data bus and control bus.
 Address bus:-
 For a device (memory or I/O) to be recognized by the CPU, it must be assigned a unique
address.
 The CPU puts address on the address bus, and the decoding circuit finds the device.
 The more address buses available, the larger the number of devices that can be addressed.
 “The group of lines (bus) which carries the address of the device is called as address
bus”.
 Address bus is a unidirectional, which means that the CPU uses the address bus only to
send out addresses.

 Data bus:-
 “The group of lines (bus) which carries information (data) is called data bus”.
 The CPU uses the data bus either to get data from that device or to send data to it.
 Data busses are bidirectional, since CPU must use them to either to receive or
send data.
 Control bus:-
 “The group of lines (bus) which carries control signals is called data bus”.
 The control buses are used to provide read or write signals to the device to
indicate if the CPU is asking for the information or sending it information.
 The control bus is unidirectional.

 Evolution of Microprocessor and its types:-

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 Features of 8085 microprocessor:-

1. It is an 8-bit microprocessor i.e. it can accept, process or provide 8-bit data simultaneously.
2. It operates on a single +5 Volts power supply connected at VCC.
3. It operates on the clock cycle with 50 % duty cycle.
4. It has on-chip clock generator.
5. It can operate with the 3 MHZ clock frequency.
6. It has 16 address lines (A0 to A15), hence it can access 64 Kbytes (216=65536≈64000=64Kb) of memory.
7. It provides 8-bit I/O address to access 256 (28=256) I/O devices.
8. In 8085, lower order 8-bit address bus (A0 to A7) and lower order 8-bit data bus (D0 to D7) are
multiplexed to reduce the number of pins on microprocessor. Due to this, external hardware (latch) is
required to separate address bus and data bus.
9. It supports 74 instructions with five addressing modes (immediate, register, direct, indirect and implied).
10. It has 8-bit ALU, which can perform arithmetic operations such as addition, subtraction, etc and logical
operations such as ANDing, ORing, etc.
11. It has 8-bit general purpose registers (B register, C register, D register, E register, H register, L register)
and special purpose registers (Accumulator, PSW, SP*, and PC*) (* are 16-bit register).
12. It provides 5 hardware interrupts: - (TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR).
13. It has serial I/O ports for serial communication.
14. It provides control signals to control bus cycles (RD, WR, IO/M).
15. The 8085 has an ability to share system bus with direct access memory controller.
Architecture of 8085 Microprocessor:-

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The 8085 microprocessor consists of various functional blocks as listed below:-

 Registers.
 Arithmetic and logical unit (ALU).
 Instruction decoder and machine cycle encoding.
 Address buffer.
 Address buffer/ Data buffer.
 Increment/ Decrement address latch.
 Interrupt control.
 Serial I/O control.
 Timing and control circuitry.

I. Register structure:-

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 General purpose register’s:-

o B, C, D, E, H and L are 8-bit general purpose registers.
o These registers can also be used as 16-bit register pairs i.e. BC, DE, and HL register pairs.
o When used in register pair mode, the higher order byte resides in first register (B register in
case of BC register pair), and lower order byte resides in second register (C register in case of
BC register pair).
o HL register pair also functions as a memory pointer or a data pointer.
o These are also called as scratchpad registers as user can store data in them.
o To store and read data from these registers bus access is not required, this is internal
operation. Thus a programmer uses these registers to store immediate results than the
memory locations which require the bus access and hence more time to perform the
operation.
 Temporary registers:-
o Temporary register are not available for the user (user cannot access/modify data from any
temporary registers).
a) Temporary data register (temp register):-
 ALU has two inputs.
 One input is supplied by accumulator and other by temp register.
 Hence it is internally used for execution of most of the arithmetic and logical
operations.
b) W and Z registers:-
 These temporary registers (W and Z) are used to hold 8-bit data during execution of
some internal operations, as these are not user accessible.
 Special purpose registers:-
a. Accumulator (register A):-
 It is extensively used in many operations such as; arithmetic operations, logical
operations, storing/ loading and I/O operations.
 Most of the time the result of arithmetic operation and logical operations are is stored
in the register A; hence it is called as accumulator.
b. Flag register (Program status word):-

It is an 8-bit register, in which 5 bits carry significant information (show status) in the
form of flags: sign flag, zero flag, auxiliary carry flag, parity flag, and carry flag.
 Sign flag (S):-

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o After execution of arithmetic and logical instruction, if the bit D7 of the
result is 1, the sign flag is set. In a given byte if D7 is 1, the number will
be viewed as negative number.
o After execution of arithmetic and logical instruction, if the bit D7 of the
result is 0, the sign flag is reset. In a given byte if D7 is 0, the number will
be viewed as positive number.
 Zero flag (Z):-
o If the result of ALU (arithmetic or logical) operations is zero, then the zero
flag is set, else not (reset).
o The zero flag also sets (Z=1), if certain register content become zero after
increment or decrement.
 Auxiliary carry flag (AC):-
o The flag is set if there is overflow out of bit D3 (i.e. carry out of lower
nibble to higher nibble).
o This flag is used for BCD operations, and is not available for programmer.
 Parity flag (P):-
o Parity is defined by the number of 1’s present in the accumulator.
o After an arithmetic and logical operation if the result has even number of
1’s (even parity), then parity flag is set. If the parity is odd, flag is reset.
 Carry flag (C):-
o Carry flag is set if there is an overflow out of bit D7.
o Carry flag also serves as borrow flag for the result of subtraction.
c. Instruction register:-
 In a typical processor operation, the processor first fetches the opcode of the
instruction from memory.
 The CPU stores the opcode in the register called as instruction register, and then
sends it to instruction decoder.
 16-bit register:-
a) Program counter (PC):-
 Program is sequence of instructions.
 Microprocessor fetches (reads) these instructions from the register and executes
sequentially.
 PC is a special purpose register, which points to the address of the next instruction to be
fetched.
 In case of JUMP or CALL instructions, address followed by JUMP or CALL instruction
is placed in the PC.
 When a byte (machine code) is being fetched, the program counter is incremented by
one to point to the next memory location
b) Stack pointer (SP):-
 The stack is the reserved area of the memory in the RAM where temporary information is
stored.
 The 16-bit stack pointer is used to hold the address of the most recent stack entry.

II. Arithmetic and logical unit (ALU):-

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 The ALU performs the actual numerical and logic operation such as ‘add’, ‘subtract’, ‘AND’, ‘OR’, etc
on 8-bit data.
 ALU uses data from memory and from Accumulator to perform arithmetic and logical operations.
 The result of operation is always stored in Accumulator.
 The ALU also looks after branch instructions.

III. Instruction decoder and machine cycle encoding:-

 In a typical processor operation, the processor first fetches the opcode of the instruction from memory.
 The CPU stores the opcode in the register called as instruction register, and then sends it to instruction
decoder.
 The instruction decoder decodes the instruction and accordingly gives the timing and control signals
which controls the register, ALU, data buffers, external peripherals, etc.
 It gives the information about which machine cycle is currently executing in the encoded form on the S 0,
S1 and IO/M lines. This task is done by machine cycle encoder.

IV. Address buffer:-

 It is 8-bit unidirectional buffer.
 It is used to drive higher order address bus (A7-A15).
 It is also used to tri-state higher order address bus under certain conditions such as RESET, HOLD,
HALT, and when address lines are not used.

V. Address/ Data buffer:-

 This in an 8-bit bidirectional buffer.
 It is used to drive multiplexed address/data bus, i.e. lower orders address bus (A 0-A7) and data bus (D0-
D7).
 It is also used to tri-state multiplexed address bus and data bus under certain conditions such as RESET,
HOLD, HALT, and when address lines are not used.
 The address and data buffer is used to drive the external address bus and data bus respectively.

VI. Increment/Decrement address latch:-

 This 16-bit register is used to increment or decrement the content of SP or PC as a part of program
execution of instruction related to them.

VII. Interrupt control:-

 The processor fetches, decodes and executes the instructions sequentially.
 Sometimes it is necessary for the microprocessor to execute one of the special routines programs
whenever special conditions exist.
 The most important thing is that, after execution of the special routine, the program control must be
transferred to the program which processor was executing before the occurrence of the special
condition.
 The occurrence of the special condition is called as interrupt.

VIII. Serial I/O control:-

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 In situation like, data transmission over long distance, it is necessary to transmit data serially (bit by bit
i.e. 1 bit at a time) to reduce cabling cost.
 The 8085’s serial I/O control provides two signals, SOD (serial output) and SID (serial output data) for
serial communication.
 The SOD pin is used to send data serially.
 The SID pin is used to receive data serially.

IX. Timing and control circuitry:-

 The control circuitry is responsible for all operations in the 8085 microprocessor.
 The operations in the 8085 microprocessor are synchronized with the help of clock signals.
 Along with the control of fetching and decoding operations, control circuitry also generates signals
required to interface external devices to the microprocessor 8085.

Pin diagram of 8085 Microprocessor:-

 VCC:-
o It requires +5 volts power supply.
 Ground:-
o Reference ground.
 X1 and X2:-
o A tuned circuit like RC, LC, and crystal oscillator is connected to these pins.
o The internal clock generator divides the frequency by two, therefore to operate at 3 MH Z, of the
tuned circuit must be of 6MHZ.
 Reset out:-
o This active high signal indicates the signal is being reset.

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o This signal is synchronized to the processor clock and this can be used to reset other devices
connected in the system.
 Serial output data (SOD):-
o This is output signal from which the serial transmission of the data (bit by bit) to the external
device is possible.
 Serial input data (SID):-
o This input signal is used accept serial data bit by bit from external device.

 TRAP, RST 7.7, RST 6.5, RST 5.5, and INTR:-

o TRAP, RST 7.7, RST 6.5, RST 5.5, and INTR are the five hardware interrupts of the
microprocessor 8085.
o The microprocessor recognizes the interrupts request on these lines at the end of the current
instruction execution.
 INTA:-
o INTA (interrupt acknowledge) signal is used to indicate that the processor has acknowledged the
INTR interrupt.
 AD0 to AD7 (multiplexed address and data bus):-
o The 8-bit data bus (D0-D7) is multiplexed with lower order 8-bit address bus (A0 to A7).
o During first part of machine cycle (T1), lower order 8-bits of address appear on these lines (bus).
o Remaining part of the machine cycle (T2, and T3) these lines are used as bidirectional data bus.

 A8 to A15 (higher order address bus):-

o The higher order address contents (8-bit) appear on the A8 to A15 lines.
o These lines are used to carry only the higher order 8-bit address.
 ALE (address latch enable):-
o We know that the 8-bit data bus (D0-D7) is multiplexed with lower order 8-bit address bus (A0 to
A7) i.e. AD0-AD7.
o So the lower order 8-bits address (A0-A7) must be latched (lock) in T1 period of the machine
cycle, so that it available throughout the machine cycle.
o The latching is done by using the external latch and ALE signal.
o ALE is positive going pulse generated every time the 8085 microprocessor begins an operation;
it indicates that the bits on the AD0-AD7 lines are address bits.
o “ALE is used to demultiplex (separate) lower order address bus and data bus”.
 WR (write):-
o This signal is basically used to control the direction of data flow between the microprocessor and
the memory or I/O device.
o A low signal on WR indicates that the data must be written on to the memory location or I/O port
via data bus.
 RD (read):-

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o This signal is basically used to control the direction of data flow between the microprocessor and
the memory or I/O device.
o A low signal on RD indicates that the data must be read from the memory location or I/O port via
data bus.
 S0 and S1 (status signals):-
o S0 and S1 indicate the type of machine cycle in progress.

S0 S1 Control signal
0 0 HALT (stop)
0 1 Read signal
1 0 Write signal

 IO/M:-
o IO/M indicates whether IO operation or memory operation is carried out.
o When the IO/M signal is high, it indicates the IO operation.
o When the IO/M signal is low, it indicates the memory operation.
 READY:-
o It is used by the microprocessor to sense whether a peripheral is ready or not for the data transfer.
o If not, the processor waits.
o It is thus used to synchronize the slower peripherals to the microprocessor.
 RESET IN:-
o A low signal on this pin:-
 Sets the program counter (PC) to zero (0000 H).
 Resets the interrupt enable and HLDA flip flops.
 Tri-state the data bus, address bus and the control bus.
o On reset, the PC sets to 0000 H address which causes the microprocessor 8085 to execute the
instruction from address 0000 H.
o The power-on reset circuit can be used to reset the microprocessor, and the reset signal must be
held low for atleast 3 clock cycles.
 Clock out:-
o This signal is used as system clock for the other devices.
o Its frequency is the half of the oscillator frequency.
 HOLD:-
o This signal indicates that another master (DMA controller) is requesting for the use of address
bus, data bus, and control bus.
 HLDA:-
o The active high signal is used to acknowledge the HOLD signal request.

Demultiplexing of address bus and data bus:-

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 The above figure shows the schematic that uses a latch and ALE signal to demultiplex the bus.
 The bus AD0-AD7 is connected to the inputs of the latch IC 74LS373.
 The ALE signal is connected to the enable pin (G) of the latch, and the output control (OC) signal of the
latch is connected to the ground.
 The 8-bit data bus (D0-D7) is multiplexed with lower order 8-bit address bus (A0 to A7).
 During first part of machine cycle (T1), lower order 8-bits of address appear on these lines (bus).
 Remaining part of the machine cycle (T2, and T3) these lines are used as bidirectional data bus.
 So the lower order 8-bits address (A 0-A7) must be latched (lock) in T1 period of the machine cycle, so
that it available throughout the machine cycle.
 The latching is done by using the external latch and ALE signal.
 ALE is positive going pulse generated every time the 8085 microprocessor begins an operation; it
indicates that the bits on the AD0-AD7 lines are address bits.
 “ALE is used to demultiplex (separate) lower order address bus and data bus”.
 When ALE is high, the latch is transparent; this means that the output changes according to the input
(AD0-AD7 lines will carry address, i.e. output will be lower order 8-bit address).
 When ALE goes low, the AD0-AD7 lines will carry data, and at the same time the latch IC 74LS373 gets
disabled and output of the latch IC 74LS373 will hold the lower order address.

Generating control signals:-

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 The 8085 microprocessor provides RD and WR signals (control signals) to initiate the reading and
writing operations.
 But these signals are used both for reading/writing memory and reading/writing IO device.
 Thus it is necessary to generate separate read and write signals for memory and IO devices.
 The 8085 microprocessor provides IO/M signal to indicate whether IO operation or memory operation is
carried out.
 Using IO/M along with RD and WR signals, it is possible to generate separate four control signals:-
o MEMR (memory read):- it is used to read data from memory.
o MEMW (memory write):- it is used to write data into memory.
o IOR (IO read):- it is used to read data from IO device.
o IOW (IO write):- it is used to write data into IO device.

Figure (A) Figure (B)

 Figure (A) shows the four different control signals generated by combining RD, WR, and IO/M signals.
 Table shows the truth table used to generate four control signals (MEMR, MEMW, IOR, and IOW).
 The signal IO/M goes low for memory operation.
 The signal IO/M is logically OR’ed with RD and WR to generate MEMR and MEMW signals.
 When both IO/M and RD signals go low, the MEMR signal is generated.
 Similarly when both IO/M and WR signals go low, the MEMW signal is generated.
 The signal IO/M is made high for IO related operations, and the signal IO/M is logically OR’ed with RD
and WR to generate IOR and IOW signals.
 Figure (B) shows the generations of control signals using 3:8 decoder, where the same truth table can be
implemented using 3:8 decoder.
IO/M RD WR MEMR MEMW IOR IOW
0 0 0 Condition never exist, because RD and WR signals does not go low simultaneously
0 0 1 0 1 1 1
0 1 0 1 0 1 1
0 1 1 1 1 1 1
1 0 0 Condition never exist, because RD and WR signals does not go low simultaneously
1 0 1 1 1 0 1
1 1 0 1 1 1 0
1 1 1 1 1 1 1
Timing diagrams:-

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 Timing and control unit coordinates and controls the subsystem within CPU (ALU, registers, etc) and
also outside the CPU (memory, I/O devices).
 Timing diagram is the display (graphical representation) of initiation of read/write and transfer of data
operations under the control of 3-status signals IO / M, S1, and S0.
 The program is set of instructions.
 The instructions are converted into opcode and stored in memory.
 The opcodes are executed by the microprocessor, and the operations specified in those instruction cods
are performed.
 To execute an instruction, the microprocessor first takes the opcode from memory; this is called as
“opcode fetch”.
 Then this instruction is decoded by instruction decoder and the task is finally executed.
 All the operations specified above are performed sequentially with reference to the clock.
 Each clock cycle is called the “T-state”
 The number of T-states required to perform the operation is called as “machine cycle”.
 The number of machine cycles required to fetch and execute an instruction completely is called as
“instruction cycle”.
IC=FC+EC

Question: - How microprocessor differentiates between data and opcode?

Answer:-
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Compare 8085 and 8086:-

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Topic 2: - 16 bit Microprocessor-8086 Marks:24

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 8086 Microprocessor:-
o Salient features
o Pin descriptions
o Architecture of 8086 - Functional Block diagram
o Register organization,
o Concepts of pipelining,
o Memory segmentation
o Physical memory addresses generation.
 Operating Modes of 8086
 8284 Clock Generator
 8288 Bus Controller
 74LS245 Bi-directional Buffer
 74LS373 Octal Latch
 Minimum Mode operation and its timing diagram
 Maximum Mode operation and its timing diagram

Features of 8086 microprocessor:-

 8086 is a 16 bit microprocessor. The term 16-bit means, the ALU, internal registers, and most of the
instructions are designed to work for 16-bit binary word.
 8086 has 16-bit wide data bus, i.e. it can read or write 16-bit data on memory or I/O.

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 An interesting feature of the 8086 is that it fetches up to six instruction bytes from memory and queue
them in order to speed up instruction execution.
 It has 20 bit address lines, and can directly access 1 Mb of memory.
 8086 microprocessor can address 16-bit I/O address, so it can access 216=65536 I/O devices.
 It is operated on 5MHz, 8MHZ, and 10 MHz clock rates.
 It operates in both single processor and multiple processor configurations to achieve high performances.
 All internal registers in the 8086 are 16-bit registers.-
 The 8086 has multiplexed address and data bus, which reduces number of pins, required, but also slows
down the transfer of data.
 In 8086 it is possible to perform bit, byte, word, and block operations.
 8086 IC is designed to operate in minimum and maximum mode.
 The 8086 supports multiprogramming.
 Downward compatible.

8086 architecture:-

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 The internal architecture 8086 microprocessor is as shown in the fig.

 The 8086 CPU is divided into two independent functional parts, the Bus interface unit (BIU) and
execution unit (EU).
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 The Bus Interface Unit contains Bus Interface Logic, Segment registers, Memory addressing logic and a
Six byte instruction object code queue.
 The execution unit contains the Data and Address registers, the Arithmetic and Logic Unit, the Control
Unit and flags.

Bus interface unit:-

 The BIU sends out address, fetches the instructions from memory, read data from ports and memory, and
writes the data to ports and memory.
 In other words the BIU handles all transfers of data and addresses on the buses for the execution unit.

Execution unit:-
 The execution unit (EU) of the 8086 tells the BIU where to fetch instructions or data from, decodes
instructions and executes instruction.
 The EU contains control circuitry which directs internal operations.
 A decoder in the EU translates instructions fetched from memory into a series of actions which the EU
carries out. The EU is has a 16-bit ALU which can add, subtract, AND, OR, XOR, increment,
decrement, complement or shift binary numbers.
 The EU is decoding an instruction or executing an instruction which does not require use of the buses.

Register organization of 8086:-

 8086 has a powerful set of registers containing general purpose and special purpose registers.
 All the registers of 8086 are 16-bit registers.
 The general purpose registers, can be used either 8-bit registers or 16-bit registers.
 The general purpose registers are either used for holding the data, variables and intermediate results
temporarily or for other purpose like counter or for storing offset address for some particular addressing
modes etc.
 The special purpose registers are used as segment registers, pointers, index registers or as offset storage
registers for particular addressing modes.
 Fig shows register organization of 8086.

 We will categorize the register set into four groups as follows:

General data registers:-

 The registers AX, BX, CX, and DX are the general 16-bit registers.
AX Register:
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 Accumulator register consists of two 8-bit registers AL and AH, which can be combined together and
used as a 16- bit register AX. AL in this case contains the low-order byte of the word, and AH contains
the high-order byte.
 Accumulator can be used for I/O operations, rotate and string manipulation.
BX Register:
 This register is mainly used as a base register. It holds the starting base location of a memory region
within a data segment.
 It is used as offset storage for forming physical address in case of certain addressing mode.
CX Register:
 It is used as default counter or count register in case of string and loop instructions.
DX Register:
 Data register can be used as a port number in I/O operations and implicit operand or destination in case
of few instructions. In integer 32-bit multiply and divide instruction the DX register contains high-order
word of the initial or resulting number.

Segment registers:-
 To complete 1Mbyte memory is divided into 16 logical segments.
 The complete 1Mbyte memory segmentation is as shown in following fig.
 Each segment contains 64Kbyte of memory. There are four segment registers.

Code segment:-
 Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor instructions.
 The processor uses CS segment for all accesses to instructions referenced by instruction pointer (IP)
register. CS register cannot be changed directly.
 The CS register is automatically updated during far jump, far call and far return instructions. It is used
for addressing a memory location in the code segment of the memory, where the executable program is
stored.
Stack segment:-
 Stack segment (SS) is a 16-bit register containing address of 64KB segment with program stack.
 By default, the processor assumes that all data referenced by the stack pointer (SP) and base pointer
(BP) registers is located in the stack segment. SS register can be changed directly using POP instruction.
 It is used for addressing stack segment of memory. The stack segment is that segment of memory, which
is used to store stack data.

Data segment:-
 Data segment (DS) is a 16-bit register containing address of 64KB segment with program data. By
default, the processor assumes that all data referenced by general registers (AX, BX, CX, and DX) and
index register (SI, DI) is located in the data segment.
 DS register can be changed directly using POP and LDS instructions. It points to the data segment
memory where the data is resided.

Extra segment:-
 Extra segment (ES) is a 16-bit register containing address of 64KB segment, usually with program data.
 By default, the processor assumes that the DI register references the ES segment in string manipulation
instructions.
 ES register can be changed directly using POP and LES instructions.

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 It also refers to segment which essentially is another data segment of the memory. It also contains data.

Pointers and index registers:-

 The pointers contain within the particular segments.
 The pointers IP, BP, SP usually contain offsets within the code, data and stack segments respectively
Stack Pointer (SP) is a 16-bit register pointing to program stack in stack segment.
 Base Pointer (BP) is a 16-bit register pointing to data in stack segment. BP register is usually used for
based, based indexed or register indirect addressing.
 Source Index (SI) is a 16-bit register. SI is used for indexed, based indexed and register indirect
addressing, as well as a source data addresses in string manipulation instructions.
 Destination Index (DI) is a 16-bit register. DI is used for indexed, based indexed and register indirect
addressing, as well as a destination data addresses in string manipulation instructions.

Flag register:-

 Flags Register determines the current state of the processor.

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 They are modified automatically by CPU after mathematical operations, this allows to determine the
type of the result, and to determine conditions to transfer control to other parts of the program.
 The 8086 flag register as shown in the fig above. 8086 has 9 active flags and they are divided into two
categories:-
1. Conditional Flags
2. Control Flags
Conditional Flags
 Conditional flags are as follows:-
 Overflow flag (OF): This flag indicates an overflow condition for signed integer arithmetic.
 Carry Flag (CY): This flag indicates a carry in addition or borrow in subtraction, for unsigned integer
arithmetic. It is also used in multiple-precision arithmetic.
 Auxiliary Flag (AC): If an operation performed in ALU generates a carry/barrow from lower nibble (i.e.
D0 – D3) to upper nibble (i.e. D4 – D7), the AC flag is set i.e. carry given by D3 bit to D4 is AC flag.
This is not a general-purpose flag; it is used internally by the Processor to perform Binary to BCD
conversion.
 Parity Flag (PF): This flag is used to indicate the parity of result. If lower order 8-bits of the result
contains even number of 1’s, the Parity Flag is set and for odd number of 1’s, the Parity flag is reset.
 Zero Flag (ZF): It is set; if the result of arithmetic or logical operation is zero else it is reset.
 Sign Flag (SF): In sign magnitude format the sign of number is indicated by MSB bit. If the result of
operation is negative, sign flag is set.
Control Flags
Control flags are set or reset deliberately to control the operations of the execution unit.
 Control flags are as follows:-
 Trap Flag (TF): It is used for single step control. It allows user to execute one instruction of a program at
a time for debugging. When trap flag is set, program can be run in single step mode.
 Interrupt Flag (IF): It is an interrupt enable/disable flag. If it is set, the maskable interrupt of 8086 is
enabled and if it is reset, the interrupt is disabled. It can be set by executing instruction SIT and can be
cleared by executing CLI instruction.
 Direction Flag (DF): It is used in string operation. If it is set, string bytes are accessed from higher
memory address to lower memory address. When it is reset, the string bytes are accessed from lower
memory address to higher memory address.

Pin configuration of 8086:-

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Concept of pipelining:-
The Queue:-
 The BIU fetches up to 6 instruction bytes for the following instructions.
 The BIU stores these pre-fetched bytes in first-in-first-out register set called a “queue”.
 When the EU is ready for its next instruction it simply reads the instruction byte(s) for the instruction
from the queue in the BIU.
 This is much faster than sending out an address to the system memory and waiting for memory to send
back the next instruction byte or bytes.
 Except in the case of JMP and CALL instructions, where the queue must be dumped and then reloaded
starting from a new address, this pre-fetch-and-queue scheme greatly speeds up processing.
 Fetching the next instruction while the current instruction executes is called pipelining.

Memory segmentation:-
Segment registers:-
 The complete 1Mbyte memory is divided into 16 logical segments.
 The complete 1Mbyte memory segmentation is as shown in following fig.
 Each segment contains 64Kbyte of memory. There are four segment registers.
Code segment:-
 Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor instructions.
 The processor uses CS segment for all accesses to instructions referenced by instruction pointer (IP)
register. CS register cannot be changed directly.
 The CS register is automatically updated during far jump, far call and far return instructions. It is used
for addressing a memory location in the code segment of the memory, where the executable program is
stored.
Stack segment:-
 Stack segment (SS) is a 16-bit register containing address of 64KB segment with program stack.

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 By default, the processor assumes that all data referenced by the stack pointer (SP) and base pointer
(BP) registers is located in the stack segment. SS register can be changed directly using POP instruction.
 It is used for addressing stack segment of memory. The stack segment is that segment of memory, which
is used to store stack data.
Data segment:-
 Data segment (DS) is a 16-bit register containing address of 64KB segment with program data. By
default, the processor assumes that all data referenced by general registers (AX, BX, CX, DX) and index
register (SI, DI) is located in the data segment.
 DS register can be changed directly using POP and LDS instructions. It points to the data segment
memory where the data is resided.
Extra segment:-
 Extra segment (ES) is a 16-bit register containing address of 64KB segment, usually with program data.
 By default, the processor assumes that the DI register references the ES segment in string manipulation
instructions.
 ES register can be changed directly using POP and LES instructions.
 It also refers to segment which essentially is another data segment of the memory. It also contains data.

Advantages of memory segmentation:-

1. It allows memory addressing capability to be 1Mb, even though the address associated with individual
instruction is only 16-bits.
2. Programs and data can be stored separately from each other in segmentation.
3. Multiple segments for code or data can be created.
4. Segmentation makes it possible to write the program in the memory, which can be positioned
dynamically (random locations).
5. Segmentation allows two processes to share data.
6. Segmentation allows you to extend the addressability of the processor.

Default and alternate register segments:-

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Physical memory address generation:-

Question: - describe the physical memory address generation process in 8086 microprocessor. If CS is 348A
Hex and if IP is 4214 Hex, calculate the physical address generated.
Answer:-

 A segment registers is used to hold the upper 16 bits of the starting address for each of the memory
segments, which is also known as base address.
 For example, code segment register holds the upper 16 bits of the starting address for the code segment
memory from which the BIU is currently fetching the instruction code.
 BIU attaches four 0 bits (0000)2 as the lower four bits of the base address.
 So now this address becomes 20-bit address (starting address for a segment).
 Any pointer or index register holds 16 bit address called as offset address (added to segment base
address).

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 Offset address (16 bits) is added into segment base address (20-bit starting address) which finally forms
20 bit physical address of memory location to be accessed.

Register Address 20 bits address (in binary)

Code segment register 348A0 Hex 0011 0100 1000 1010 0000 (appended
(base address) + lower four zeros)
four zeros appended
Instruction pointer 4214 Hex 0100 0010 0001 0100
(offset address)
Physical address 38AB4 Hex 0011 1000 1010 1011 0100

Question: - Describe the physical memory address generation process in 8086 microprocessor. If CS is 69FA
Hex and if IP is 834C Hex, calculate the physical address generated.

Question: - Describe the generation of physical address in 8086. If CS=2000 H, and IP = 1122 H, calculate the
physical address generation.

Question: - Explain how 20-bit physical address is generated by 8086 microprocessor. Calculate the physical
address if CS=2308H and IP=76A9H

Concept of pipelining:-
 To speed-up the program execution, the bus interface unit (BIU) fetches 6 instruction bytes (opcode)
from memory.
 These pre-fetched instructions are held in group of registers called as “Queue”, for execution unit.
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 The queue operates on the principle of first in first out (FIFO).
 With the help of queue it is possible to fetch next instruction when current instruction is being executed.
 The BIU will continue this process as long as the queue is not full.
“The feature of fetching the next instruction while the current instruction is executing is called as
pipelining”
OR
“In 8086, pipelining is the technique of overlapping instruction fetch and execution mechanism”.

 In pipelined processor the fetch, decode and execute operation are performed in parallel.
 Normally on a non-pipelined processor requires nine clock cycles for fetching, decoding and executing
of the three instructions, but a pipelined processor will perform the same operation in five clock cycles.
 The example shown in the above figure explains about the working of pipelined processors.

Addressing modes of 8086:-

“The method or the ways by which a processor can access a data is referred to as addressing modes”.
“Addressing modes are the way of specifying an operand in an instruction”.

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1. Immediate addressing mode:
An instruction in which 8-bit or 16-bit operand (data) is specified in the instruction, then the addressing mode of
such instruction is known as immediate addressing mode.
Example:

2. Register addressing mode

An instruction in which an operand (data) is specified in general purpose registers, then the addressing mode is
known as register addressing mode.
Example:

3. Direct addressing mode

An instruction in which 16 bit effective address of an operand is specified in the instruction, and then the
addressing mode of such instruction is known as direct addressing mode.
Example:
MOV AL, [3000H]

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4. Register indirect addressing mode

An instruction in which address of an operand is specified in pointer register or in index register or in BX, then
the addressing mode is known as register indirect addressing mode.
Example:
MOV BX, [CX]

5. Indexed addressing mode

An instruction in which the offset address of an operand (data) is stored in index registers (SI or DI) is known as
indexed addressing mode.
DS is the default segment for SI and DI.
For string instructions DS and ES are the default segments for SI and DI respectively.
Example:
MOV AX, [SI]

6. Based Indexed addressing mode:

An instruction in which the address of an operand is obtained by adding the contents of base register (BX or
BP) to the content of an index register (SI or DI)
The default segment register may be DS or ES
Example:
MOV CX, [BX] [DI] or MOV CX, [BX+DI]

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7. Register relative addressing mode:

An instruction in which the address of the operand is obtained by adding the displacement (8-bit or 16 bit) with
the contents of base registers or index registers (BX, BP, SI, DI).
The default segment register is DS or ES
Example:
MOV CX, 03 H [BX] or MOV CX, [BX + 03 H]

8, Relative base indexed addressing mode:

An instruction in which the address of the operand is obtained by adding the displacement (8 bit or 16 bit) with
the base register (BX or BP) and index registers (SI or DI) to the default segment.
Example:
MOV AL, 10H [BX][SI] or MOV AL, [BX + SI + 10 H]

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Operating modes of 8086:-

 The 8086 microprocessor operates in two modes:-

a. Minimum mode (single master mode)
b. Maximum mode (two master mode)

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Minimum mode (single master mode) configuration:-

Operation:-
o In minimum mode all the control signals are generated by the microprocessor 8086 itself.
o So it can be used in single microprocessor based system. . .
o Microprocessor 8086 can be used in minimum mode only if MN/MX pin (pin 33) is connected to VCC
(logic high).
o Latches are generally buffered output D-type flip-flops like 74LS373 or 8282. They are used for
separating the valid address from the multiplexed address/data signals and are controlled by the ALE
signal generated by 8086.
o In addition to Demultiplexing, these IC’s (8282 chips) also improves the driving capability.
o IC 8286 (Transreceivers) is used to increase current sourcing/sinking capability (several interfacings) for
data bus also. The bidirectional buffers are sometimes called as data amplifiers.
o They are controlled by two signals namely, DEN and DT/R.
o The DT/R signal indicates the direction of data, i.e. from or to the processor.
o IC 8284 (clock generator) is used to generate clock, perform reset synchronization and ready
synchronization, etc
Timing diagram:-
Timing diagram for read operation:-
 The working of the minimum mode configuration system can be better described in terms of the timing
diagrams.
 Hence the timing diagram can be categorized in two parts, the first is the timing diagram for read
(opcode fetch cycle) cycle and the second is the timing diagram for write cycle.

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 The read cycle begins in T1 with the assertion (declaration) of address latch enable (ALE) signal and
also M / IOO signal. During the negative going edge of this signal, the valid address is latched on the local
bus.
 The BHE and A0 signals address low, high or both bytes.
 At T2, the address is removed from the local bus and is sent to the output. The bus is then tri-stated. The
read (RDOO ) control signal is also activated in T2.
 The read (RD) signal causes the addressed device to enable its data bus drivers. After RD goes low, the
valid data is available on the data bus.
 When the processor returns the read signal to high level, the addressed device will again tristate its bus
drivers
 From T1 to T4, the M/IO signal indicates a memory or I/O operation.

Timing diagram for write operation:-

 The write cycle begins in T1 with the assertion (declaration) of address latch enable (ALE) signal and
also M / IOO signal. During the negative going edge of this signal, the valid address is latched on the local
bus.
 The BHE and A0 signals address low, high or both bytes.
 At T2, the address is removed from the local bus and is sent to the output. The bus is then tri-stated. The
write (WR) control signal is also activated in T2.

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 In T2, the processor sends the data to be written to the addressed location. The data remains on the bus
until middle of T 4 state.
 The M/IOO, RDOO and WROO signals indicate the type of data transfer.
 From T1 to T4, the M/IO signal indicates a memory or I/O operation.

Maximum mode (single master mode):-

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Operation:-
o In maximum mode all the control signals are generated by the bus controller 8288.
o Microprocessor 8086 can be used in minimum mode only if MN/MX pin (pin 33) is connected to
Ground (logic low).
o Latches are generally buffered output D-type flip-flops like 74LS373 or 8282. They are used for
separating the valid address from the multiplexed address/data signals and are controlled by the ALE
signal generated by 8086.
o IC 8286 (Transreceivers) is used to increase current sourcing/sinking capability (several interfacings) for
data bus also, which are controlled by two signals namely, DEN and DT/R.
o IC 8284 (clock generator) is used to generate clock, perform reset synchronization and ready
synchronization, etc
o In the maximum mode, there may be more than one microprocessor in the system configuration.
o The basic function of the bus controller chip IC 8288, is to derive control signals like RD and
WR (for memory and I/O devices), DEN, DT/R, ALE, MRDC, MWTC, AMWC, IORC, IOWC
and AIOWC, using the information by the processor on the status lines S2, S1, S0.
o The AEN, IOB and CEN pins are especially useful for multiprocessor systems.
o Usually in this type of system environment, there are some system resources that are common to
all processors; which are called as global resources.
o There are also other resources that are assigned to specific processors; these are known as local
or private resources.
o The two processors do not access the bus at the same time.

Maximum mode operation and its timing diagram:-

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Timing diagram for read operation:-
 Here the only difference between in timing diagram between minimum mode and maximum mode is the
status signals used and the available control and advanced command signals

 AD0 to AD15, A16/S3 to A19/S7, R0, S1, and S2 are initialized at the beginning of bus cycle. IC 8288
bus controller will output a pulse as on the ALE and apply a required signal to its DT / R pin during T1.
 In T2, 8288 will set DEN=1 thus enabling transceivers, and for an input it will activate MRDC or IORC.
These signals are activated until T4.
 For an input, the MDRC or IORC is activated from T2 to T4 and MWTC or IOWC is activated from T3
to T4.
 The status bit S0 to S2 remains active until T3 (only in T1 and T2) and become passive during T3 and
T4.
 If read input is not activated before T3, wait state will be inserted between T3 and T4.
 The request/grant pins are checked at each rising pulse of clock input. When a request is detected and if
the condition for HOLD request is satisfied, the processor issues a grant pulse over the RQ/GT pin
immediately during T4 (current) or T1 (next) state.

Timing diagram for write operation:-

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 AD0 to AD15, A16/S3 to A19/S7, R0, S1, and S2 are initialized at the beginning of bus cycle. IC 8288
bus controller will output a pulse as on the ALE and apply a required signal to its DT / R pin during T1.
 In T2, 8288 will set DEN=1 thus enabling transceivers, and for an input it will activate MWTC or
IOWC. These signals are activated until T4.
 For an output, the AMWC or AIOWC is activated from T2 to T4 and MWTC or IOWC is activated from
T3 to T4.
 If write input is not activated before T3, wait state will be inserted between T3 and T4.
 The status bit S0 to S2 remains active until T3 (only in T1 and T2) and become passive during T3 and
T4.
 The request/grant pins are checked at each rising pulse of clock input. When a request is detected and if
the condition for HOLD request is satisfied, the processor issues a grant pulse over the RQ/GT pin
immediately during T4 (current) or T1 (next) state.

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What is memory segmentation? How it is done in 8086 microprocessor?

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Answer:
Memory Segmentation:
 The memory in an 8086 microprocessor is organized as a segmented memory.
 The complete 1Mbyte memory is divided into 16 logical segments.
 The physical memory is divided into 4 segments namely: - Data segment, Code Segment, Stack
Segment and Extra Segment.
 Segmentation allows you to extend the addressability of the processor.
Description:
 Data segment is used to hold data, Code segment for the executable program, Extra segment also holds
data specifically in strings and stack segment is used to store stack data.
 Segmentation makes it possible to write the program in the memory, which can be positioned
dynamically (random locations).
 Each segment is 64Kbytes & addressed by one segment register. The 16 bit segment register holds the
starting address of the segment.
 The offset address to this segment address is specified as a 16-bit displacement (offset) between 0000 to
FFFFH.
 Since the memory size of 8086 is 1Mbytes, total 16 segments are possible with each having 64Kbytes.

List all the 16 bit registers of 8086 and write their function.
Answer:-
16 bit registers: AX,BX,CX,DX,CS,SS,DS,ES,BP,SP,SI,DI,IP,FLAG REGISTER
1. AX (Accumulator) – Used to store the result for arithmetic / logical operations
2. BX – Base – used to hold the offset address or data
3. CX – acts as a counter for repeating or looping instructions.
4. DX – holds the high 16 bits of the product in multiply (also handles divide operations)
5. CS – Code Segment – holds base address for all executable instructions in a program
6. SS - Base address of the stack
7. DS – Data Segment – default base address for variables
8. ES – Extra Segment – additional base address for memory variables in extra segment.
9. BP – Base Pointer – contains an assumed offset from the SS register.
10. SP – Stack Pointer – Contains the offset of the top of the stack.
11. SI – Source Index – Used in string movement instructions. The source string is pointed to by the SI register.
12. DI – Destination Index – acts as the destination for string movement instructions
13. IP – Instruction Pointer – contains the offset of the next instruction to be executed.
14. Flags Register – individual bit positions within register show status of CPU or results of arithmetic
operations.

State the maximum size of memory that can be interfaced with microprocessor 8086. Why?
Answer:
 The 8086 microprocessor has 20 address lines (A0 to A19)

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 In 8086 microprocessor the total memory addressing capability is 1 mega bytes (220 = 10,48,576 ≈ 1Mb)
 For representing 1 MB, minimum 4 Hexa-decimal digits are required i.e., 20 bits.
 But 8086 has fourteen 16-bit registers.
 That is there are no registers for representing 20 bit address.
 So, the total memory is divided into 16 logical segments and each segment capacity is 64 KB (kilo
bytes). That is 16*64kb=1 MB. So, for representing 64 kb only 16 bit register is sufficient.

Explain maskable and non maskable interrupt used in 8086.

Answer:
Non-Maskable interrupts:
 8086 has a non-maskable interrupt input pin (NMI) that has highest priority among the external interrupts.
 The NMI is not maskable internally by software.
 TRAP (single step-type1) is an internal interrupt having highest priority amongst all the interrupts except Divide
by Zero (Type 0) exception.
 The NMI is activated on a positive transition (low to high voltage).
 The NMI pin should remain high for at least two clock cycles and need not synchronized with the clock for being
sensed.
Maskable interrupt:
 8086 also provides a INTR pin, that has lower priority as compared to NMI.
 The INTR signal is level triggered and can be masked by resetting the interrupt flag.
 It is internally synchronized with the high transition of the CLK.
 For the INTR signal, to be responded to in the next instruction cycle; it must go high in the last clock cycle of the
current instruction or before that.

IC 8284 (clock generator):-

Features of 8284:-
1. Generates system clock for 8086 and 8088 microprocessors. (5 MHZ, 8 MHZ, and 10 MHZ).
2. Uses crystal or TTL as a frequency source.
3. Provides local ready and multi-bus ready synchronization.
4. Generates system reset output from Schmitt trigger input (square wave generator).
5. Capable of clock synchronization with other 8284-A IC’s.
6.

8284 (clock generator) pin configuration:-

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Oscillator:-
 The oscillator circuit connected in between pins 16 and 17 (X 1 and X2) of the 8284 is designed to derive
(generate) operating frequency.
 The crystal frequency should be selected at three times the required CPU clock.
 The output of the oscillator is brought out at the OSC pin of 8284 so that other systems can use this as a
reference frequency.
Clock circuit:-
 The clock circuit generates three different output signals i.e. CLK, OSC and PCLK.
 The clock is the system clock for the microprocessor, coprocessor and bus controller of 33% duty cycle
(frequency is 1/3rd of crystal frequency).
 The F/C decides whether crystal input or EFI signal should be taken for generating the clock. If F/C is
high, the EFI is used to generate the clock. If F/C is low, the crystal is used to generate the clock.
 The PCLK is 1/6th of crystal frequency with 50% duty cycle.
 The CSYNC is synchronization signal which synchronizes multiple 8284 IC’s.
 The tank / ASYNC input (pin 15) is used only if the crystal is an overtone crystal.
Ready logic:-
 The address enable (AEN) is used to qualify the bus ready signal (RDY 1 and RDY2). It is possible for
the processor to access multi-master system buses.
 The external device activates the RDY1 or RDY2 signal, the 8284 generates ready signal (pin 5) to add
wait state during the data transfer.
 RDY1 and RDY2 are indications from a device located (interfaced) on the system bus that it is available
to receive the data.
Reset:-
 This generates the reset logic for the 8086 microprocessor.
 When RES input is made low, the 8284 generates logic high reset signal for 8086.

Question: - Draw the interfacing diagram of IC 8284 (clock generator) with 8086
microprocessor. List and explain the interfacing signals.
Answer:-
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Oscillator:-
 The oscillator circuit connected in between pins 16 and 17 (X 1 and X2) of the 8284 is designed to derive
(generate) operating frequency.
Clock circuit:-
 The clock circuit generates three different output signals i.e. CLK, OSC and PCLK.
 The clock is the system clock for the microprocessor, coprocessor and bus controller of 33% duty cycle
(frequency is 1/3rd of crystal frequency).
 The F/C decides whether crystal input or EFI signal should be taken for generating the clock.
Ready logic:-
 The external device activates the RDY1 or RDY2 signal, the 8284 generates ready signal (pin 5) to add
wait state during the data transfer.
Reset:-
 This generates the reset logic for the 8086 microprocessor.
 When RES input is made low, the 8284 generates logic high reset signal for 8086.

IC 74373 (octal latch):-

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 The eight latches of the DM74LS373 are transparent D-type latches meaning that while the enable (G) is
HIGH the Q outputs will follow the data (D) inputs.
 When the enable is taken LOW the output will be latched at the level of the data that was set up.
 The eight flip-flops of the DM74LS374 are edge-triggered D-type flip flops. On the positive transition
of the clock, the Q outputs will be set to the logic states that were set up at the D inputs.
 A buffered output control input can be used to place the eight outputs in either a normal logic state
(HIGH or LOW logic levels) or a high-impedance state.
 In the high-impedance state the outputs neither load nor drive the bus lines significantly.
 The output control does not affect the internal operation of the latches or flip-flops. That is, the old data
can be retained or new data can be entered even while the outputs are OFF.

Draw interfacing diagram of 74LS373 (IC 8282) octal latch with 8086 microprocessor and
explain it.

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 The above figure shows the schematic that uses a latch and ALE signal of 8086 to demultiplex the
address and data bus.
 The bus AD0-AD15 is connected to the inputs of the two latches IC’s 74LS373.
 The ALE signal is connected to the enable pin (G) of the latches, and the output control (OC) signal of
the latches are connected to the ground.
 The 16-bit data bus (D0-D15) is multiplexed with 16-bit address bus (A0 to A15).
 During first part of machine cycle (T1), the 16-bits of address appear on these lines (bus).
 Remaining part of the machine cycle (T2, and T3) these lines are used as bidirectional data bus.
 So the 16-bits address (A0-A15) must be latched (lock) in T1 period of the machine cycle, so that it
available throughout the machine cycle.
 The latching is done by using the external latch and ALE signal.
 ALE is positive going pulse generated every time the 8086 microprocessor begins an operation; it
indicates that the bits on the AD0-AD15 lines are address bits.
 “ALE is used to demultiplex (separate) address bus and data bus”.
 When ALE is high, the latch is transparent; this means that the output changes according to the input
(AD0-AD15 lines will carry address, i.e. output will be 16-bit address).
 When ALE goes low, the AD0-AD15 lines will carry data, and at the same time the two latches IC
74LS373 gets disabled and output of the two latches IC 74LS373 will hold the 16-bit address.

8288 bus controller:-

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74LS245 bi-directional buffer:-

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Topic 4: - The art of assembly language programming Marks: 08

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 Program development steps

o Defining problem,
o Writing Algorithms
o Flowchart
o Initialization checklist
o Choosing instructions
o Converting algorithms to assembly language programs.
 Assembly Language Programming Tools
o Editors
o Assembler
o Linker
o Debugger.
 Assembler directives and Operators

Question: - State the steps involved in program development.

Answer:
1. Defining the problem: The first step in writing program is to think very carefully about the problem that the
program must solve.

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2. Algorithm: The formula or sequence of operations to be performed by the program can be specified as a step
in general English is called algorithm.
3. Flowchart: The flowchart is a graphically representation of the program operation or task.
4. Initialization checklist: Initialization task is to make the checklist of entire variables, constants, all the
registers, flags and programmable ports
5. Choosing instructions: Choose those instructions that make program smaller in size and more importantly
efficient in execution.
6. Converting algorithms to assembly language program: Every step in the algorithm is converted into
program statement using correct and efficient instructions or group of instructions.

Question: - what is algorithm?

 Algorithm is a task or sequence of operations performed by program that can be specified as a step in
general English and is called as algorithm.
 Formula or sequence of operations used to solve a programming problem is called as the algorithm.

Question: - What is flowchart? Sketch different symbols (shapes) used in flowchart.

• Flowchart is graphical representation of task to be performed by a program.
• It uses graphical shapes to represent different types of programming operations.
• Flow chart symbols are:-

Question: - State the functions of –

(i) Editor
(ii) Assembler
(iii) Linker
(iv) Debugger

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Ans:
(i) Editor
 It is a program which helps to construct assembly language program with a file extension (.asm), in right
format so that the assembler will translate it to machine language.
 It enables one to create, edit, save, copy and make modification in source file.
 Examples of editors are: - PC write, word-star, etc.

(ii) Assembler
 Assembler is a program that translates assembly language program to the correct binary code.
 Assembler determines the displacement of named data items (offset of labels, etc) and inserts these
offsets between the binary codes of the program.
 It also generates the file called as object file with extension .obj.
 It also displays syntax errors in the program, if any.
 It can be also be used to produce list(.lst) and .crf files

(iii) Linker
 It is a programming tool used to convert Object code into executable program.
 Linker is a program used to join several object files into one large object files.
 While writing large programs it is good to divide them into modules so that each module can be written,
tested, debugged independently and then use linker to combine the modules to form the actual program.
 It combines, if requested, more than one separated assembled modules into one executable module such
as two or more assembly programs or an assembly language with C program.
 It generates link files with .EXE extension.

(iv) Debugger: -
 Debugger is a program that allows the execution of program in single step mode under the control of the
user.
 The errors in program can be located and corrected using a debugger.
 A debugger is the program which allows you to load your object code program in to system memory.
 It allows you to look at the contents of the registers and memory locations after your program runs.
 It also allows you to set breakpoints at any points in the program.
 It simply allows you to find the source of the problem into the program.
 There are lots of debuggers available like Borland Turbo Debugger, Microsoft’s Code view debugger etc

(v) Locater:-
• A locator is the program used to assign the specific addresses of where the segments of object code are
to be loaded in to main memory.
• Examples include EXE2BIN which comes with the IBM PC DOS.
• Converts .exe to .bin files which has physical addresses

Question: - What are assembler directives? Explain assembler directives.

Answer:

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 Assembler Directives: Assembly language program supports a number of reserved words i.e. keywords
that enable the assembler to control the way in which a program assembles and lists.
 Assembler directives are the statements that give direction to the assembler and also called as pseudo-
instructions that are not translated into machine code.
1. DB: - Define byte (8 bits)
 It is used to declare a byte type variable of 8 bit. It also can be used to declare an array of bytes. The
range of values that can be stored in a byte is 0 to 255 for unsigned numbers and -128 to +127 for
unsigned numbers.
 e.g
 NUM DB ? ; Allocate one memory location
 ARRAY DB 12,25,26,55,65 ; Allocate five memory locations
2. DW: -Define Word (16-bits)
 It is used to tell the assembler to define a variable of type word in memory or to reserve storage
 locations of type word (16) in memory.
 e.g. BLOCK DW 1234H, 3456H, 5678H : Declare array of 3 words.
3. DD: -Define Double word (32-bits)
 It is used to declare a variable of type double-word or to reserve memory locations which can be
accessed as type double-word (32-bits.)
 E.g. NUMBER DD 1, 2, 3, 4, 9; allocated 20 memory locations.
4. DQ : Define Quad-Word(4 words)
 This directive is used to tell the assembler to declare a variable 4 words in length or to reserve 4
words
 of storage
 NUM DQ ? ;Allocate 8 memory locations
5. DT :Define Ten byte
 This directive is used to tell the assembler to define a variable which is 10
 bytes in length or to reserve 10 bytes of storage in memory.
 NUM DT ? ; Allocate Ten memory locations;
6. EQU :Equate to
 The EQU directive is used to declare the micro symbols to which some constant value is assigned.
 Micro assembler will replace every occurrence of the symbol in a program by its value.
 Syntax: Symbol_name EQU expression
 E.g CORRECTION_FACTOR EQU 100

7. ORG : Originate
 The directive ORG assigns the location counter with value specified in the directive.
 It helps in placing the machine code in the specified location while translating instructions into
machine codes by the assembler.
 $ is used to indicate current value of location counter
 Syntax: ORG [$+] Numeric_value
 E.g. ORG 2000H; set location counter to 2000H
 ORG $+ 100; increment value of location counter by 100 from its current.
8. ALIGN : Alignment of memory addresses
 This directive is used to force the assembler to align the next data item or instruction according to
given value.
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 Syntax: ALIGN Numeric_value
 e.g ALIGN 4 ;advances location counter to the next address that is evenly divisible by 4
9. EVEN: -
 The directive even is used to tell assembler to increment the location counter to the next even
memory address. If the location counter is already pointing to even address it should not be
increment.
 Example: - DATA SEGMENT
 Array DB 9 DUP (?)
 EVEN
 Block DW 100H DUP (0)
 DATA ENDS

10. LABEL:
 The LABEL directive is used to give a name to the current value in the location counter .IT enables
you to redefine the attributes of a data variable or instruction label.
 Syntax: variable_name LABEL type_specifier
 E.g STACK_TOP LABEL WORD
 TEMP LABEL BYTE

11. DUP: Duplicate memory location

 This directive can be used to generate multiple bytes or words with known as well as un-initialized
values.
 e.g TABLE DW 100 DUP(0) ; Create array of 100 words all contains data 0

12. ASSUME: -
 Assume directive is used to tell Assembler the name of the logical segment it should use for the
specified segment.
 When program is loaded the processor segment register should point to the respective logical
segments.
 Example: - Assume CS: MSBTE_CODE, DS: MSBTE_DATA

13. SEGMENT:
 Used to indicate the beginning of logical segment. Preceding the SEGMENT directive is the name of
the given segment
 Syntax:
 Segment_Name SEGMENT [Word/Public]
 e.g My_data SEGMENT
 ----
 My_data ENDS
14. ENDS :
 End of segment .The directive ENDS is used with the name of a segment to indicate the end of that
logical segment (which contains instructions or data).
 CODE SEGMENT ;Start of logical segment
 ------ ;Instruction statements
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 CODE ENDS; End of segment named CODE.
15. END:
 End of Program
 This directive is used to inform assembler the end of the program. The assembler will ignore any
statements after an END directive.
16. Length:
 The directive length determines the number of elements in some named data item, such as a string or
an array
 Syntax: LENGTH Variable_Name
 MOV CX,Length Array ; Find no of elements in Array and load length to CX.
17. Size:
 This directive returns the number of bytes allocated to the data item instead of number of elements in
it
 Syntax: SIZE Variable_name
 Example : MOV AX, SIZE Total ; Find no of bytes in Total and load length to CX.
18. OFFSET:
 This directive tells the assembler to determine the offset or displacement of a named data item or
procedure from the start of segment which contains it. Used to load the offset of variable into a
register so that variable can be accessed with one of the indexed addressing mode.
 Syntax : OFFSET Variable_name
 Ex OFFSET BX,PRICES ;determine the offset of variable PRICES from seg start and load
 displacement in BX

Topic 5: - 8086 assembly language programming Marks: 24

Model of 8086 assembly language programs

Programming using assembler -
o Arithmetic operations on Hex and BCD numbers - Addition,
o Subtraction, Multiplication and Division
o Sum of Series
o Smallest and Largest numbers from array
o Sorting numbers in Ascending and Descending order
o Finding ODD/EVEN numbers in the array
o Finding Positive and Negative Numbers in array

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o Block transfer
o String Operations - Length, Reverse, Compare, Concatenation, Copy
o Count Numbers of ‘1’ and ‘0’ in 8/16 bit number
o BCD to Hex and Hex to BCD number conversion

Instruction format:-
 Machine Language instruction format:-
o A machine language instruction format has one or more number of fields associated with it.
o The first field is called the opcode field, which indicates the type of operation performed by the
CPU.
o The second field is called as an operand field which specifies the data on which the operation is
to be performed.
o The general format of 8086 instruction with different fields is as given below.
o 8086 Instructions are represented as binary numbers Instructions require between 1 and 6 bytes.

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 This is the general instruction format used by the majority of 2-operand instructions.
 Bytes 1 and 2 are divided up into 6 fields: opcode d -direction (or s = sign extension), w -word/byte,
mod –mode, reg. –register, r/m -register/memory, opcode field specifies the operation performed
(MOV, XCHG, etc) and d (direction) field specifies the direction of data movement:
 d = 1 data moves from operand specified by R/M field to operand specified by REG field
 d = 0 data moves from operand specified by REG field to operand specified by R/M field
 W (word/byte) specifies operand size W = 1 data is word W = 0 data is byte

Addressing modes:-
1. Immediate: In this addressing mode, immediate data is a part of instruction, and appears in the form of
successive byte or word.
E.g.: MOV AX, 005OH
2. Direct: In the direct addressing mode, a 16 bit address (offset address) is directly specified in the instruction
as a part of it.
E.g.: MOV AX, [1000H]
3. Register: In register addressing mode, the data is stored in a register and it is referred using the particular
register. All the registers except IP may be used in this mode.
E.g.: 1) MOV AX,BX 2) ROR AL,CL 3) AND AL,BL
4. Register Indirect: In this addressing mode, the address of the memory location which contains data or
operand is determined in an indirect way using offset registers. The offset address of data is in either BX or SI
or DI registers. The default segment register is either DS or ES.
E.g. MOV AX, [BX]
5. Indexed: In this addressing mode offset of the operand is stored in one of the index register. DS and ES are
the default segments for index registers SI and DI respectively.
E.g. MOV AX, [SI]
6. Register Relative: In this addressing mode, the data is available at an effective address formed by adding an
8-bit or 16-bit displacement with the content of any one of the registers BX, BP, SI and DI in the default either
DS or ES segment.
E.g. MOV AX, 50H [BX]

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7. Based Indexed: In this addressing mode, the effective address of the data is formed by adding the content of
a base register (any one of BX or BP) to the content of an index register (any one of SI or DI). The default
segment register may be ES or DS.
E.g. MOV AX, [BX] [SI]
8. Relative Based Indexed: The effective address is formed by adding an 8-bit or 16-bit displacement with the
sum of contents of any one of the base register (BX or BP) and any one of the index registers in a default
segment.
E.g. MOV AX, 50H [BX][SI]
9. Implied addressing mode: No address is required because the address or the operand is implied in the
instruction itself.
E.g. NOP, STC, CLI, CLD and STD.

Instruction set (Groups of Instructions):-

o Arithmetic Instructions
o Logical Instructions
o Data transfer instructions
o Bit manipulation instructions
o String Operation Instructions
o Program control transfer or branching Instructions
o Process control Instructions

Question: - State any four examples of immediate addressing mode.

Ans.: Immediate addressing mode examples are as
1) MOV AX, 0005H: AX is loaded with 16bitimmediate data i.e.0005H
2) MOV AL, 25H: Move 25H to AL or AL= 25H
3) MOV [SI], 0B29H – Move 0B29H (16 bit data) to two consecutive memory location which effective address
or offset is in SI and base address is in DS.
4) MOV CX, 1234H: Move 16 bit data to CX or CX =1234H

Question: - Explain any one logical instruction of 8086 with example.

Ans.: Logical instructions are:
1) AND: This instruction bit by bit ANDS the source operand that may be an immediate a register or a memory
location to the destination operand that may be a register or a memory location EX: AND AX, 0008H
2) OR
3) NOT

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4) XOR
5) TEST
6) CMP

Question: - If AL, BL and CL content 10H, 10H and 20H respectively .state the effects of following
instructions
i) CMP BL, CL
ii) XCHG AL, CL
Ans.:
AL 10H, BL 10H CL 20H
i) CMP BL, CL: This instruction compares the source operand with a destination operand. For
comparison, it subtracts the source operand from destination operand .i.e. it compare 20H TO 10 in
above CL subtracted from BL I.E 20H from 10H
ii) XCHG AL, CL: Exchange the content of CLTO AL i.e. 20H TO 10H

Compare:-

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Question: - Explain following string instructions and respective prefix:

i. REP MOV SW
ii. REPE CMP SB
Ans.: (2M each)
i. MOVSW
 The MOVSW instruction is used to transfer a word from the source string to the destination string.
 The source must be in the data segment and the destination in the extra segment.
 The offset of the source word must be placed in SI register, which is represented as DS:SI and the offset
of the destination word must be placed in DI register, which is represented as ES:DI
 If the Direction Flag is reset (DF = 0), the registers SI and DI will be incremented by two for the word
movement.
 If the Direction Flag is set (DF = 1), the registers SI and DI will be decremented by two for the word
movement.
 In multiple byte or word moves, the count must be loaded in CX register which functions as a counter.

ii. REP (Instruction Prefix)

 The REP instruction prefix is used in string instructions and interpreted as “Repeat while not end of
string”
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 In REP prefix, CX register is loaded with the count.
 Operation performed :-- While CX <>0, perform the string operation CX CX - 1

iii. CMPSB
 The CMPSB instruction is used to compare a byte in the source string with a byte in the destination
string.
 The source must be in the data segment and the destination in the extra segment.
 The offset of the source byte must be placed in SI register, which is represented as DS:SI and the offset
of the destination byte must be placed in DI register, which is represented as ES:DI
 If the Direction Flag is reset (DF = 0), the registers SI and DI will be incremented by one for the byte
comparison. If the Direction Flag is set (DF = 1), the registers SI and DI will be decremented by one for
the byte comparison.
 In multiple byte or word comparison, the count must be loaded in CX register which functions as a
counter.
 All conditional flags are affected

iv. REPE/REPZ (Instruction Prefix)

 The REPE instruction prefix is used in string instructions and interpreted as “Repeat while not end of
string and string equal” (CX<>0 and ZF =1)
 In REPE prefix, CX register is loaded with the count.
 Operation performed :-- While CX <>0 & ZF -1 , perform the string operation CX CX - 1

Question: - Identify the addressing modes used in the following instructions:

i. MOV DS, AX
ii. MOV AX, [4172H]
iii. ADD AX, [SI]
iv. ADD AX, [SI] [BX] [04H]
Ans.: (Each Addressing Mode -1M)
i) MOV DS,AX
Mode : Register Addressing Mode
ii) MOV AX, [4172H]
Mode: Direct Addressing Mode
iii) ADD AX, [SI]
Mode: Register Indirect or Indexed Mode
iv) ADD AX, [SI] [BX] [04H]
Mode: Relative Based Indexed Mode
Question: - Write appropriates 8086 instructions to perform following operations
i. Initialize stack at 42000 H
Ans. :
MOV AX,,4200h
MOV SS,AX
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MOV SP,0000H
ii. Rotate register BX right 4 times.
MOV CL,04H
RCR BX,CL or MOV CL,04H
ROR BX,CL

Question: - Define addressing mode. List any two addressing modes of 8086 microprocessor.
Ans:
 Addressing modes are the way of specifying an operand in an instruction.
 Immediate, Direct, Register, Register indirect, Indexed, Register relative, Based indexed, Relative based
indexed, Intersegment direct mode, Intersegment indirect mode, Intrasegment direct mode, Intrasegment
indirect mode.

Question: - Write assembly language instructions of 8086 microprocessor to:

(a) Add 100 H to the contents of AX register.
(b) Rotate the contents of AX towards left by 2 bits.
Ans:
(a) Add 100H to contents of AX register
ADD AX, 100H
(b) Rotate the contents of AX towards left by 2 bits
MOV CL, 02H
RCL AX, CL
Or
MOV CL, 02H
ROL AX, CL

Question: - Write any two arithmetic instructions & logical instructions with their functions. Give the
syntax with one example each.
Ans:
Any two arithmetic instructions from the following or any other
1. ADD Destination, Source
Example:
ADD AL, 74H
ADD DX, AX
ADD AX, [BX]
2. ADC Destination, Source
Example:
ADC AL, 74H
ADC DX, AX
ADC AX, [BX]
3. SUB Destination, Source
Example:

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SUB AL, 74H
SUB DX, AX
SUB AX, [BX]
4. SBB Destination, Source
Example:
SBB AL, 74H
SBB DX, AX
SBB AX, [BX]
5. INC Destination
Example:
INC AX
INC BL
6. DEC Destination
Example:
DEC AX
DEC CL
7. MUL (Unsigned multiplication)
Syntax: MUL source
Examples:
1. MUL BL ; Multiply AL by BL & the result in AX
2. MUL CX ; Multiply AX by CX & the result in DX,AX
3. MUL Byte PTR [SI] ; AX AL * [SI]
8. IMUL (Signed multiplication)
Syntax: IMUL source
Example:
1. IMUL BL ; Multiply AL by BL & the result in AX
2. IMUL CX ; Multiply AX by CX & the result in DX,AX
3. IMUL Byte PTR [SI] ; AX AL * [SI]
9. DIV (Unsigned Division)
Syntax: DIV source
Examples:
1. DIV BL ; Divide word in AX by byte in BL, Quotient is stored in AL, remainder in AH.
2. DIV CX ; Divide double word in DX:AX by word in CX, Quotient in AX, Remainder in DX.
3. DIV [BX] ; Divide word in AX by byte in memory location pointer by BX.

Any two logical instructions from the following or any other

AND (Logical AND)
Syntax: AND destination, source
Examples:
1. AND BH,CL ;AND byte in CL with Byte in BH, result in BH.
2. AND BX,00FFH ;AND word in BX with immediate data 00ffH
3. AND [5000H], DX ;AND word in DX with a word in memory with offset 5000 in DS.

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OR (Logical OR)
Syntax: OR destination, source
Examples:
1. OR BH,CL ;OR byte in CL with Byte in BH, result in BH.
2. OR BX,00FFH ;OR word in BX with immediate data 00ffH
3. OR [5000H], DX ; OR word in DX with a word in memory with offset 5000 in DS.
XOR (Logical XOR)
Syntax: XOR destination, source
Examples:
1. XOR BH,CL ;XOR byte in CL with Byte in BH, result in BH.
2. XOR BX,00FFH ;XOR word in BX with immediate data 00ffH
3. XOR [5000H], DX ; XOR word in DX with a word in memory with offset 5000 in DS.
NOT (Logical Invert)
Syntax: NOT destination
Examples:
1. NOT BH ;Complement byte in BH, result in BH.
2. NOT BX ; Complement word in BX, result in BX.
3. NOT BYTE PTR [5000H] ; Complement byte in memory with offset 5000 in DS.

Question: - List & explain any four string operation instructions with their functions & syntax.
Ans:
1] REP:
REP is a prefix which is written before one of the string instructions.
It will cause during length counter CX to be decremented and the string instruction to be repeated until CX
becomes 0.
REPE/REPZ:
Repeat if Equal /Repeat if Zero.
It will cause string instructions to be repeated as long as the compared bytes or words are equal and CX≠0.
REPNE/REPNZ:
Repeat if not equal/Repeat if not zero.
It repeats the strings instructions as long as compared bytes or words are not equal and CX≠0.
Example: REP MOVSB
2] MOVS/ MOVSB/ MOVSW - Move String byte or word.
Syntax
MOVS destination, source
MOVSB destination, source
MOVSW destination, source
Operation: ES:[DI]<----- DS:[SI]

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It copies a byte or word a location in data segment to a location in extra segment. The offset of source is pointed
by SI and offset of destination is pointed by DI.CX register contain counter and direction flag (DE) will be set
or reset to auto increment or auto decrement pointers after one move.
Example LEA SI, Source
LEA DI, destination
CLD
MOV CX, 04H
REP MOVSB
3] CMPS /CMPSB/CMPSW: Compare string byte or Words.
Syntax
CMPS destination, source
CMPSB destination, source
CMPSW destination, source
Operation: Flags affected < ----- DS:[SI]- ES:[DI]
It compares a byte or word in one string with a byte or word in another string. SI holds the offset of source and
DI holds offset of destination strings. CS contains counter and DF=0 or 1 to auto increment or auto decrement
pointer after comparing one byte/word.
Example: LEA SI, Source
LEA DI, destination
CLD
MOV CX, 100
REPE CMPSB
4] SCAS/SCASB/SCASW: Scan a string byte or word.
Syntax
SCAS/SCASB/SCASW
Operation: Flags affected < ----- AL/AX-ES: [DI]
It compares a byte or word in AL/AX with a byte /word pointed by ES: DI. The string to be scanned must be in
the extra segment and pointed by DI. CX contains counter and DF may be 0 or 1.
When the match is found in the string execution stops and ZF=1 otherwise ZF=0.
Example
LEA DI, destination
MOV Al, 0DH
MOV CX, 80H
CLD
REPNE SCASB
5] LODS/LODSB/LODSW: Load String byte into AL or Load String word into AX.
Syntax: LODS/LODSB/LODSW
Operation: AL/AX < ----- DS: [SI]
IT copies a byte or word from string pointed by SI in data segment into AL or AX.CX may contain the counter
and DF may be either 0 or 1
Example
LEA SI, destination

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CLD
LODSB
6] STOS/STOSB/STOSW (Store Byte or Word in AL/AX)
Syntax STOS/STOSB/STOSW
Operation: ES:[DI] < ----- AL/AX
It copies a byte or word from AL or AX to a memory location pointed by DI in extra segment CX may contain
the counter and DF may either set or reset.

Question: - Identify the addressing modes of following instructions:

(i) MUL AL, BL
(ii) MOV AX, BX
(iii) MOV BX, [S1]
(iv) MOV DX, 0040H
Ans:
i) MUL AL,BL:- Register addressing mode
ii) MOV AX ,BX:- Register addressing mode
iii) MOV BX,[SI]:-Indexed addressing mode
iv) MOV DX,0040H:-Immediate addressing mode

Question: - Explain the following instructions of 8086 microprocessor with their syntax:
(i) STRCMP
(ii) ADD
Ans: (i) STRCMP:-
(There is no instruction such as STRCMP. Instead, CMPS instruction may be considered as given below
CMPS/CMPSB/CMPSW
Syntax: CMPS destination, source
CMPSB
CMPSW
• The CMPS instruction is used to compare a byte or a word in the source string with a byte or a word in the
destination string.
• The source must be in the data segment and the destination in the extra segment.
• The offset of the source byte or a word must be placed in SI register, which is represented as DS:SI and the
offset of the destination byte or a word must be placed in DI register, which is represented as ES:DI
• On the execution of the instruction, SI and DI are automatically adjusted by one to the next element of the
source and destination.
• If the Direction Flag is reset (DF = 0), the registers SI and DI will be incremented by one for the byte
comparison and incremented by two for the word comparison.
• If the Direction Flag is set (DF = 1), the registers SI and DI will be decremented by one for the byte
comparison and decremented by two for the word comparison
• The DS:SI and ES:DI register must be loaded prior to the execution of the CMPS instruction.
• CMPSB and CMPSW are the implicit instructions to move a byte or word string.

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• The instruction CMPSB is used to compare a byte from the source with destination and the instruction MPSW
is used to compare a word in the source with destination.
• In multiple byte or word comparison, the count must be loaded in CX register which functions as a counter.
• All conditional flags are affected
OR
Operation Performed:--
If dest string > source string then CF =0, ZF = 0, SF = 0
If dest string < source string then CF =1, ZF = 0, SF = 1
If dest string = source string then CF =0, ZF = 1, SF = 0
If a byte comparison,
For DF =0, SI SI +1 & DI DI +1
For DF =1, SI SI -1 & DI DI – 1
If a word comparison,
For DF =0, SI SI +2 & DI DI +2
For DF =1, SI SI -2 & DI DI – 2
(iii) ADD:-This instruction is used to add immediate data to contain of register or to add content of one register
(or memory location) to another register (or memory location)
Syntax:-
ADD destination, source
Destination may be register or memory location and source may be data, memory location’s or registers.

Question: - State any two example of immediate addressing mode and two example of direct addressing
mode.
Ans:
Examples of immediate addressing mode:
 MOV AX, 0030H
 ADD AL, 20H
Examples of direct addressing mode:
 MOV [3000H], AL
 AND BX, [2050H]

Question: - Write assembly language instructions of 8086 microprocessor to

(1) Divide the content of AX register by 50H
(2) Rotate the content of BX register by 4 bit towards left
Ans:
(1) Divide the content of AX register by 50H:
MOV BL,50H
DIV BL
(2) Rotate the content of BX register by 4 bit towards left:
MOV CL,04H

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ROL BX,CL
OR
MOV CL,04H
RCL BX,CL

Question: - Analyze the content of AL register and status of carry and auxiliary carry flag after execution
of following instructions
MOV AL, 99H
ADD AL, 01H
DAA
Ans:
1001 1001 (99H
ADD AL,01H + 0000 0001 (01H)
------------------------
1001 1010 (9AH)
DAA + 0110 0110 (66 H) ; here Lower nibble > 9 (add 06H) and AL > 99H(add 60H)
------------------------
1 0000 0000 ( CF=1 , AF=1 )
Final Answer in AL= 100

Question: - Explain DAA instruction with suitable example.

Ans:-
DAA – (Decimal Adjust AL after BCD Addition)
Syntax- DAA
Explanation:
 This instruction is used to make sure the result of adding two packed BCD numbers is adjusted to be a
correct BCD number.
 The result of the addition must be in AL for DAA instruction to work correctly.
 If the lower nibble in AL after addition is > 9 or Auxiliary Carry Flag is set, then add 6 to lower nibble
of AL.
 If the upper nibble in AL is > 9H or Carry Flag is set, and then add 6 to upper nibble of AL.
 Example: - (Any Same Type of Example)
If AL=99 BCD and BL=99 BCD
Then ADD AL, BL
1001 1001 = AL= 99 BCD
+ 1001 1001 = BL = 99 BCD
----------------------------------------
0011 0010 = AL =32 H and CF=1, AF=1
After the execution of DAA instruction, the result is CF = 1
0011 0010 =AL =32 H AF =1
+ 0110 0110
-------------------------

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1001 1000 =AL =98 in BCD

(OR)

Explanation: (DAA: Decimal Adjust Accumulator)

 This is the only instruction that uses the auxiliary flag to perform the binary to BCD conversion, and the
conversion procedure is described below.
 S, Z, AC, P, CY flags are altered to reflect the results of the operation.
 If the value of the low-order 4-bits in the accumulator is greater than 9 or if AC flag is set, the
instruction adds 6 to the low-order four bits.
 If the value of the high-order 4-bits in the accumulator is greater than 9 or if the Carry flag is set, the
instruction adds 6 to the high-order four bits.
 The DAA instruction (Decimal Adjust Accumulator) allows conversion of the 8-bit accumulator value to
Binary Coded Decimal (BCD).
 If the low-order 4 bits of the accumulator are greater than 9, or the auxiliary carry flag is set, 6 is added
to the low-order 4 bits of accumulator, then if the high-order 4 bits of the accumulator are greater than 9,
or the carry flag is set, 6 is added to the high-order 4 bits of the accumulator.
 Execute DAA only after executing an ADD instruction that leaves a two-BCD-digit byte result in the AL
register.
 The ADD operands should consist of two packed BCD digits.
 The DAA instruction adjusts AL to contain the correct two-digit packed decimal result.
Example :
mov al,38h ;packed decimal "38"
add al,45h ;add packed decimal "45"
daa ;AL = 7Dh -> 83h (with CF clear = 83 packed decimal)

Question: - a) Identify the addressing mode of following instructions.

(i) INC [4712H]
(ii) ADD AX, 4712H
(iii) DIV BL
(iv) MOV AX, [BX + SI]
Ans:
(i) INC [4712H] :Direct Addressing Mode
(ii) ADD AX, 4712H :Immediate Addressing Mode
(iii) DIV BL :Register Addressing Mode
(iv) MOV AX, [BX + SI] :Base Plus Index Mode (OR) Based Indexed Addressing Mode

Question: - Explain the following instructions with suitable of 8086 with suitable example.
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(i) XLAT
(ii) AAA
Ans:

Question: - Write an instruction of 8086 to perform following operation.

(i) Shift the content of BX register'3 bit toward left.
(ii) Move 1234H in DS register.
Ans:
(i) Shift the content of BX register'3 bit toward left :
MOV CL, 03H
SHL BX, CL
(OR)
MOV CL,03H
SAL BX,CL
(ii) Move 1234H in DS register
MOV AX, 1234H
MOV DS, AX

Question: - Identify addressing modes in following instructions:

(i) MOV AX, 2050H
(ii) STC
(iii) MOV AL, DS:[SI]
(iv) INC BX
Ans:
(i) MOV AX,2050H -> Immediate Addressing mode
(ii) STC -> Implied addressing mode
(iii) MOV AL,DS:[SI] -> Indexed addressing mode
(iv) INC BX -> Register addressing mode

Question: - What will be content of register BX after execution of instructions?

MOV BX, 2050H
MOV CL, 05H

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SHL BX, CL

Content of BX After execution =0A00H

Compare:-

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Question: - Name the different types of jump instructions used in 8086 assembly language program. (Any
eight)
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Ans:
1. JMP Label : unconditional jump to address using 16 bit displacement or CS:IP
2. JZ Label : Transfer control to ‘Label’ if ZF 1
3. JNZ Label : Transfer control to ‘Label’ if ZF 0
4. JS Label : Transfer control to ‘Label’ if SF 1
5. JNS Label : Transfer control to ‘Label’ if SF 0
6. JO Label : Transfer control to ‘Label’ if OF 1
7. JNO Label : Transfer control to ‘Label’ if OF 0
8. JP Label : Transfer control to ‘Label’ if PF 1
9. JNP Label : Transfer control to ‘Label’ if PF 0
10. JPO Label : Transfer control to ‘Label’ if parity odd
11. JPE Label : Transfer control to ‘Label’ if parity even
12. JB Label : Transfer control to ‘Label’ if CF 1
13. JNB Label : Transfer control to ‘Label’ if CF 0
14. JBE Label : Transfer control to ‘Label’ if CF 1or ZF 1
15. JNBE Label : Transfer control to ‘Label’ if CF 0 or ZF 0
16. JL Label : Transfer control to ‘Label’ if SF 1 or OF 1
17. JNL Label : Transfer control to ‘Label’ if SF 0 or OF 0
18. JLE Label : Transfer control to ‘Label’ if ZF 1 or neither SF nor OF is 1
19. JNLE Label : Transfer control to ‘Label’ if ZF 0 or at least any one of SF and OF is 1

Question: - Identify the addressing modes in following instructions

(i) MUL AL, BL
(ii) MOV AX, BX.
(iii) MOV AX, 2100 H
Ans:
i) MUL AL,BL:- Register addressing mode (Incorrect MUL instruction; corrected as MUL BL)
ii) MOV AX ,BX:- Register addressing mode
iii) MOV AX,2100H:-Immediate addressing mode

Question: - Explain the following instructions of 8086

(i) DAA
(ii) XLAT

Question: - List the string related instructions of 8086 microprocessor and explain any two instructions.
Ans:
String related instructions of 8086 microprocessor are:

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1. MOVS
2. MOVSB
3. MOVSW
4. LODS
5. LODSB
6. LODSW
7. STOS
8. STOSB
9. STOSW
10. CMPS
11. CMPSB
12. CMPSW
13. SCAS
14. SCASB
15. SCASW
1] MOVS/ MOVSB/ MOVSW - Move String byte or word.
Syntax
MOVS destination, source
MOVSB
MOVSW
Operation: ES:[DI]<----- DS:[SI]
It copies a byte or word a location in data segment to a location in extra segment. The offset of source is pointed
by SI and offset of destination is pointed by DI.CX register contain counter and direction flag (DF) will be set
or reset to auto increment or auto decrement pointers after one move.
Example
LEA SI, Source
LEA DI, destination
CLD
MOV CX, 04H
REP MOVSB
2] CMPS /CMPSB/CMPSW: Compare string byte or Words.
Syntax
CMPS destination, source
CMPSB
CMPSW
Operation: Flags affected < ----- DS:[SI]- ES:[DI]
It compares a byte or word in one string with a byte or word in another string. SI holds the offset of source and
DI holds offset of destination strings. CX contains counter and DF=0 or 1 to auto increment or auto decrement
pointer after comparing one byte/word.
Example
LEA SI, Source
LEA DI, destination

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CLD
MOV CX, 100
REPE CMPSB
3] SCAS/SCASB/SCASW: Scan a string byte or word.
Syntax
SCAS/SCASB/SCASW
Operation: Flags affected < ----- AL/AX-ES: [DI]
It compares a byte or word in AL/AX with a byte /word pointed by ES: DI. The string to be scanned must be in
the extra segment and pointed by DI. CX contains counter and DF may be 0 or 1. When the match is found in
the string execution stops and ZF=1 otherwise ZF=0.
Example
LEA DI, destination
MOV Al, 0DH
MOV CX, 80H
CLD
REPNE SCASB

4] LODS/LODSB/LODSW: Load String byte into AL or Load String word into AX.
Syntax: LODS/LODSB/LODSW
Operation: AL/AX < ----- DS: [SI]
It copies a byte or word from string pointed by SI in data segment into AL or AX.CX may contain the counter
and DF may be either 0 or 1
Example
LEA SI, destination
CLD
LODSB
6] STOS/STOSB/STOSW (Store Byte or Word in AL/AX)
Syntax STOS/STOSB/STOSW
Operation: ES:[DI] < ----- AL/AX
It copies a byte or word from AL or AX to a memory location pointed by DI in extra segment CX may contain
the counter and DF may either set or reset.

Programs:-
Write an assembly language program (WALP) to exchange the contents of the memory
locations 10000 H and 10001 H.
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Method 1:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: CS: CODE
CODE SEGMENT
START: MOV DX, 1000H
MOV DS, DX
MOV SI, 0000H
MOV AL, [SI]
INC SI
XCHG AL, BYTE PTR [SI]
DEC SI
MOV [SI], AL
CODE ENDS
END START
Method 2:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: CS: CODE
CODE SEGMENT
START: MOV DX, 1000H
MOV DS, DX
MOV AL, [0000H]
MOV BL, [0001H]
MOV [0000H], BL
MOV [0001H], AL
CODE ENDS
END START

Method 3:-
Any valid program you write.
WALP to perform addition of two 8-bit numbers present in memory locations 40000 H and 41000 H.
Store the result in the memory location 42000 H. Assume the result to be 8-bit only:-

Method 1:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE THE
ADDRESS OF THE DATA ONTO WHICH THE OPERATION IS
TO BE PERFORMED IS DIRECTLY SPECIFIED IN THE

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PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV SI, 0000H
MOV AL, [SI]
ADD AL, [1000H]
MOV [2000H], AL
CODE ENDS
END START

Method 2:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV SI, 0000H
MOV AL, [SI]
MOV SI, 1000H
MOV BL, [SI]
ADD AL, BL
MOV SI, 2000H
MOV [SI], AL
CODE ENDS
END START

WALP to perform addition of two 8-bit numbers present in memory locations 40000 H and 41000 H.
Store the result in the memory locations 42000 H (lower byte) and 43000 H (higher byte). Assume the
result to be greater than 8-bits (9-bits):-

METHOD 1:-

Program Comment
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NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV [3000H], 00H
MOV SI, 0000H
MOV AL, [SI]
ADD AL, [1000H]
JNC SKIP
INC [3000H]
SKIP: MOV [2000H], AL
CODE ENDS
END START
METHOD 2:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV BL, 00H
MOV SI, 0000H
MOV AL, [SI]
ADD AL, [1000H]
JNC SKIP
RCL BL, 1
SKIP: MOV [2000H], AL
MOV [3000H], BL
CODE ENDS
END START

WALP to perform addition of two 8-bit numbers. Assume the result to be 8-bit only:-

METHOD 1:-

Program Comment
DATA SEGMENT
NUM1 DB 10H
NUM2 DB 20H
RESULT DB ?

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DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, NUM1
ADD AL, NUM2
MOV RESULT, AL
CODE ENDS
END START

METHOD 2:-

Program Comment
DATA SEGMENT
NUM1 DB 10H
NUM2 DB 20H
RESULT DB ?
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, NUM1
MOV BL, NUM2
ADD AL, BL
MOV RESULT, AL
CODE ENDS
END START

WALP to perform addition of two 8-bit numbers. Assume the result to be greater than 8-bit (9-bits):-

METHOD 1:-

Program Comment
DATA SEGMENT
NUM1 DB 80H
NUM2 DB 90H
RESULT_LOWBYTE DB ?

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RESULT_HIGHBYTE DB 0
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, NUM1
ADD AL, NUM2
JNC SKIP
INC RESULT_HIGHBYTE
SKIP: MOV RESULT_LOWBYTE, AL
CODE ENDS
END START
METHOD 2:-

Program Comment
DATA SEGMENT
NUM1 DB 80H
NUM2 DB 90H
RESULT_LOWBYTE DB ?
RESULT_HIGHBYTE DB ?
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AH, 00H
MOV AL, NUM1
ADD AL, NUM2
JNC SKIP
INC AH
SKIP: MOV RESULT_LOWBYTE, AL
MOV RESULT_HIGHBYTE, AH
CODE ENDS
END START
WALP to perform subtraction of two 8-bit numbers present in memory locations 40000 H and 41000 H.
Subtract the number available in memory location 40000H from the number available in memory
location 41000. Store the result in the memory location 42000 H. Assume the result to be 8-bit only:-

Method 1:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE

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CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV SI, 1000H
MOV AL, [SI]
SUB AL, [0000H]
MOV [2000H], AL
CODE ENDS
END START

Method 2:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV SI, 1000H
MOV AL, [SI]
MOV SI, 0000H
MOV BL, [SI]
SUB AL, BL
MOV SI, 2000H
MOV [SI], AL
CODE ENDS
END START

WALP to perform subtraction of two 8-bit numbers present in memory locations 40000 H and 41000 H.
Store the result in the memory locations 42000 H (lower byte) and 43000 H (higher byte). Assume the
result to be greater than 8-bits (9-bits):-

METHOD 1:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT

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START: MOV DX, 4000H
MOV DS, DX
MOV [3000H], 00H
MOV SI, 1000H
MOV AL, [SI]
SUB AL, [0000H]
JNC SKIP
INC [3000H]
SKIP: MOV [2000H], AL
CODE ENDS
END START
METHOD 2:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV BL, 00H
MOV SI, 1000H
MOV AL, [SI]
SUB AL, [0000H]
JNC SKIP
RCL BL, 1
SKIP: MOV [2000H], AL
MOV [3000H], BL
CODE ENDS
END START

WALP to perform subtraction of two 8-bit numbers. Assume the result to be 8-bit only:-

METHOD 1:-

Program Comment
DATA SEGMENT
NUM1 DB 20H
NUM2 DB 10H
RESULT DB ?
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX

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MOV AL, NUM1
SUB AL, NUM2
MOV RESULT, AL
CODE ENDS
END START

METHOD 2:-

Program Comment
DATA SEGMENT
NUM1 DB 20H
NUM2 DB 10H
RESULT DB ?
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, NUM1
MOV BL, NUM2
SUB AL, BL
MOV RESULT, AL
CODE ENDS
END START

WALP to perform subtraction of two 8-bit numbers. Assume the result to be greater than 8-bit (9-bits):-

METHOD 1:-

Program Comment
DATA SEGMENT
NUM1 DB 70H
NUM2 DB 80H
RESULT_LOWBYTE DB ?
RESULT_HIGHBYTE DB 0
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA

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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
MOV DS, DX
MOV AL, NUM1
SUB AL, NUM2
JNC SKIP
INC RESULT_HIGHBYTE
SKIP: MOV RESULT_LOWBYTE, AL
CODE ENDS
END START
METHOD 2:-

Program Comment
DATA SEGMENT
NUM1 DB 70H
NUM2 DB 80H
RESULT_LOWBYTE DB ?
RESULT_HIGHBYTE DB ?
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AH, 00H
MOV AL, NUM1
SUB AL, NUM2
JNC SKIP
INC AH
SKIP: MOV RESULT_LOWBYTE, AL
MOV RESULT_HIGHBYTE, AH
CODE ENDS
END START
Add the two 16-bit numbers in the memory locations 20000 H and 20001H with the numbers in the memory
locations 20002 H and 20003 H. The most significant eight bits to be added are in the memory locations 20001 H
and 20003 H. Store the results in the memory locations 20004 H and 20005 H with most significant byte in the
memory location 20005 H. assume the result to be 16 Bits only:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE THE ADDRESS OF
THE DATA ONTO WHICH THE OPERATION IS TO BE PERFORMED
IS DIRECTLY SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 2000H
MOV DS, DX
MOV AL, [0000H]
ADD AL, [0002H]
MOV DL, AL
MOV AL, [0001H]
ADC AL, [0003H]
MOV DH, AL

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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
MOV [0004H], DL
MOV [0005H], DH
CODE ENDS
END START

Add the two 16-bit numbers in the memory locations 20000 H and 20001H with the numbers in the memory
locations 20002 H and 20003 H. The most significant eight bits to be added are in the memory locations 20001 H
and 20003 H. assume the result to be more than 16 Bits (17-bits). Store the results in the memory locations 20004 H
and 20005 H with most significant byte of the lower word (LSW) in the memory location 20005 H. Store the higher
word in memory locations 20006H and 20007H:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE THE ADDRESS OF THE
DATA ONTO WHICH THE OPERATION IS TO BE PERFORMED IS
DIRECTLY SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 2000H
MOV DS, DX
MOV [0006H], 00H
MOV [0007H], 00H
MOV AL, [0000H]
ADD AL, [0002H]
MOV DL, AL
MOV AL, [0001H]
ADC AL, [0003H]
MOV DH, AL
JNC SKIP
INC [0007H]
SKIP: MOV [0004H], DL
MOV [0005H], DH
CODE ENDS
END START

WALP to add the two 16-bit numbers. Assume the result to be 16 Bits only:-

Program Comment
DATA SEGMENT
NUM1 DW 1070H
NUM2 DW 1080H
RESULT DW ?

DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AX, NUM1

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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
ADD AX, NUM2
MOV RESULT, AX
CODE ENDS
END START

WALP to add the two 16-bit numbers. Assume the result to be more than 16 Bits (17-BITS):-

Program Comment
DATA SEGMENT
NUM1 DW 8080H
NUM2 DW 8080H
RESULT_LOWWORD DW 0000
RESULT_HIGHWORD DW 0000
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AX, NUM1
ADD AX, NUM2
JNC SKIP
INC RESULT_HIGHWORD
SKIP: MOV RESULT_LOWWORD, AX
CODE ENDS
END START

Subtract the two 16-bit numbers in the memory locations 20000 H and 20001H from the numbers in the memory
locations 20002 H and 20003 H. The most significant eight bits to be subtracted are in the memory locations 20001
H and 20003 H. Store the results in the memory locations 20004 H and 20005 H with most significant byte in the
memory location 20005 H. assume the result to be 16 Bits only:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 2000H
MOV DS, DX
MOV AL, [0002H]
SUB AL, [0000H]
MOV DL, AL
MOV AL, [0003H]
SBB AL, [0001H]
MOV DH, AL
MOV [0004H], DL

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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
MOV [0005H], DH
CODE ENDS
END START

Subtract the two 16-bit numbers in the memory locations 20000 H and 20001H from the numbers in the memory
locations 20002 H and 20003 H. The most significant eight bits to be subtracted are in the memory locations 20001
H and 20003 H. assume the result to be more than 16 Bits (17-bits). Store the results in the memory locations 20004
H and 20005 H with most significant byte of the lower word (LSW) in the memory location 20005 H. Store the
higher word in memory locations 20006H and 20007H:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE THE ADDRESS OF THE DATA ONTO
WHICH THE OPERATION IS TO BE PERFORMED IS DIRECTLY SPECIFIED IN THE
PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 2000H
MOV DS, DX
MOV [0006H], 00H
MOV [0007H], 00H
MOV AL, [0002H]
SUB AL, [0000H]
MOV DL, AL
MOV AL, [0003H]
SBB AL, [0001H]
MOV DH, AL
JNC SKIP
INC [0007H]
SKIP: MOV [0004H], DL
MOV [0005H], DH
CODE ENDS
END START

WALP to add the SUBTRACT 16-bit numbers. Assume the result to be 16 Bits only:-

Program Comment
DATA SEGMENT
NUM1 DW 1234H
NUM2 DW 0123H
RESULT DW ?
DATA ENDS

ASSUME: DS:DATA, CS: CODE

CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AX, NUM1
SUB AX, NUM2
MOV RESULT, AX
CODE ENDS
Page 92
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
END START

WALP to subtract the two 16-bit numbers. Assume the result to be more than 16 Bits (17-BITS):-

Program Comment
DATA SEGMENT
NUM1 DW 7080H
NUM2 DW 8080H
RESULT_LOWWORD DW 0000
RESULT_HIGHWORD DW 0000
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AX, NUM1
SUB AX, NUM2
JNC SKIP
INC RESULT_HIGHWORD
SKIP: MOV RESULT_LOWWORD, AX
CODE ENDS
END START

WALP to find the 1’s complement of the number stored at memory location 40000 H.

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE THE
ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
NOT [0000H]
CODE ENDS
END START

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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
Find the 1’s complement of the number stored at memory location 40000 H and store the complemented
number at 40001 H.

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE THE
ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV AL, [0000H]
NOT AL
MOV [0001H], AL
CODE ENDS
END START

WALP to find the 2’s complement of the number stored at memory location 40000 H.
Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE THE ADDRESS OF THE
DATA ONTO WHICH THE OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
NOT [0000H]
ADD [0000H], 1
CODE ENDS
END START

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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)

Write a program to add ten bytes of data. Data is stored in the memory locations starting 40000 H
onwards. The result is 8-bit. Store the result at 41234 H location.

Program Comment
NO NEED TO DECLARE DATA SEGMENT
SINCE THE ADDRESS OF THE DATA
ONTO WHICH THE OPERATION IS TO
BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM
STATEMENT
ASSUME: DS:DATA, CS:
CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV CX, 000A H
MOV AL, 00H
MOV BX, [0000H]
UP: ADD AL, [BX]
INC BX
LOOP UP
MOV [1234H], AL
CODE ENDS
END START

Page 95
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)

Write a program to add ten bytes of data. Data is stored in the memory locations starting 40000 H
onwards. The result may be more than 8-bit (9-BITS). Store the LSB result at 4000A H location and
MSB result at 4000B H.

Page 96
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
Program Comment
NO NEED TO DECLARE DATA SEGMENT
SINCE THE ADDRESS OF THE DATA
ONTO WHICH THE OPERATION IS TO
BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM
STATEMENT
ASSUME: DS:DATA, CS:
CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV CX, 000A H
MOV AH, 00H
MOV AL, 00H
MOV BX, [0000H]
UP: ADD AL, [BX]
JNC SKIP
INC AH
SKIP: INC BX
LOOP UP
MOV [000A H], AL
MOV [000B H], AH
CODE ENDS
END START

Write a program to find the square of the number. The number is 05H; the result should be in BCD
format.
Program Comment
DATA SEGMENT
NUM1 DB 05H
RESULT DB ?
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, NUM1
MUL NUM1
DAA
MOV RESULT, AX
CODE ENDS
END START
Write a program
to find the square of the number. The number is 05H; the result should be in BCD format.

Page 97
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
Program Comment
DATA SEGMENT
NUM1 DB 05H
RESULT DB ?
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, 00H
MOV CX, 0005H
UP: ADD AL, NUM1
DAA
LOOP UP
MOV RESULT, AL
CODE ENDS
END START

WALP to Add two 2 digits BCD numbers available in the memory locations 40000 H and 40001 H.
Store the result in memory locations 40002 H. Assume result is of only 8 bit:-

Program Comment
NO NEED TO DECLARE DATA SEGMENT SINCE
THE ADDRESS OF THE DATA ONTO WHICH THE
OPERATION IS TO BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV SI, 0000H
MOV AL, [SI]
ADD AL, [0001 H]
DAA
MOV [0002 H], AL
CODE ENDS
END START

WALP to add two 2 digits BCD numbers. Assume result is of only 8 bit:-

Page 98
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
Program Comment
DATA SEGMENT
NUM1 DB 15H
NUM2 DB 10 H
RESULT DB 0
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, NUM1
ADD AL, NUM2
DAA
MOV RESULT, AL
CODE ENDS
END START

WALP to add two 2 digits BCD numbers. Assume result is to be more than 8 bits (9-bits):-

Program Comment
DATA SEGMENT
NUM1 DB 85H
NUM2 DB 80 H
RESULT_LSBYTE DB 0
RESULT_HSBYTE DB 0
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, NUM1
ADD AL, NUM2
DAA
JNC DOWN
INC RESULT_HSBYTE
MOV RESULT_LSBYTE, AL
CODE ENDS
END START

WALP to Add two 4 digits BCD numbers. Assume result is of only 16 bits:-

Page 99
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
Program Comment
DATA SEGMENT
NUM1 DW 1515 H
NUM2 DW 1010 H
RESULT_LSW DW 0
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, BYTE PTR NUM1
ADD AL, BYTE PTR NUM2
DAA
MOV BYTE PTR RESULT_LSW, AL
MOV AL, BYTE PTR NUM1+1
ADC AL, BYTE PTR NUM2+1
DAA
MOV BYTE PTR RESULT_LSW+1, AL
CODE ENDS
END START

WALP to Add two 4 digits BCD numbers. Assume result is to be more than 16 bits:-
Program Comment
DATA SEGMENT
NUM1 DW 8515 H
NUM2 DW 8010 H
RESULT_LSW DW 0
RESULT_MSW DW 0
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, BYTE PTR NUM1
ADD AL, BYTE PTR NUM2
DAA
MOV BYTE PTR RESULT_LSW, AL
MOV AL, BYTE PTR NUM1+1
ADC AL, BYTE PTR NUM2+1
DAA
MOV BYTE PTR RESULT_LSW+1, AL
JNC NEXT
INC RESULT_MSW
NEXT: CODE ENDS
END START

WALP to subtract two 4 digits BCD numbers. Assume result is of only 16 bits:-

Page 100
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
Program Comment
DATA SEGMENT
NUM1 DW 1515 H
NUM2 DW 1010 H
RESULT_LSW DW 0
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, BYTE PTR NUM1
SUB AL, BYTE PTR NUM2
DAS
MOV BYTE PTR RESULT_LSW, AL
MOV AL, BYTE PTR NUM1+1
SBB AL, BYTE PTR NUM2+1
DAS
MOV BYTE PTR RESULT_LSW+1, AL
CODE ENDS
END START

WALP to Add two 4 digits BCD numbers. Assume result is to be more than 16 bits:-

Program Comment
DATA SEGMENT
NUM1 DW 8515 H
NUM2 DW 8010 H
RESULT_LSW DW 0
RESULT_MSW DW 0
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV AL, BYTE PTR NUM1
SUB AL, BYTE PTR NUM2
DAS
MOV BYTE PTR RESULT_LSW, AL
MOV AL, BYTE PTR NUM1+1
SBB AL, BYTE PTR NUM2+1
DAS
MOV BYTE PTR RESULT_LSW+1, AL
JNC NEXT
INC RESULT_MSW
NEXT: CODE ENDS
END START

Write a program to transfer the 10 byte (BLOCKS) of data stored in memory location at 40000 H to
60000 H (FORWARD ORDER).

Page 101
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
Program Comment
NO NEED TO DECLARE DATA SEGMENT
SINCE THE ADDRESS OF THE DATA
ONTO WHICH THE OPERATION IS TO
BE PERFORMED IS DIRECTLY
SPECIFIED IN THE PROGRAM
STATEMENT
ASSUME: DS:DATA, CS:
CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV CX, 000A H
MOV BX, 6000H
MOV ES, BX
MOV SI, 0000H
MOV DI, 0000H
UP: MOV AL, [SI]
MOV [ES:DI], AL
INC SI
INC DI
LOOP UP
MOV AH, 4CH
INT 21
CODE ENDS
END START

Write a program to transfer the 10 byte (BLOCKS) of data stored in memory location at 40000 H to
60000 H (REVERSE ORDER).
Page 102
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
Program Comment
NO NEED TO DECLARE DATA SEGMENT
SINCE THE ADDRESS OF THE DATA ONTO
WHICH THE OPERATION IS TO BE
PERFORMED IS DIRECTLY SPECIFIED IN
THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV CX, 000A H
MOV BX, 6000H
MOV ES, BX
MOV SI, 0000H
MOV DI, 0009H
UP: MOV AL, [SI]
MOV [ES:DI], AL
INC SI
DEC DI
LOOP UP
MOV AH, 4CH
INT 21
CODE ENDS
END START
Write a program to transfer
the 10 byte (BLOCKS) of data from one location to another location (FORWARD ORDER).
Program Comment
DATA SEGMENT
BLOCK1 DB 10H, 11H, 12H, 13H, 14H, 15H, 16H,
17H, 18H, 19H
BLOCK2 DB 10 DUP(0)
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV CX, 000A H
LEA SI, BLOCK1
LEA DI, BLOCK2
UP: MOV AL, [SI]
MOV [DI], AL
INC SI
INC DI
LOOP UP
MOV AH, 4CH
INT 21
CODE ENDS
END START

Page 103
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)

Write a program to transfer the 10 byte (BLOCKS) of data from one location to another location
(REVERSE ORDER).
Program Comment
DATA SEGMENT
BLOCK1 DB 10H, 11H, 12H, 13H, 14H, 15H, 16H,
17H, 18H, 19H
BLOCK2 DB 10 DUP(0)
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV CX, 000A H
LEA SI, BLOCK1
LEA DI, BLOCK2+10
UP: MOV AL, [SI]
MOV [DI], AL
INC SI
DEC DI
LOOP UP
MOV AH, 4CH
INT 21
CODE ENDS
END START

W.A.P. to exchange the 10 blocks of data. Two array’s of 10 blocks start from memory location 40000
H and 41000 H respectively.

Page 104
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
Program Comment
NO NEED TO DECLARE DATA SEGMENT
SINCE THE ADDRESS OF THE DATA ONTO
WHICH THE OPERATION IS TO BE
PERFORMED IS DIRECTLY SPECIFIED IN
THE PROGRAM STATEMENT
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, 4000H
MOV DS, DX
MOV CX, 000A H
MOV SI, 0000H
MOV DI, 1000H
UP: MOV AL, [SI]
XCHG AL, [DI]
XCHG AL, [SI]
INC SI
INC DI
LOOP UP
MOV AH, 4CH
INT 21
CODE ENDS
END START

W.A.L.P to add the series of five 8-bit numbers.

Program Comment
DATA SEGMENT
ARRAY DB 10H, 11H, 12H, 13H, 14H.
SUM_LOWBYTE DB 00H
SUM_HIGHBYTE DB 00H
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
Program Comment
DATA SEGMENT MOV DS, DX
MOV2000H,
ARRAY DW 1000H, CX, 0005 H 4000H,
3000H,
5000H. MOV AL, 00H
SUM_LOW DWMOV SI, OFFSET ARRAY
0000H
UP:
SUM_HIGH DW 0000H ADD AL, [SI]
DATA ENDS JNC NEXT
INC SUM_HIGHBYTE
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT NEXT: INC SI
LOOP UP
START: MOV DX, DATA
MOVMOV
SUM_LOWBYTE,
DS, DX AL
MOV AH,
MOV CX, 0005 H4CH
INTAX,
MOV 21 0000H
CODE ENDS
MOV SI, OFFSET ARRAY
ENDADD
UP: START
AX, [SI]
JNC NEXT
W.A.L.P to add the series of INC SUM_HIGH
five 16-bit numbers. NEXT: INC SI
INC SI
LOOP UP
MOV SUM_LOW, AX
MOV AH, 4CH Page 105
INT 21
CODE ENDS
END START
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)

W.A.L.P to count the even numbers in an array of 10 8-BIT numbers.

Program Comment
DATA SEGMENT
BLOCK1 DB 10H, 11H, 12H, 13H, 14H, 15H, 16H,
17H, 18H, 19H
COUNT DB 00H
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV CX, 000A H
MOV SI, OFFSET BLOCK1
UP: MOV AL, [SI]
Program
ROR AL, 1
Comment
DATA SEGMENT
JC DOWN
BLOCK1 DB 10H, 11H, 12H, 13H, 14H, 15H, 16H,
INC COUNT
17H, 18H, 19H
DOWN: INC SI
COUNT DB 00H
LOOP UP
DATA ENDS
MOV AH, 4CH
ASSUME: DS:DATA, CS: CODE
INT 21
CODE SEGMENT
CODE ENDS
START: MOV DX, DATA
END START
MOV DS, DX
MOV CX, 000A H
MOV SI, OFFSET BLOCK1
W.A.L.P to count the odd UP: MOV AL, [SI]
ROR AL, 1
numbers in an array of 10 8- JNC DOWN
BIT numbers. INC COUNT
DOWN: INC SI
LOOP UP
MOV AH, 4CH Page 106
INT 21
CODE ENDS
END START
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)

W.A.L.P to check whether the number is even or odd.

Program Comment
DATA SEGMENT
NUM DB 11H
COUNT_EVEN DB 00H
COUNT_ODD DB 00H
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV CX, 0001 H
MOV AL, NUM
Program
ROR AL, 1 Comment
DATA SEGMENT JC DOWN
BLOCK1 DB 10H, 11H,
INC 12H, 13H, 14H, 15H, 16H,
COUNT_EVEN
17H, 18H, 19H JMP EXIT
SUM DB 00HDOWN: INC COUNT_ODD
DATA ENDS MOV AH, 4CH
INT 21
ASSUME: DS:DATA, CS:ENDS
CODE CODE
CODE SEGMENT END START
START: MOV DX, DATA
MOV DS, DX
MOV CX, 000A H
LEA BX, OFFSET ARRAY
UP: MOV AL, [BX]
WALP to add only odd numbers MOV DL, AL
from an array of 10 numbers. ROR AL, 1
JNC NEXT
ADD SUM, DL
NEXT: INC BX
LOOP UP
MOV AH, 4CH Page 107
INT 21
CODE ENDS
END START
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)

WALP to add only even numbers from an array of 10 numbers.

Program Comment
DATA SEGMENT
BLOCK1 DB 10H, 11H, 12H, 13H, 14H, 15H, 16H,
17H, 18H, 19H
SUM DB 00H
DATA ENDS

ASSUME: DS:DATA, CS: CODE

CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV CX, 000A H
LEA BX, OFFSET ARRAY
UP: MOV AL, [BX]
MOV DL, AL
ROR AL, 1
JC NEXT
ADD SUM, DL
NEXT: INC BX
LOOP UP
MOV AH, 4CH
INT 21
CODE ENDS
END START
Write an ALP to count the number of ‘1’ in a number stored in accumulator.
Answer:
DATA SEGMENT
NUM DB 02H

Page 108
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE,DS:DATA
START:
MOV DX,DATA
MOV DS,DX
MOV CX,08H
MOV BL,00H
MOV AL,NUM
UP:ROR AL,1
JNC DN
INC BL
DN:LOOP UP
MOV AX, 4C00H
INT 21H
CODE ENDS
END START

OR
DATA SEGMENT
NUM DW 1102H
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE,DS:DATA
START:
MOV DX,DATA
MOV DS,DX
MOV CX,10H
MOV BL,00H
MOV AX,NUM
UP:ROR AX,1
JNC DN
INC BL
DN:LOOP UP
MOV AX, 4C00H
INT 21H
CODE ENDS
END START

Write an ALP to sort a array of 10 numbers in Ascending order.

DATA SEGMENT
ARRAY DB 06H,09H,22H,02H,07H,10H,11H,12H,13H,14H
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE,DS:DATA
Page 109
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
START: MOV AX,DATA
MOV DS,AX
MOV BL,0AH
STEP1: MOV SI, OFFSET ARRAY
MOV CL,09H
STEP2: MOV AL,[SI]
CMP AL,[SI+1]
JC DOWN
XCHG AL, [SI+1]
XCHG AL,[SI]
DOWN: ADD SI, 01
LOOP STEP2
DEC BL
JNZ STEP1
MOV AH,4CH
INT 21H
CODE ENDS
END START

Write an ALP to sort a array of 10 numbers in descending order.

DATA SEGMENT
ARRAY DB 06H,09H,22H,02H,07H,10H,11H,12H,13H,14H
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE,DS:DATA
START: MOV AX,DATA
MOV DS,AX
MOV BL,0AH
STEP1: MOV SI, OFFSET ARRAY
MOV CL,09H
STEP2: MOV AL,[SI]
CMP AL,[SI+1]
JNC DOWN
XCHG AL, [SI+1]
XCHG AL,[SI]
DOWN: ADD SI, 01
LOOP STEP2
DEC BL
JNZ STEP1
MOV AH,4CH
INT 21H
CODE ENDS
END START

Write an ALP for 8086 to multiply two 16 bit numbers.

DATA SEGMENT
NUM1 DW 0002H
NUM2 DW 0003H
L_RES DW ?
H_RES DW ?
DATA ENDS

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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
CODE SEGMENT
ASSUME CS:CODE, DS:DATA
START: MOV AX,DATA ;INITIALIZE DATA SEGMENTS
MOV DS,AX
MOV AX,NUM1 ; MOVE NUM1 IN AX
MUL NUM2 ; MULTIPLY NUM2 WITH AX CONTENT
MOV L_RES,AX ; STORE LOWER SIDE 16-BIT RESULT FROM AX TO L_RES
MOV H_RES,DX ; STORE HIGHER SIDE 16-BIT RESULT FROM DX TO L_RES
MOV AH, 4CH ;TERMINATE THE PROGRAM
INT 21H
CODE ENDS
END STAR

Write an ALP to transfer a block of 50 numbers from 20000 H to 30000H.

CODE SEGMENT
ASSUME CS : CODE
START: MOV AX,2000H ; INITIALIZE DATA SEGMENTS
MOV DS,AX
MOV AX,3000H ; INITIALIZE EXTRA SEGMENTS
MOV ES,AX
MOV SI, 0000H ;INITIALIZE MEMORY POINTER
MOV DI, 0000H
MOV CX, 0032H ; INITIALIZE COUNTER 50
UP: MOV AL,[SI] ; TRANSFER DATA FROM SOURCE TO DESTINSTION
MOV ES:[DI],AL
INC SI ;INCREMENT MEMORY PONTER
INC DI
LOOP UP ;CHECK COUNTER IF NOT ZERO THEN LOOP UP
MOV AH,4CH ;TERMINETE THE PROGRAM
INT 21H
CODE ENDS
END START

Write an ALP to multiply two 8 bit numbers using NEAR procedure

.MODEL SMALL
.DATA
NUM1 DB 04H
NUM2 DB 03H
RESULT DW ?
.CODE
MOV AX,@DATA ; INITIALIZE DATA SEGMENTS
MOV DS, AX

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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
CALL MUL_NUM ; CALLING OF MUL_NUM PROCEDURE
MOV AH,4CH ; TERMINETE THE PROGRAM
INT 21H
MUL_NUM PROC ; STRAT OF MUL_NUM PROCEDURE
MOV AL, NUM1 ;MOVE NUM1 TO AL
MUL NUM2 ;MULTIPLY AL WITH NUM2
MOV RESULT, AX ;MOVE OUTPUT FROM AX TO RESULT
RET ;RETURN TO CALLING PROGRAM
ENDP ; END OF PROCEDURE
ENDS ;END OF SEGMENT
END ;END OF PROGRAM

Write a program to find positive numbers in the array of 10 elements.

Program Comment
DATA SEGMENT
BLOCK1 DB 10H, 81H, 12H, 93H, 14H, 85H,
16H, 17H, 18H, 19H
COUNT DB 00H
DATA ENDS
ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV CX, 000A H
MOV SI, OFFSET BLOCK1
UP: MOV AL, [SI]
ROL AL, 1
JC DOWN
INC COUNT
DOWN: INC SI
LOOP UP
MOV AH, 4CH
INT 21
CODE ENDS
Program
END START Comment
DATA SEGMENT
BLOCK1 DB 10H, 81H, 12H, 93H, 14H, 85H,
16H, 17H, 18H, 19H
COUNT DB 00H
Write a program to find negative DATA ENDS
numbers in the array of 10 elements. ASSUME: DS:DATA, CS: CODE
CODE SEGMENT
START: MOV DX, DATA
MOV DS, DX
MOV CX, 000A H
MOV SI, OFFSET BLOCK1
UP: MOV AL, [SI]
ROL AL, 1
JNC DOWN
INC COUNT
DOWN: INC SI
LOOP UP
MOV AH, 4CH Page 112
INT 21
CODE ENDS
END START
 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)

Write an ALP for 8086 to find the largest number in an array.

DATA SEGMENT
ARRAY DB 05H,45H,08H,56H,78H,75H,10H,11H,20H,24H
LARGEST DB 00H
DATA ENDS
CODE SEGMENT
ASSUME CS: CODE, DS: DATA
START: MOV DX, DATA
MOV DS, DX
MOV CX,09H
MOV SI,OFFSET ARRAY
MOV AL,[SI]
UP: INC SI
CMP AL,[SI]
JNC NEXT
MOV AL,[SI]
NEXT: DEC CX
JNZ UP
MOV LARGEST,AL
MOV AX, 4C00H
INT 21H
CODE ENDS
END START

Write an ALP for 8086 to find the smallest number in an array.

DATA SEGMENT
ARRAY DB 05H,45H,08H,56H,78H,75H,10H,11H,20H,24H
SMALLEST DB 00H
DATA ENDS
CODE SEGMENT
ASSUME CS: CODE, DS: DATA
START: MOV DX, DATA
MOV DS, DX
MOV CX,09H
MOV SI,OFFSET ARRAY
MOV AL,[SI]
UP: INC SI

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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
CMP AL,[SI]
JNC NEXT
MOV AL,[SI]
NEXT: DEC CX
JNZ UP
MOV SMALLEST,AL
MOV AX, 4C00H
INT 21H
CODE ENDS
END START

Write an ALP for 8086 to find factorial of a number.

MOV AX, 05H
MOV CX, AX
Back: DEC CX
MUL CX
LOOP back ; results stored in AX
; to store the result at D000H
MOV [D000], AX
HLT

Question: - Write appropriates 8086 instructions to perform following operations

i. Initialize stack at 42000 H
Ans.:
MOV AX,,4200h
MOV SS,AX
MOV SP,0000H
ii. Rotate register BX right 4 times.
MOV CL,04H
RCR BX,CL
or
MOV CL,04H
ROR BX,CL
Question: - Write the program structure for writing program in assembly language with suitable
comment.
Ans:
Structure 1: Using SEGMENT , ASSUME and ENDS directive
MY_DATA SEGMENT
---
Program Data Declaration
[data segment of program]
----
MY_DATA ENDS
MY_CODE SEGMENT
ASSUME CS: MY_CODE ,DS:MY_DATA ;Assign names to logical segments.
START:MOV AX,MY_DATA ; initialization of data segment
MOV DS,DX
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 MICROPROCESSOR AND PROGRAMMING (C0/IF-4G: - 17431)
---
[Program codes][code segment]
----
MY_CODE ENDS
END START

(OR)
Structure 2: Using .Data and .Code
.MODEL SMALL
.STACK 100
.DATA
---
Program Data Declaration
[data segment of program]
----
.CODE
MOV AX,@DATA ; initialization of data segement
MOV DS,AX
---
[Program codes][code segment]
----
END

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