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College of Engineering Putrajaya Campus Test1 SEMESTER 1 2010/ 2011

This document is a test paper for an electronics analysis and design course consisting of 3 questions. It provides instructions for students taking the test, including that it is 1 hour long and contains 4 pages. The questions cover circuit analysis, diode circuits, and designing a circuit to maintain a load voltage. Formulas and constants relevant to the course are provided in an appendix.

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0% found this document useful (0 votes)
95 views4 pages

College of Engineering Putrajaya Campus Test1 SEMESTER 1 2010/ 2011

This document is a test paper for an electronics analysis and design course consisting of 3 questions. It provides instructions for students taking the test, including that it is 1 hour long and contains 4 pages. The questions cover circuit analysis, diode circuits, and designing a circuit to maintain a load voltage. Formulas and constants relevant to the course are provided in an appendix.

Uploaded by

zawir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 4

COLLEGE OF ENGINEERING

PUTRAJAYA CAMPUS
TEST1
SEMESTER 1 2010/ 2011

PROGRAMME : Bachelor of Electrical Power Engineering (Honours)


Bachelor of Electrical and Electronics Engineering (Honours)

SUBJECT CODE : EEEB143

SUBJECT : Electronics Analysis & Design I

DATE : 28th Sept. 2010

TIME :1 hour

INSTRUCTIONS TO CANDIDATES:

1. This paper contains THREE (3) questions in FIVE (4) pages.

2. Answer ALL.

3. Write all answers in the answer booklet provided.

4. Write answer to each question on a new page.

5. Some formulas, constant numbers and conversion factors are provided in Appendix.

THIS QUESTION PAPER CONSISTS OF 4 PRINTED PAGES INCLUDING THIS


COVER PAGE.

Page 1 of 4
EEEB143, Semester 1 2010/2011

QUESTION 1 [10 marks]


Consider the circuit in Figure 1. Let E1 = 10V, R1=5kR2=2kand E2= -5V.
Assume the cut-in voltage of the silicon diode is VV. Determine I, V1, V2 and Vo.

Figure 1

QUESTION 2 [10 marks]


Figure 2. is a diode circuit. Diode is Silicon type i.e. internal voltage is 0.7 V.
i. When the input voltage is +10 V from the input signal what is the output voltage, vo?
ii. When input voltage is -!0 V, what is out voltage, vo?
iii. What is the maximum voltage across the resistor of 1kΏ (VR)?
iv. What is the value of maximum current across the resistor of 1 kΏ , iR?
v. Sketch output voltage signal based on the input sinusoidal as shown in Figure 2.1

Figure 2

QUESTION 3 [10 marks]


Page 2 of 4
EEEB143, Semester 1 2010/2011

(a) Design the circuit of Figure 3 to maintain VL at 12 V for a load variation (IL)
from 0 to 200mA. That is, determine RZ and VZ..
(b) Determine PZmax.

Figure 3

-END OF QUESTIONS-

Page 3 of 4
EEEB143, Semester 1 2010/2011

APPENDIX
EEEB143 FORMULAS

1. ni = BT3/2 exp(-Eg/(2kT)) Small-signal transistor models:


2. n0p0 = ni2
3. Jdrift = (enn + enp)E
4. Vbi = kT ln [ (Na Nd) / ni2 )
5. iD = IS [exp(VD/VT) - 1]
6. IE = IC + IB
7. IC = IB
8.  = (1+)-1
9. VBE(on) = 0.7 V
10. r = VT/IBQ, gm=ICQ/VT ro=VA/ICQ
11. Av=Vo/Vi
12. ID = Kn [ 2 (VGS - VTN ).VDS - V 2DS ]
13. ID = Kp [ 2 (VSG + VTP ).VSD - V2SD ]
14. ID = Kn (VGS - VTN )2
15. ID = Kp (VSG + VTP )2
16. VDS(sat) = VGS - VTN
17. VSD(sat) = VSG + VTP
18. ro = [IDQ]-1
19. gm = 2Kn (VGS - VTN)
vGS 2
20. ID = IDSS [ 1 - ]
VP
21. ro = [ IDQ ]-1
2 I DSS vGS
22. gm = ( ) [1 - ]
 VP VP
23. VDS(sat) = vGS - VP
24. VSD(sat) = VP - vGS

CONSTANTS
Material Eg [eV] B [cm-3 K-3/2]
1. Silicon, Si 1.12 5.23 x 1015
2. Galium Arsenide, GaAs 1.4 2.10 x 1014
3. Germanium, Ge 0.66 1.66 x 1015

GENERAL CONSTANTS AND CONVERSION FACTORS


Constant Symbol Value
Angstrom Å 10-10 m
Boltzmann's constant k 1.38 x 1023 J/K, 8.6 x 10-5 eV/K
Electron-volt eV 1.6 x 10-19 J
Electronic charge e or q 1.6 x 10-19 C
Thermal Voltage VT kT/e or 0.026V at 300K

Page 4 of 4

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