AI880/AI880A High Integrity Analog Input Module Appendix A Specifications

AI880/AI880A High Integrity Analog Input Module

Features
• 8 channels for 0...20 mA, 4...20 mA, single ended
unipolar inputs.
• Single or redundant configuration.
• 1 group of 8 channels isolated from ground.
• 12 bit resolution.
• Loop Supervised DI function.
• Configurable alarm limit for field power outputs.
• Configurable over/under range for current inputs.
• Current limited transmitter supply per channel.
• Advanced on-board diagnostics.
• Certified for SIL3 according to IEC 61508.
• Certified for Category 4 according to EN 954-1.
• Complies with the NAMUR recommendation
NE43, and supports configurable over- and under
range limits.
• HART pass-through communication (AI880A).

Description - AI Function
The AI880/AI880A High Integrity Analog Input Module is designed for single and
redundant configuration. The module has 8 current input channels.
The input resistance is 250 ohm.
The module distributes the external transmitter supply to each channel. This adds a
simple connection to distribute the supply to 2- or 3-wire transmitters. The
transmitter power is supervised and current limited.

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All eight channels are isolated from the ModuleBus in one group. Power to the
Module is generated from the 24 V on the ModuleBus.
The AI880/AI880A complies with the NAMUR recommendation NE43, and
supports configurable over- and under range limits.
As AI880/AI880A needs external shunt sticks, the MTUs TU844 or TU845 is
required for redundant configurations and TU834 for single configurations.
AI880A has HART pass-through functionality. Only point-to-point communication
is supported.
Sensors should be for 24 V power supply if it should be powered from the module.
Shielded field cables are required for process connections.

Description - Loop Supervised DI Function

AI880/AI880A can be configured for the function Loop Supervised Digital Input.
When used as Loop Supervised, the I/O module can handle input signals with
defined levels for open circuit, logic low state, logic high state, and short circuit.
The function, Loop Supervised DI, is also used with field devices without defined
levels for field loop diagnostics, if an additional resistor network is added.
The resistor network is considered to be a part of the field device; this must be
considered when certifying a safety loop according to IEC 61511.
The resistor network should be placed close to the field device.
When using the function, Loop Supervised DI, the following parameter settings and
field loop arrangement (resistor network) should be used:
1. Interfacing to signals from mechanical contact switching devices.

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Ux
S800 I/O
AI880A

R2

CHx R1

Figure 53. Field Loop Arrangement When using the function Loop Supervised DI

Type of setting Setting Value

Parameter Limit for change false – true ch No 4.2 mA
Parameter Open circuit alarm level channel No. 1.0 mA
Resistor R1 2.7 k ohm(1)
Resistor R2 10 k ohm(1)
(1) In general, resistors must have the following rating: resistance tolerance 5% or
better, power rating 0.5W or more.

2. Interfacing to signals from 2-wire proximity switches.

In general, Loop Supervised DI supports 2-wire proximity switches with:
– Leakage current (off state) < 1.5mA.
– Voltage drop (on state) < 8V.

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Type of setting Setting Value

Parameter Limit for change false – true ch No 4.2 mA
Parameter Open circuit alarm level channel No. 1.0 mA
Resistor R1 1.5 k ohm(1) (2)
Resistor R2 10 k ohm2
(1) For field supplies (Uin) below 21.6 V, R1 must be 1.0 k ohm instead of 1.5 k ohm.
(2) In general, resistors must have the following rating: resistance tolerance 5% or better,
power rating 0.5 W or more.

Ux
S800 I/O
AI880A

R2

CHx R1

Figure 54. Field Loop Arrangement

For applications where a field loop error shall not lead to immediate trip, the
input value must be delayed with (at least) 200ms. This delay should be
implemented in the application program. The delay is needed since the input
value may change state a short time before the field loop error is detected.

Self-diagnostic functions
• Errors in External power supply and External shunt error are reported as
External channel error.
• Errors in Low Pass Filter, and Test channels are reported as channel error.

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• Errors in Analog to Digital converters, Multiplexer, Analog references, Internal

power supplies, Errors in micro controller, FPGA and Memory are reported as
Module Error.

Technical Data

Table 31. AI880/AI880A High Integrity Analog Input Module Specifications

at 25C

Feature AI880 High Integrity Analog Input Module

Number of channels 8
Type of input Unipolar single ended
Measurement range 0...20 mA
4... 20 mA
Over range +12% (0...20mA)
+15% (4...20mA)
Input impedance (at current input) 250  (with Shunt stick TY801)
Maximum field cable length 600 meters, (656 yd.)
Voltage input, maximum non- 11 V d.c.
destructive
NMRR, 50 Hz, 60 Hz >40 dB
Error <0.1%
Safety accuracy 1.9% (configurable 0.6-5%)
Resolution 12 bit
Temperature drift Max. 50 ppm/C
Update cycle time 10 ms
Current consumption 24 V 50 mA (max)
(Modulebus)
Current consumption 5 V 45 mA
(Modulebus)

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Table 31. AI880/AI880A High Integrity Analog Input Module Specifications

at 25C (Continued)

Feature AI880 High Integrity Analog Input Module

Current consumption 24 V 260 mA (max) (4 + transmitter current)
(process power supply, UPx)
Power dissipation 2.4 W
Transmitter supply (per channel): Hart Compatible
Voltage: Process power supply (Upx) - max
4.5 V
Current: 32 mA + - 10%(1)
Voltage supervision Internal voltage, field power input, field power
output per channel
Input filter rise time (0-90%) 190 ms (HW filter)
Isolation 8 inputs isolated from ground in one group
Module termination units TU834 (single)
TU844, TU845 (redundant)
MTU keying code FF (AI880), FD (AI880A)
Rated insulation voltage 50 V
Dielectric test voltage 500 V a.c.
(1) If the transmitter need more current to start up, use external power for the transmitter

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Block Diagram AI880/AI880A

FPGA R
24 V
UP W
F
P
ZP

U1 T 24 V
Mux

I1U
LP

I1UC
U8 T 24 V MCU
Mux

I8U LP #

LP Mux

I8UC LP

Figure 55. AI880/AI880A Block Diagram

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Process Connections
Shielded cables should be used for process connections (over all shield is sufficient
if a multi core cable contains sorted signal types).

Table 32. AI880/AI880A Process Connections

TU834
Process TU844
Connection TU845
Terminal
+24 V d.c. L1+
0 V d.c. (ZP) L1-
U1 B1
Ch1, Current Input B2
Ch1, Return (ZP) A1,A2
U2 B3
Ch 2, Current Input B4
Ch 2, Return (ZP) A3, A4
U3 B5
Ch 3, Current Input B6
Ch 3, Return (ZP) A5, A6
U4 B7
Ch 4, Current Input B8
Ch 4, Return (ZP) A7, A8
U5 B9
Ch 5, Current Input B10
Ch 5, Return (ZP) A9, A10
U6 B11

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Table 32. AI880/AI880A Process Connections (Continued)

TU834
Process TU844
Connection TU845
Terminal
Ch 6, Current Input B12
Ch 6, Return (ZP) A11, A12
U7 B13
Ch 7, Current Input B14
Ch 7, Return (ZP) A13, A14
U8 B15
Ch 8, Current Input B16
Ch 8, Return (ZP) A15, A16
0 V d.c. (ZP) L2-

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Figure 56 shows the process connections for the High Integrity Analog Input
Module AI880/AI880A when installed on a TU844 or TU845 redundant MTU.

Process TU844/TU845
AI880/AI880A
+24V L1+ L+
Pwr. L1+
Source 0V L1- L-
L1- Shunt
sticks U1
U1 B1
B2 I1U
4 - 20mA Ch1 I1I
A1,A2 ZP
2 - Wire U2 B3 U2
XMTRs B4 I2U
4 - 20mA Ch2 I2I
A3,A4 ZP
B5 U3 Mux.
0 - 20mA Ch3 B6 I3U
I3I
ZP A5,A6 ZP
4 - Wire
B7 U4
XMTRs 0 - 20mA Ch4 B8 I4U
I4I
ZP A7,A8 ZP
U5 B9 U5
B10 I5U
0 - 20mA Ch5 I5I
ZP A9,A10 ZP
U6 B11 U6
B12 I6U
4 - 20mA Ch6 I6I
ZP A11,A12 ZP
3 - Wire
XMTRs U7 B13 U7
0 - 20mA Ch7 B14 I7U
I7I
ZP A13,A14 ZP
U8 B15 U8
0 - 20mA Ch8 B16 I8U
I8I
ZP A15,A16 ZP
L2+
L2+
0V L2- L-
L2- EM

AI880
L+
L-
U1
I1U
I1I
ZP
---

Mux.
U8
I8U
I8I
ZP

L-
EM

Figure 56. AI880/AI880A with TU844 or TU845 Redundant MTU Process Connections

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Figure 57 shows the process connections for the High Integrity Analog Input
Module AI880/AI880A when installed on a TU844 or TU845 redundant MTU and
used as Loop Supervised DI.

Process TU844/TU845
+24V L1+ L+ AI880/AI880A
Pwr. L1+
Source 0V L1- L-
L1- Shunt
sticks U1
U1 B1
B2 I1U
0 - 20mA Ch1 I1I
A1,A2 ZP
2 - Wire U2 B3 U2
sensors B4 I2U
0 - 20mA Ch2 I2I
A3,A4 ZP
B5 U3 Mux.
0 - 20mA Ch3 B6 I3U
I3I
ZP A5,A6 ZP
4 - Wire
B7 U4
sensors 0 - 20mA Ch4 B8 I4U
I4I
ZP A7,A8 ZP
U5 B9 U5
B10 I5U
0 - 20mA Ch5 I5I
ZP A9,A10 ZP
3 - Wire
sensors U6 B11 U6
B12 I6U
0 - 20mA Ch6 I6I
ZP A11,A12 ZP
R1 B13
U7 U7
0 - 20mA Ch7 B14 I7U
R2 I7I
ZP A13,A14 ZP
U8 B15 U8
0 - 20mA Ch8 B16 I8U
I8I
ZP A15,A16 ZP
L2+
L2+
0V L2- L-
L2- EM

L+ AI880
L-
U1
I1U
I1I
ZP
---

Mux.
U8
I8U
I8I
ZP

L-
EM

Figure 57. AI880/AI880A with TU844 or TU845 Redundant MTU Process Connections

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Figure 58 shows the process connections for the High Integrity Analog Input
Module AI880/AI880A when installed on a TU834 single MTU.

Process TU834 AI880/AI880A

+24V L1+ L+
Pwr. L1+
Source 0V L1- L-
L1- Shunt
sticks U1
U1 B1
B2 I1U
4 - 20mA Ch1 I1I
A1,A2 ZP
2 - Wire U2 B3 U2
XMTRs B4 I2U
4 - 20mA Ch2 I2I
A3,A4 ZP
B5 U3 Mux.
0 - 20mA Ch3 B6 I3U
I3I
ZP A5,A6 ZP
4 - Wire
B7 U4
XMTRs 0 - 20mA Ch4 B8 I4U
I4I
ZP A7,A8 ZP
U5 B9 U5
B10 I5U
0 - 20mA Ch5 I5I
ZP A9,A10 ZP
U6 B11 U6
B12 I6U
4 - 20mA Ch6 I6I
ZP A11,A12 ZP
3 - Wire
XMTRs U7 B13 U7
0 - 20mA Ch7 B14 I7U
I7I
ZP A13,A14 ZP
U8 B15 U8
0 - 20mA Ch8 B16 I8U
I8I
ZP A15,A16 ZP
L2+
L2+
0V L2- L-
L2- EM

Figure 58. AI880/AI880A with TU834 Single MTU Process Connections

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Figure 59 shows the process connections for the High Integrity Analog Input
Module AI880/AI880A when installed on a TU834 single MTU and used as Loop
Supervised DI.

Process TU834 AI880/AI880A

+24V L1+ L+
Pwr. L1+
Source 0V L1- L-
L1- Shunt
sticks U1
U1 B1
B2 I1U
4 - 20mA Ch1 I1I
A1,A2 ZP
2 - Wire U2 B3 U2
sensors B4 I2U
4 - 20mA Ch2 I2I
A3,A4 ZP
B5 U3 Mux.
0 - 20mA Ch3 B6 I3U
I3I
ZP A5,A6 ZP
4 - Wire
B7 U4
sensors 0 - 20mA Ch4 B8 I4U
I4I
ZP A7,A8 ZP
U5 B9 U5
B10 I5U
0 - 20mA Ch5 I5I
ZP A9,A10 ZP
3 - Wire
sensors U6 B11 U6
B12 I6U
4 - 20mA Ch6 I6I
ZP A11,A12 ZP
R1
U7 B13 U7
0 - 20mA Ch7 B14 I7U
R2 I7I
ZP A13,A14 ZP
U8 B15 U8
0 - 20mA Ch8 B16 I8U
I8I
ZP A15,A16 ZP
L2+
L2+
0V L2- L-
L2- EM

Figure 59. AI880/AI880A with TU834 Single MTU Process Connections

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