LETTER IEICE Electronics Express, Vol.14, No.
22, 1–12
A CMOS dual-feedback
reconfigurable low noise
amplifier with improved
stability and reduced noise
Minghua Wang1,2, Xiaosong Wang1, Yu Liu1a),
Muhamamad M Sarfraz1,2, Yanbin Xiao1, and Haiying Zhang1
1
Institute of Microelectronics of Chinese Academy of Sciences,
3 Beitucheng West Road, Chaoyang District, Beijing, China
2
University of Chinese Academy of Sciences,
19A Yuquan Road, Shijingshan District, Beijing, China
a) liuyu5@ime.ac.cn
Abstract: This paper presents a multiband reconfigurable low noise am-
plifier (LNA) based on dual-feedback common-gate (CG) configuration. The
input impedance of the LNA is tuned synchronously with output load due to
the reflection of load impedance to input by the proposed source-follower
positive feedback method. This method also improves the stability of the
LNA, which is an issue in conventional positive feedback methods. In
addition, both the source-follower positive feedback and the negative feed-
back by capacitor cross-coupling help to reduce noise figure. Fabricated in
TSMC 0.18 µm CMOS process, measurement results show the LNA is
reconfigurable from 1.833 GHz to 2.47 GHz, with S11 automatically cen-
tered with S21. It achieves a power gain from 15 to 17.4 dB, 1.62 dB
minimum NF, and −4.4 dBm maximum IIP3. 10.5 mA current is consumed
from 1.8 V supply.
Keywords: LNA, reconfigurable, multiband, feedback, noise reduction
Classification: Integrated circuits
References
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© IEICE 2017 (DOI: 10.1109/JSSC.2006.889356).
DOI: 10.1587/elex.14.20170985
Received September 25, 2017 [5] R.-F. Ye, et al.: “Two CMOS dual-feedback common-gate low-noise amplifiers
Accepted October 20, 2017
Publicized November 6, 2017
Copyedited November 25, 2017
1
IEICE Electronics Express, Vol.14, No.22, 1–12
with wideband input and noise matching,” IEEE Trans. Microw. Theory Techn.
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4977386).
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[12] M. Parvizi, et al.: “An ultra-low-power wideband inductorless CMOS LNA
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(2016) 1843 (DOI: 10.1109/TMTT.2016.2562003).
[13] N. Li, et al.: “A CMOS 3–12 GHz ultrawideband low noise amplifier by dual-
resonance network,” IEEE Microw. Wireless Compon. Lett. 27 (2017) 383
(DOI: 10.1109/LMWC.2017.2679203).
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1 Introduction
With increased amount of frequency bands integrated in smart phones, the trans-
ceivers face a big challenge in terms of complexity and cost. In existing commercial
applications, almost every frequency band has its own dedicated RF path for the
best performance. With evolution from 4G to 5G, this will significantly increase the
RF front-end complexity.
Cognitive or reconfigurable radio [1, 2, 3] is a promising solution with a high
level of hardware sharing. Within this architecture, a wideband low noise amplifier
(LNA) [4, 5] can be utilized to cover all needed frequency bands. This method
benefits from the lowest complexity and concurrent reception of more than one
signal band. But it suffers from serious out-of-band interferences. A reconfigurable
one [1, 2, 3, 6, 7] with frequency selectivity in both input and output is able to
© IEICE 2017
DOI: 10.1587/elex.14.20170985 receive only the desired frequency band, thus improve the immunity of the receiver
Received September 25, 2017
Accepted October 20, 2017 from out-of-band interferers.
Publicized November 6, 2017
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IEICE Electronics Express, Vol.14, No.22, 1–12
In the design of reconfigurable LNAs, the inductively degenerated common
source (CS) configuration is difficult to tune its narrowband input matching net-
work, and the added tunable components induce extra noise [6, 7]. Moreover,
keeping both input matching and output tank centered on the desired frequency in
all conditions over PVT is challenging. Common gate (CG) topology has been
investigated as reconfigurable LNA in [1, 2, 3]. In [2], an inverse-amplifier based
positive feedback path is added between output and input of CG-LNA to achieve a
tunable narrow-band input matching, but this method has unstability issues. In
addition, to make performance of CG-topology based reconfigurable LNA com-
parable to that of multiple parallel narrow-band CS-LNA, the noise figure needs to
be reduced. Positive-negative feedback was introduced in [8] to improve the gain
and noise performance of CG-LNA, but the design in that paper has no frequency
selectivity.
To address the issues mentioned above, this paper presents a multiband
reconfigurable LNA based on dual-feedback CG configuration. Besides easy
configurability, the LNA has improved stability and reduced noise. The outline
of the paper is as follows. In section 2, the analysis and design of the presented
LNA is described, including input impedance, gain, noise, stability, linearity and
configurability. In section 3, detailed characterization results of the prototype chip
are shown, followed by a conclusion in section 4.
2 The proposed dual-feedback reconfigurable LNA
CG-LNA features superior bandwidth, linearity, stability, but suffers from low gain
and poor noise performance compared to the CS-LNA. Although it is generally
used as a wideband LNA, it can also be used to develop a narrowband one with
wideband configurability. The proposed LNA is shown in Fig. 1, consisting of
cross-coupled capacitors ðC1 ; C2 Þ and NMOS transistors ðM5 ; M6 Þ in a differential
© IEICE 2017
DOI: 10.1587/elex.14.20170985 Fig. 1. Complete circuit of the proposed dual-feedback reconfigurable
Received September 25, 2017
Accepted October 20, 2017 LNA.
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IEICE Electronics Express, Vol.14, No.22, 1–12
CG configuration. An off-chip balun transforms the input single-ended signal into
differential signals and provides DC ground for the LNA. The differential signals
then flow to the sources of input transistors ðM1 ; M2 Þ, and are also cross-coupled
to the gates of the opposite input transistors through capacitors, which results in a
shunt-series negative feedback. The outputs of the LNA are coupled to the sources
of the input transistors through M5 and M6, creating a shunt-shunt positive feedback
loop. A tunable LC tank with binary weighted capacitor array acts as the load. For
measurement purpose, a differential source-follower buffer is designed on chip,
with broadband output matching.
Before exploring the detailed characteristics of the presented LNA, it is helpful
to review the properties of CG-LNA and its various feedback configurations, as
shown in Fig. 2. Here ANEG is defined as the voltage gain of the gate voltage over
the source voltage of the CG transistor, and APOS is defined as the current gain of
the current from the positive feedback branch over the current going into the source
of the CG transistor. In conventional CG-LNA in Fig. 2(a), the transconductance
(gm ) is limited to 1=RS by the input matching condition, resulting in a poor noise
figure. A capacitor-cross-coupled (CCC) negative feedback configuration [9],
shown in Fig. 2(b), uses gm boosting which reduces noise figure and power
consumption by a factor of two. However, due to the passive gm boosting, the
transconductance still has limited design range. In contrast, positive feedback
topology [2] in Fig. 2(c), alleviates the restriction of low gm . Since the input
impedance is 1=½ð1 APOS Þgm and APOS can be designed from 0 to 1, thus gm can
be arbitrarily set for input impedance matching. Positive-negative feedback, in
Fig. 2(d), was introduced in [8] to further improve the gain and noise performance
of CG-LNA.
The feedback configurations decouple the noise figure from the input matching,
resulting in a lower noise figure without impacting input matching. Moreover, the
positive feedback correlates the input impedance with output load.
Fig. 2. Conventional CG-LNA and its different feedback configura-
tions.
© IEICE 2017
2.1 Input matching and gain
DOI: 10.1587/elex.14.20170985 As for the presented reconfigurable CG-LNA in Fig. 1, the single ended model is
Received September 25, 2017
Accepted October 20, 2017
Publicized November 6, 2017
shown in Fig. 3(a). The input impedance is derived as
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IEICE Electronics Express, Vol.14, No.22, 1–12
Fig. 3. Single ended model of dual-feedback CG-LNA: (a) source-
follower positive feedback of this work and (b) inverse-
amplifier based positive feedback in [8].
1 gm2
Zin ð!Þ ¼ þ ZL ð!Þ; ð1Þ
2gm1 þ gm2 2gm1 þ gm2
where gm1 and gm2 are the transconductances of M1 and M2 in Fig. 3(a), respec-
tively and ZL ð!Þ is the LNA load impedance. The input impedance is a function of
ZL ð!Þ, and it is increased by the positive feedback. In (1), if gm2 is 0, meaning
no positive feedback, the input impedance is 1=ð2gm1 Þ, which is the same as that of
CCC-LNA [9]. With the load being a tunable LC tank as shown in Fig. 1, the input
impedance also becomes tunable, due to the partial reflection of the load impedance
to the input, provided by the source-flower positive feedback. At the load resonant
frequency, the input impedance is purely resistive, and can be matched to the source
resistance. Under input matching condition, the transconductance of input transistor
is
1 þ gm2 ½ZL ð!0 Þ RS 1 þ gm2 ðRL RS Þ
gm1 ¼ ¼ ; ð2Þ
2RS 2RS
where RL is the tank parallel resistance at resonant frequency !0 , and RS is source
impedance. By properly selecting gm2 and RL values, the transconductance of the
input transistor is no longer restricted as in conventional CG-LNA, and can be any
arbitrary value. In input matching condition, the effective transconductance gain
(defined as Gm ¼ iout =vs ) of the LNA is
1
Gm ¼ : ð3Þ
2RS
2.2 Noise figure
Referring to Fig. 3(a), the noise figure of the LNA is computed. For simplicity, only
© IEICE 2017
the three main noise sources, i.e., the thermal noise of the two transistors (M1 and
DOI: 10.1587/elex.14.20170985
Received September 25, 2017
M2) and the noise of the load are considered. At the resonant frequency, the noise
Accepted October 20, 2017
Publicized November 6, 2017
factors contributed from M1, M2 and the load, are expressed as follows:
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IEICE Electronics Express, Vol.14, No.22, 1–12
2
1
FM1 ¼ gm1 RS ; ð4Þ
ð2gm1 þ gm2 ÞRS
2
1
FM2 ¼ gm2 RS ; ð5Þ
ð2gm1 þ gm2 ÞRS
2
1 þ gm2 RL RS
FLoad ¼ 1 þ ; ð6Þ
ð2gm1 þ gm2 ÞRS RL
where γ is the MOS transistor thermal noise coefficient, α is defined as the ratio of
gm to the zero-bias drain conductance gd0 . The total noise factor is expressed as
2 2
1 1 þ gm2 RL RS
F ¼1þ ðgm1 þ gm2 ÞRS þ 1 þ : ð7Þ
ð2gm1 þ gm2 ÞRS ð2gm1 þ gm2 ÞRS RL
Under input matching condition, the noise factor is
gm1 þ gm2 4RS
Fmatch ¼ 1 þ 2
þ : ð8Þ
ð2gm1 þ gm2 Þ RS RL
Fig. 4 shows the plots of the noise figure in equation (8) and input transistor’s
transconductance (gm1 ) in equation (2) vs. feedback transistor’s transconductance
(gm2 ). Here, ¼ 1, ¼ 2=3, RS ¼ 50 Ω, and RL ¼ 1000 Ω (output impedance
measured from simulation of the presented LNA) are used. With gm2 increases,
the noise figure decreases significantly and a sub-1 dB NF can be obtained which is
comparable to the NF of an inductor-degenerated CS-LNA. gm1 increases linearly
with gm2 , meaning the power consumption also increases. Therefore, there is a
tradeoff between NF and power consumption. In this design, gm2 ¼ 3 mS is
selected.
Fig. 4. Noise figure and input transistor’s transconductance (gm1 ) vs.
feedback transistor’s transconductance (gm2 ).
2.3 Stability
Even though the CG-type LNA itself is very stable, stability needs to be carefully
considered since positive feedback exists in the presented topology. As shown in
© IEICE 2017
DOI: 10.1587/elex.14.20170985 equation (1), the input impedance is always larger than zero, no matter how
Received September 25, 2017
Accepted October 20, 2017 transconductance of positive-feedback transistor changes. It means that the LNA
Publicized November 6, 2017
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IEICE Electronics Express, Vol.14, No.22, 1–12
is stable with the proposed source-flower positive feedback topology. As for
the conventional inverse-amplifier based positive feedback LNA [8], shown in
Fig. 3(b), the input impedance is
1
Zin ¼ : ð9Þ
2gm1 ð1 gm2 RL Þ
Fig. 5 shows the input impedance vs. the transconductance ratio (gm2 =gm1 ) of the
positive feedback transistor over input transistor. With the gm2 =gm1 increases,
meaning more positive feedback, the input impedance increases monotonously
and always larger than zero in the source-follower positive feedback LNA.
However, in inverse-amplifier based positive feedback LNA, the input impedance
becomes smaller than zero, when gm2 =gm1 above some value, resulting in un-
stability. So, the proposed positive feedback method shows improved stability
compared to the conventional inverse-amplifier based positive feedback.
Fig. 5. Input impedance vs. the transconductance ratio of positive
feedback transistor over input transistor.
2.4 Linearity
The LNA distortion mainly comes from two elements: the input transistor M1 and
the additional positive-feedback path provided by M2. Because of a large gate-
source voltage swing across M2, the transistor M2 needs to be properly biased.
Simulation is done to investigate the effect of overdrive voltage of M2 on LNA
IIP3, as show in Fig. 6.
2.5 Reconfigurability
As mentioned in 2.1, the input impedance is a function of ZL ð!Þ, thus the input
matching of the LNA can be reconfigured for each RF band by simply changing
the resonant frequency of the load network. A 4-bit binary-weighted switched MIM
capacitor array as shown in Fig. 1 is used as tunable capacitor in LC tank for load
© IEICE 2017 tuning. To reduce loss of tunable capacitor, a large resistor is added at the gate of
DOI: 10.1587/elex.14.20170985
Received September 25, 2017 the MOS switch in this design to isolate the signal leakage to the gate bias path. The
Accepted October 20, 2017
Publicized November 6, 2017
Copyedited November 25, 2017
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IEICE Electronics Express, Vol.14, No.22, 1–12
Fig. 6. Simulated IIP3 vs. overdrive voltage of M2.
Fig. 7. Schematic-level simulated reconfigurability of the LNA.
resistors at the source, drain, and body of the NMOS switch [15] are not used in this
work. When output voltage swing of LNA is large and the NMOS switch is off, the
body-source or body-drain diode will be forward biased. It will reduce the IIP3 of
the LNA. A frequency selective input matching is obtained as shown in Fig. 7. The
proposed LNA has S11 automatically centered with S21, which is in synch with the
LC tank resonant frequency. The minimum noise figure of the circuit also tracks the
© IEICE 2017
DOI: 10.1587/elex.14.20170985 load impedance change accordingly.
Received September 25, 2017
Accepted October 20, 2017
Publicized November 6, 2017
Copyedited November 25, 2017
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IEICE Electronics Express, Vol.14, No.22, 1–12
Table I gives a summary of main characteristics of the proposed LNA and
comparison with other feedback LNAs.
Table I. Comparison of characteristics in feedback CG-LNAs
CCC Inverse-amplifier Inverse-amplifier
Negative Positive Positive-Negative This work
Feedback [9] Feedback [2] Feedback [8]
1 1 1 1 þ gm2 RL
Zin
gm ð1 þ Aneg Þ gm ð1 Apos Þ gm ð1 þ Aneg Þð1 Apos Þ 2gm1 þ gm2
gm @
1 2 1 1 þ gm2 ðRL RS Þ
input
2RS RS RS 2RS
matching
Av@
RL RL RL RL
input
2RS RS RS 2RS
matching
gm1 þ gm2
NF@ 4RS 1 þ þ gmp Rs 1þ þ gmp Rs 1þ
1þ þ 2 4 ð2gm1 þ gm2 Þ2 RS
input 2 RL
2:25RS 2:25RS 4RS
matching þ þ þ
RL RL RL
With
unstability no yes yes no
issue?
Aneg ¼ 1, Apos ¼ 0:5 are assumed.
3 Experiment results
The LNA prototype is fabricated in TSMC 0.18 µm CMOS with ESD protections
on all pins and assembled in chip-on-board with external baluns for testing. The
chip dimensions of the LNA are 0:68 0:9 mm2 including the pads and buffers.
The circuit consumes 10.5 mA from a 1.8 V supply. S-parameters are measured in
different configuration states. Four control bits are used to control the capacitor
array of LNA’s LC tank to set LNA to work in different center frequencies. Fig. 8
shows S-parameters in different configurability states, with the center frequency
tunable from 1.833 GHz to 2.47 GHz. A narrow-band input matching is achieved
and the S11 is automatically centered with S21. The peak gain in all states varies
from 15 dB to 17.4 dB, while the S11 at the center frequencies of all states is
smaller than −10 dB. The S22 and S12 are smaller than −10 dB and −43 dB,
respectively for all configuration states in the tuned bandwidth. Noise figures in all
configurability states are measured and the 0.8 dB insertion loss of the input balun
is de-embedded. Here, for clear display, only 7 states are shown in Fig. 9. The
minimum noise figures in different states range from 1.62 to 2.05 dB. Fig. 10 shows
the IIP3 ranges from −6.7 to −4.4 dBm for all states. Chip micrograph is shown in
Fig. 11. Finally, the measured results of this work are summarized and compared
with previously published works in Table II.
© IEICE 2017
DOI: 10.1587/elex.14.20170985
Received September 25, 2017
Accepted October 20, 2017
Publicized November 6, 2017
Copyedited November 25, 2017
9
IEICE Electronics Express, Vol.14, No.22, 1–12
Fig. 8. Measured S-parameters in different configurability states.
© IEICE 2017
DOI: 10.1587/elex.14.20170985
Received September 25, 2017
Accepted October 20, 2017
Publicized November 6, 2017
Copyedited November 25, 2017
10
IEICE Electronics Express, Vol.14, No.22, 1–12
Fig. 9. Measured noise figures in 7 configurability states.
Fig. 10. Measured IIP3 at different center frequencies.
© IEICE 2017
DOI: 10.1587/elex.14.20170985
Received September 25, 2017
Accepted October 20, 2017 Fig. 11. Chip micrograph.
Publicized November 6, 2017
Copyedited November 25, 2017
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IEICE Electronics Express, Vol.14, No.22, 1–12
Table II. Performance summary and comparison
CMOS Freq. Gain NFmin IIP3 Power VDD Area
Ref. FOM
Tech. (GHz) (dB) (dB) (dBm) (mW) (V) (mm2)
JSSC
0.18 µm 1.2–11.9 9.7 4.5–5.1 −6.2 20 1.8 0.22 0.59
’07 [4]
TMTT
0.18 µm 1–8 13.5–16.5 1.9–2.6 2{3 10.8 1.8 3.5 1.06
’13 [5]
TMTT
0.13 µm 1.9–2.4 10–14 3.2–3.7 −6.7 17 1.2 0.03 0.083#
’09 [6]
TMTT
0.13 µm 2.8–4.6 14.7–16.4 1.9–4.7 −4–−2 6.4 1.2 2.1 0.73
’13 [7]
ISSCC
0.18 µm 0.3–0.92 21 2 −3.2 3.6 1.8 1.58 0.33
’09 [8]
TMTT
0.18 µm 1.05–3.05 16.9 2.57 −0.7 12.6 1.8 1.17 0.073#
’10 [10]
MWCL
0.18 µm 0∼1.4 16.4 3 −13.3 12.8 1.8 0.03 0.038
’14 [11]
TMTT
0.13 µm 0.1–2.2 12.3 4.9 −9.5 0.4 1 1.16 0.0052
’16 [12]
MWCL
0.13 µm 3–12 13.5 4 −7 8.5 1.2 0.66 0.86
’17 [13]
TCAS
0.13 µm 0.1–2.1 21.2 2 12.4 7.059 1.3 96.6 0.007#
’17 [14]
This
0.18 µm 1.833–2.47 15–17.4 1.63–2.02 −6.7–−4.4 18.9 1.8 0.15 0.612
work
Voltage gain Reconfigurable # Active area size
Gain ½abs IIP3 ½mW BW ½GHz
FOM ¼ (F: noise factor, PD : power consumption)
ðF 1Þ PD ½mW
4 Conclusions
This paper has presented a multiband reconfigurable LNA based on dual-feedback
CG configuration. With the proposed source-follower positive feedback method,
input impedance can be tuned synchronously with output load thanks to the
reflection of load impedance to input. This method has the benefit of improved
stability, which is an issue in conventional inverse-amplifier based positive feed-
back method. In addition, by the help of both the source-follower positive feedback
and the negative feedback of capacitor cross-coupling, the fixed relationship
between input impedance and transconductance in conventional CG-LNA is
decoupled, resulting in a reduced noise figure. Fabricated in TSMC 0.18 µm CMOS
process, measurement results show the LNA is reconfigurable from 1.833 GHz to
2.47 GHz, with S11 automatically centered with S21. The peak gain in all config-
urability states ranges from 15 to 17.4 dB. 1.62 dB minimum NF is achieved which
verifies the benefits of the dual-feedback method. Maximum IIP3 is −4.4 dBm.
10.5 mA current is consumed from 1.8 V supply. In summary, the proposed LNA
has achieved easy configurability, improved stability and shows superior noise
performance compared to the published works.
Acknowledgments
© IEICE 2017
DOI: 10.1587/elex.14.20170985 This work was supported by National Natural Science Foundation of China under
Received September 25, 2017
Accepted October 20, 2017 Grants 61574165.
Publicized November 6, 2017
Copyedited November 25, 2017
12