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Dual Transconductance Amplifier Guide

This document describes a dual operational transconductance amplifier chip. It consists of two independent current-controlled transconductance amplifiers that share common power supplies. Each amplifier has differential inputs and a push-pull output. Linearizing diodes are included at the inputs to reduce distortion and allow higher input levels, providing a 10dB improvement in signal-to-noise ratio. Controlled impedance buffers are also included to complement the dynamic range of the amplifiers. Electrical characteristics such as input offset voltage, transconductance, output current and voltage, and other parameters are provided.

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0% found this document useful (0 votes)
560 views6 pages

Dual Transconductance Amplifier Guide

This document describes a dual operational transconductance amplifier chip. It consists of two independent current-controlled transconductance amplifiers that share common power supplies. Each amplifier has differential inputs and a push-pull output. Linearizing diodes are included at the inputs to reduce distortion and allow higher input levels, providing a 10dB improvement in signal-to-noise ratio. Controlled impedance buffers are also included to complement the dynamic range of the amplifiers. Electrical characteristics such as input offset voltage, transconductance, output current and voltage, and other parameters are provided.

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© © All Rights Reserved
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NJM13600/13700

DUAL OPERATIONAL TRANSCONDUCTANCE AMPLIFIER

■ GENERAL DESCRIPTION ■ PACKAGE OUTLINE


The NJM13600/13700 consist of two current controlled trans
conductance amplifiers each with differential inputs and a push
pull output. The two amplifiers share common supplies but
otherwise operate independently. Linearizing diodes are
provided at the inputs to reduce distortion and allow higher input
levels. The result is a 10 dB signal-to-noise improvement
referenced to 0.5 percent THD.Controlled impedance buffers NJM13600D NJM13600M
are provided which are especially designed to complement the NJM13700D NJM13700M

dynamic range of the amplifiers.

■ FEATURES
● Package Outline DIP16,DMP16
● Bipolar Technology

■ PIN CONFIGURATION

PIN FUNCTION
1. AMP BIAS INPUT A 9. BUFFER OUTPUT B
2. DIODE BIAS A 10. BUFFER INPUT B
+
3. +INPUT 11. V
4. –INPUT 12. OUTPUT B
5. OUTPUT A 13. -INPUT B
-
6. V 14. +INPUT B
7. BUFFER INPUT A 15. DIODE BIAS B
8. BUFFER OUTPUT A 16. AMP BIAS INPUT B

NJM13600D,NJM13600M
NJM13700D,NJM13700M

■ EQUIVALENT CIRCUIT

Ver.2006-04-06 -1-
NJM13600/13700
■ ABSOLUTE MAXIMUM RATINGS
( Ta=25˚C )
PARAMETER SYMBOL RATINGS UNIT
+ -
Supply Voltage V /V 36 or ±18 V
Differential Input Voltage VID ±5 V
Diode Bias Current ID 2 mA
Amp Bias Current IABC 2 mA
Buffer Output Current IO 20 mA
( DIP16 ) 570
Power Dissipation PD mW
( DMP16 ) 700 (note)
+ -
DC Input Voltage VIN V ~V V
Operating Temperature Range Topr -40~+85 ˚C
Storage Temperature Range Tstg -40~+125 ˚C

( note ) At on a ceramic PCB ( 10x20x0.635 mm )

■ ELECTRICAL CHARACTERISTICS
( V+/V-=±15V,Ta=25˚C,IABC=500µA )
13600 13700
PARAMETER SYMBOL TEST CONDITION UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
Input Offset Voltage (V O S ) VIO - 0.4 5 - 0.4 4 mV
Input Offset Voltage I ABC =5µA - 0.3 5 - 0.3 4 mV
V O S Including Diodes Diode Bias Current ,I D =500µA - 0.5 5 - 0.5 5 mV
Input Offset Change 5µA ≤I ABC ≤500µA - 0.1 - - 0.1 3 mV
Input Bias Current IB - 0.4 5 - 0.4 5 µA
Input Bias Current (-20~+75˚C) - 1 8 - 1 8 µA
Forward Transconductance gm 6700 9600 13000 6700 9600 13000 µS
(-20~+75˚C) 5400 - - 5400 - - µS
gm Tracking R L =0,I ABC =5µA - 0.3 - - 0.3 - dB
Peak Output Current IOP R L =0,I ABC =5µA - 5 - - 0 - µA
Peak Output Current R L =0,I ABC =500µA 350 500 650 350 500 650 µA
Peak Output Current R L =0 (-20~+75˚C) 300 - - 300 - - µA
Peak Output Voltage Positive VOP R L =∞,5µA ≤I ABC ≤500µA +12 +14.2 - +12
+14.
-
V
2
Peak Output Voltage Negative R L =∞,5µA ≤I ABC ≤500µA -12 -14.4 - -12 -14.4 - V
Operating Current I CC I ABC =500µA, two circuit - 2.6 - - 2.6 - mA
+
V O S Sensitivity Positive SVR ∆V O S /∆V 76.5 94 - 76.5 94 - dB
-
V O S Sensitivity Negative ∆V O S /∆V 76.5 94 - 76.5 94 - dB
Input Offset Current IIO - 0.1 0.6 - 0.1 0.6 µA
CMRR CMR 80 110 - 80 110 - dB
Common Mode Range VICM ± V
± 12 ± 13.5 - ± 12 -
13.5
Cross Talk CT 20Hz<f<20kHz ( note2 ) - -100 - - -100 - dB
Differential Input Current IID I ABC =0,Input=±4V - 0.02 100 - 0.02 100 nA
Leakage Current I L EAK I ABC =0 (Refer to Test Circuit) - 0.2 100 - 0.2 100 nA
Input Resistance RIN 10 26 - 10 26 - kΩ
Open Loop Bandwidth - 2 - - 2 - MHz
Slew Rate SR - 50 - - 50 - V/µs
Buffer Input Current ( note2 ) - 0.4 5 - 0.4 5 µA
Peak Buffer Output Voltage ( note2 ) 10 - - 10 - - V

( note1 ) Open unless otherwise specified. The inputs to the buffers are grounded and outputs are open.
( note2 ) ROUT=5kΩ connected from the buffer output to V- and the input of buffer is connected to the transconductance amplifier output.
I AB C =500µA

-2- Ver.2006-04-06
NJM13600/13700
■ TEST CIRCUIT

Differential Input Current Leakage Current

■ TYPICAL APPLICATIONS

Ver.2006-04-06 -3-
NJM13600/13700
■ TYPICAL CHARACTERISTICS

-4- Ver.2006-04-06
NJM13600/13700
■ TYPICAL CHARACTERISTICS

Ver.2006-04-06 -5-
NJM13600/13700
■ TYPICAL CHARACTERISTICS

[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.

-6- Ver.2006-04-06

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