Computer Programming TA C162
Topics to discuss…
Data Movement Instructions
• PC Relative Mode
• Indirect mode
• Base + Offset Mode Next Class
• Immediate Mode
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Computer Programming TA C162
Data Movement Instructions
Moves information between
• General Purpose Registers (GPR) & Memory
• General Purpose Registers (GPR) & IO Devices
Load Moving information from memory to registers
Store Moving information from registers to memory
Load and Store
• Do not affect the information in the source location
• Overwrite the contents in the destination
7 data movement instructions with LC 3
• LD, LDR, LDI, LEA, ST, STR, STI
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Computer Programming TA C162
Format of Load / Store Instructions
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Opcode DR / SR Address Generation Bits
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Computer Programming TA C162
Format of Load / Store Instructions
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Opcode DR / SR Address Generation Bits
IR[8:0]
Used to generate 16 bit address in the memory
Four ways to interpret these 9 bits, collectively
called as addressing modes.
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Computer Programming TA C162
PC Relative Mode
Want to specify address directly in the instruction
• But an address is 16 bits, and so is an instruction!
• After subtracting 4 bits for opcode
and 3 bits for register, we have 9 bits available for address.
Solution:
• Use the 9 bits as a signed offset from the current PC.
9 bits
− 256 ≤ offset ≤ +255
Can form any address X, such that PC − 256 ≤ X ≤ PC +255
Remember that PC is incremented as part of the FETCH phase;
• Hence, the incremented PC is used in calculating the address
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Computer Programming TA C162
PC Relative Mode (Load LD Instruction)
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Computer Programming TA C162
What does the following instruction do ?
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1
Destination
Opcode PC Offset (9 bits)
Register
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Computer Programming TA C162
What does the following instruction do ?
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1
Destination
Opcode LD R6 PC Offset (9 bits) x1AF
Register
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Computer Programming TA C162
What does the following instruction do ?
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1
Destination
Opcode LD R6 PC Offset (9 bits) x1AF
Register
Assume this LD instruction is in the location x2345. While this instruction
is in execution, PC will have x2346.
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Computer Programming TA C162
What does the following instruction do ?
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1
Destination
Opcode LD R6 PC Offset (9 bits) x1AF
Register
Assume this LD instruction is in the location x2345. While this instruction
is in execution, PC will have x2346.
Sign Extended offset is xFFAF
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Computer Programming TA C162
What does the following instruction do ?
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1
Destination
Opcode LD R6 PC Offset (9 bits) x1AF
Register
Assume this LD instruction is in the location x2345. While this instruction
is in execution, PC will have x2346.
Sign Extended offset is xFFAF
The address for load instruction is now xFFAF + x 2345
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Computer Programming TA C162
What does the following instruction do ?
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1
Destination
Opcode LD R6 PC Offset (9 bits) x1AF
Register
Assume this LD instruction is in the location x2345. While this instruction
is in execution, PC will have x2346.
Sign Extended offset is xFFAF
The address for load instruction is now xFFAF + x 2345
The content of memory location xFFAF + x 2346 will be loaded into R6
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Computer Programming TA C162
What does the following instruction do ?
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1
Destination
Opcode LD R6 PC Offset (9 bits) x1AF
Register
Assume this LD instruction is in the location x2345. While this instruction
is in execution, PC will have x2346.
Sign Extended offset is xFFAF
The address for load instruction is now xFFAF + x 2345
The content of memory location xFFAF + x 2346 will be loaded into R6
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What does this quantity refers in decimal
Computer Programming TA C162
ST (PC-Relative)
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Computer Programming TA C162
PC Relative Mode (Store ST Instruction)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 1
Source
Opcode PC Offset (9 bits)
Register
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Computer Programming TA C162
What does the following instruction do?
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 1 1 1 0 1 1 0 1 0 1 1 1 1
Source
Opcode PC Offset (9 bits)
Register
Assume this ST instruction is in the location x2345. While this instruction
is in execution, PC will have x2346.
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Computer Programming TA C162
Adding Two Numbers
X3000 LD R0, #5
X3001 LD R1, #5
X3002 ADD R2, R1, R0
X3003 ST R2, #4
X3004
X3005
X3006 0000000000000100
X3007 0000000000000101
X3008 0000000000001001 (Result)
x3009
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