Basic of Device

Fabrication

Introduction
An understanding of device fabrication is essential in designing good
custom VLSIs (very-large-scale integrated circuit) or applicationspecific ICs (ASICs). It is also very helpful when selecting
commercially available ICs to implement a system design.
This section will consider only silicon-based technologies. Although
(GaAs) is also used to implement VLSI chips, silicon (Si) is by far the
most popular material, featuring a wide range of cost-performance
trade-offs. Recent development in SiGe and strained-silicon
technologies will further strengthen the position of Si-based
fabrication processes in the microelectronics industry in the future.

Introduction (cont.)
Silicon is an abundant element, which occurs naturally in the form
of sand.
Silicon exhibits suitable physical properties for fabricating active
devices with good electrical characteristics.
Moreover, it has the ability to form on it a stable, controllable
oxide layer (silicon dioxide SiO2) that has excellent insulating
properties, which is not matched by any other semiconductor

Basic steps in the device fabrication process:

1 - Purification
Silica
Reduced in
presence of C

Impure Silicon
Chlorinated

SiCl4 (liquid)
Distilled

Ultra pure SiCl4

Heating in hydrogen
atmosphere

Ultra pure polycrystalline Si

2 - Crystal growth
The aim of this process is to produce a single crystal ingot with as
large a diameter as possible and with a few defects as possible.
This single crystal ingot will then be sliced up into wafers.
The wafer is a round solid silicon disc that will have all of the
processing performed on it.
One common method for growing a single crystal ingot of silicon is
the Czochralski method.
In this method, pieces of the polysilicon rod are first melted in a
fused-silica crucible, and held at a temperature just above 1400C.
Then a high-quality seed crystal is dipped into a crucible.
A portion of the seed crystal is dissolved in the molten silicon to
remove the strained outer portions and to expose fresh crystal
surfaces.

2 - Crystal growth (cont.)

2 - Crystal growth (cont.)

The seed is then slowly raised (pulled) from the melt. As it is
raised, it cools, and material from the melt solidifies on the
seed, forming a larger crystal.
The silicon ingot take the form of a steel gray solid cylinder 20
to 30 cm in diameter and can be 1 to 2 m length.

2 - Crystal growth (cont.)

3 - Wafer Production
Once the single-crystal ingot is grown to a precise diameter, it
is sliced with a diamond saw into thin, circular wafers that are
400 to 600 m thick.
The wafers are chemically etched to remove sawing damage
and then polished with successively finer polishing grits and
chemical etchants until a defect-free, mirror-like surface is
obtained. The wafers are then ready for device fabrication.
Before slicing, index marks are placed on the wafer to facilitate
the orientation of processed circuits along specific crystal
directions.

3 - Wafer Production (cont.)

4 - Oxidation Processor
It can be defined as the process by which a layer of SiO2 is
formed on the surface of Si
Application of oxide layer in IC technology:
1- Protect the Si surface of metal against corrosion
2- Serve as a diffusion mask.
3- Used as a gate insulator in the MOSFET.
4- Isolate one device from another.
5- Isolate multiple levels of device interconnection in IC circuits.

4 - Oxidation Processor (cont.)

To form a thermal oxide, the wafer is placed inside a quartz
tube that is set within the cylindrical opening of a resistanceheated furnace. The wafer surface is usually perpendicular to
the main gas flow.
Temperatures in the range of 850 to 1100C are typical, the
reaction proceeding more rapidly at higher temperatures.

4 - Oxidation Processor (cont.)

There are two oxidation type:
1- dry oxidation.
Si + O2 SiO2
Advantage:
Oxide layers are very uniform.
Relatively few defects exist at the oxide-silicon interface (These
defects interfere with the proper operation of semiconductor
devices)
It has especially low surface state charges and thus make ideal
dielectrics for MOS transistors.
Disadvantage:
Dry oxide grows very slowly.

4 - Oxidation Processor (cont.)

2- wet oxidation.
Si + 2H2O

SiO2 + 2H2

Advantage:
Wet oxide grows fast.
Useful to grow a thick layer of field oxide
Disadvantage:
Hydrogen atoms liberated by the decomposition of the water
molecules produce imperfections that may degrade the oxide
quality.

5 - Lithography
It can be defined as the technique that is used to define the shape of
tiny and precise structures on semiconductor wafers.
To make devices such as transistors or diodes we need to perform the
doping only in isolated areas rather than across the entire wafer. In
addition, we need to create contacts and connections on the devices.
This is accomplished by removing the oxide in specific areas so the
dopants are allowed to diffuse into the exposed silicon.
The first step in this process is to develop a mask, which containing a
copy of the pattern to be transferred to the SiO2 film.
The top surface of the SiO2 covered wafer, is first coated with an ultravioletlight sensitive material called photoresist, which is supplied as a liquid.

5 - Lithography (cont.)
Photoresist:
It is an organic polymer sensitive to UV light and resistant to attack by
acids
The photoresist is spread on the wafer by a process called spin coating.
The photoresist to be reliable it must satisfy:
1- have a good bonding to the substrate;
2- it is thickness must be uniform.

photoresist
dispenser

vacuum chuck
to vacuum
pump

spindle

5 - Lithography (cont.)
There are two basic types of Photoresists:
Positive photoresists;
Negative photoresists.
Positive resists:
Positive resists decomposes ultraviolet light. The resist is exposed with
UV light wherever the underlying material is to be removed.
Exposure this resists to UV light changes the chemical structure of the
resist so that it becomes more soluble in the developer.
The exposed resist is then washed away by the developer solution,
leaving windows of the bare underlying material. The mask, therefore,
contains an exact copy of the pattern which is to remain on the wafer.

5 - Lithography (cont.)
Negative resists:
Exposure the negative resist to the UV light causes it to become
polymerized, and more difficult to dissolve.
Therefore, the negative resist remains on the surface wherever it is
exposed, and the developer solution removes only the unexposed
portions.
Masks used for negative photoresists, contain the inverse (or
photographic "negative") of the pattern to be transferred.
As an informational aside, negative resist was widely used in early IC
processing. Positive resist is now the main type in use because it
affords better small-geometry control.

5 - Lithography (cont.)
The thickness of the resists is usually in the range of 0.7 to 1 m.
After the resist is applied, it is soft-backed at 90 to 100 C to
improve adhesion to the oxide.
PR

Wafer

EBR
Water
Sleeve

Chuck
Drain

Exhaust
Vacuum

5 - Lithography (cont.)
Once the photoresists layer has been formed on the silicon wafer, the
pattern of the designed circuit is transferred to the sensitive layer
through a photomask.

Photomask:
It is a plate of high quality glass that containing the microcircuit
pattern that define the various regions on the silicon wafers, such as
the doping regions, the contact windows and etc.
The photomasks are made using a computer-aided design (CAD)
system.
The mask is placed over the wafer, and aligned using a microscope.

5 - Lithography (cont.)
Every layer in an IC must be patterned, so that the lithographic
sequence is repeated many times in the creation of a single
circuit.
Each mask after the first one must be aligned to the previous
pattern.

The
photomask
of a RF IC
Chip

5 - Lithography (cont.)
The pattern transfer process is accomplished by using a lithographic
exposure tool.
The performance of an exposure tool is determined by
Resolution: which is the minimum feature dimension that can be
transferred with high fidelity to a resist film on a wafer.
Registration: which is a measure of how accurately patterns on
successive masks can be aligned with respect to previously defined
patterns on the wafer.
Throughput: which is the number of wafers that can be exposed per
unit time for a given mask level.
There are two primary optical exposure methods:
1.Optical lithography,
2.Electron-beam lithography.

5 - Lithography (cont.)
Optical lithography: it is the widely used
lithographic technique because it has good
resolution, high throughput, low cost, and
ease of operation.
However, due to deep-submicrometer IC
process requirements, optical lithography
has some limitations.
Light diffraction limits the size of features
to approximately the wavelength of the
exposing illumination.
Because the intensity of the illumination
reaching the wafer surface vary gradually over
a distance related to the wavelength of the
exposing illumination, making definition of
sharp edges difficult.

5 - Lithography (cont.)
Finer features can be defined if shorter- wavelength light is used.
Light from mercury arc lamps is often used.
Three strong emission wavelengths in the UV wavelength range
occur at 436 nm (G-line), 405 nm (H-line), and 365 nm (I-line).
Even shorter wavelengths can be obtained by using laser sources,
such as a KrF or ArF laser; with wavelengths of 248 and 193 nm
for these laser sources.
Reducing the wavelength further is more difficult because most
materials used for lenses and masks become opaque at shorter
wavelengths.
However, considerable effort is being devoted to developing very
short wavelength, extreme ultraviolet (EUV) exposure systems
operating at a wavelength of 13 nm while still simultaneously
exposing all features within a sizable exposure field.

5 - Lithography (cont.)
Electron-beam lithography: it is the second lithographic
technique, in this method a focused stream of electrons delivers
energy to the resist and exposes it.
The advantages of electron-beam lithography include
1.The generation of submicrometer resist geometries,
2.Highly automated and precisely controlled operation,
3.Depth of focus greater than that available from optical lithography,
4.Direct patterning on a semiconductor wafer without using a mask.
The disadvantage of electron-beam lithography is that it has low
throughput - approximately 10 wafers per hour at less than
0.25 m resolution.

Lithography clean room area

7 - Etching process
It is define as the process of selectively removing of unmasked
portions of the layer.
After the pattern is formed in the resist, these resist patterns must be
transferred into the underlying layers of the device, by the etching
process.
There are two etching type:
Wet etch process: it is widely used in semiconductor processing,
Etching feature larger than 3m.
it proceed by immersing the wafers in a chemical solution or by
spraying the wafers with the etchant solution.
There are a large number of different liquid chemical solutions that etch
materials selectively with very little attack of underlying materials.
This high selectivity is an advantage of liquid-based or wet etching.

7 - Etching process (cont.)

Dry etcher (plasma etcher): The major disadvantage of wet etching
is the undercutting of the layer underneath the mask (isotropic),
resulting in a loss of resolution in the etched pattern.
Dry (plasma) etching techniques can be
anisotropic and minimize this problem.
In this process an etching gas is chosen
that reacts with the material to be
removed.
Silicon and its compounds are effectively
etched by gases containing fluorine,
while aluminum is removed with
chlorine-containing species.

Figure (a) Isotropic, wet etching

Figure (b) Anisotropic, dry
etching creates a near-vertical
profile.

7 - Etching process (cont.)

A plasma is a fully or partially ionized gas composed of equal
numbers of positive and negative charges and a different number of
excited neutral species (un-ionized molecules).

In plasma etching, the

masked wafer is exposed to
the plasma. The excited
neutral species interact
chemically with exposed
regions of the material to be
etched, while the ions in the
plasma bombard the surface
and physically
remove
exposed material.

8 - DOPING
It is the process of adding impurities to substrate in order to change
their characteristics.
The substrate may be n type, p type or intrinsic, but it is necessary to
be able to make certain regions be of the opposite type, to create
diodes, transistors or any other device.
There are two major techniques for doping an existing semiconductor
crystal:
1.Diffusion;
2.Ion implantation.

Diffusion Processor
In diffusion, a substrate at an elevated temperature is exposed to an
atmosphere containing the desired dopant. For example, to diffuse an
n-type layer into a p-type substrate, the wafer is placed in a diffusion
furnace containing a gas of an n-type dopant such as phosphorus. The
P atoms are in higher concentration atmosphere than in the wafer, so
they will diffuse into the surface of the wafer.
The source of dopant can be in several forms:
1.solid (boron nitride and phosphorus
oxide ceramic discs);
2.liquid (boron tribromide and POCl3);
3.gas (diborane or phosphine).

Diffusion Processor (cont.)

Diffusion Processor requires very high temperatures (800 to 1100C)
for the phosphorus atoms to have enough kinetic energy to work their
way into the substrate.
It is carried out in a diffusion furnace identical in construction to that used for
oxidation.
In this process, the distribution of dopants is not uniform, but is instead more
concentrated toward the surface.
The longer the exposure and the higher the temperature, the deeper the
diffusion.
The surface doping concentrations produced by this method are very high
(up to 102l/cm3).

Diffusion Processor (cont.)

Diffusion furnace

Diffusion Processor (cont.)

Ion Implantation Processor

Ion implantation is the second method of doping that used to
introduce impurity atoms into the semiconductor crystal.
An ion implanter produces ions of the desired dopant, accelerates
them by an electric field (ranging from 5 KeV to 1 MeV), and allows
them to strike the semiconductor surface. The ions become embedded
in the crystal lattice. The depth of penetration is related to the energy
of the ion beam, which can be controlled by the accelerating-field
voltage.
Ion implantation results in much more accurate and reproducible
impurity profiles than can be obtained by diffusion. In addition, ion
implantation can be performed at room temperature. Ion implantation
normally is used when accurate control of the doping profile is
essential for device operation. Finally ion implantation is a clean
process (processed in vacuum ambient)

Ion Implantation Processor

(cont.)

Ion Implantation Processor

(cont.)
Doped region

SiO2

PR

Si

Si
Junction depth
Diffusion

Ion implantation

Comparison of Implantation and Diffusion

9 - Thin-Film Deposition
It is the processor of deposition a thin layer (about 1 m) of a metal on
the solid support that is known as a substrate.

Functions of thin film deposition

Connect device structures to the "outside world".
Prevent the interdiffusion of materials and to protect the device or
circuit from contamination.
Complex ICs have three or sometimes four electrically isolated
metallization layers. Electrical isolation of the layers requires the
deposition of intervening dielectric layers.

9 - Thin-Film Deposition (cont.)

Methods of thin film deposition
Physical vapor deposition
Chemical vapor deposition
Epitaxial growth

Physical vapor deposition

(PVD)
The physical vapor deposition technique is based on the
formation of vapor of the material to be deposited as a thin film.
Two technologies are often used:
1)Evaporator;
2)Sputtering.

Physical vapor deposition

(PVD) (cont.)
Evaporation
It is one of the older and more straightforward methods of thin-film
deposition.
The material to be evaporated is placed in a resistance-heated source
holder inside a vacuum chamber.
To evaporate Aluminum for example, a short piece of Al wire would
be placed on a tungsten filament or boat. The substrate on which the
film is to be deposited is also positioned inside the chamber facing the
source.
Because of the reduced pressure, the source material travels
unimpeded to the substrate and deposits as a thin film.

Evaporation (cont.)
Advantage of evaporation processor
1. Very large number of materials can be evaporated.
2. Variety of substrates can be used.
3. Control of deposition rate.
4. Straight line propagation will occur from source to substrate
Generally, hot-filament evaporation is subject to moderately
high levels of contamination. Electron-beam evaporation, a
variation of the process where the source is heated by an electron
beam, eliminates contamination.
Evaporation is seldom used in the fabrication of modern ICs.
although it is still extensively used in making simple devices
where the cited problems are of minimal concern.

Physical vapor deposition

(PVD) (cont.)
Sputtering
It is the other physical vapor deposition process whereby atoms in a
solid target material are ejected into the gas phase due to
bombardment of the material by energetic ions.
The ions for the sputtering process are supplied by a plasma that is
induced in the sputtering equipment.
Sputtering relies on a plasma (such as Argon) to knock material from
a "target" a few atoms at a time.
Like evaporation, it is performed in a vacuum chamber. The source
material and the substrate (wafer) are placed on opposing parallel
plates connected to a high-voltage supply.

Sputtering (cont.)

Sputtering (cont.)
During a deposition the chamber is first evacuated of air and then a
low-pressure amount of sputtering gas, typically Ar, is admitted into
the chamber.
Several KV applied to an inert gas in a vacuum system to ionize the
gas. Ions bombard the sputter source and remove material.
Material deposits on surrounding areas, including substrates, forming a
thin film

Sputtering (cont.)
The advantages of sputter deposition
1. Multi component films, insulators as well as refractory materials can
be deposited.
2. Good adhesion is assured.
3. Thickness uniformity over large areas can be obtained.
4. Thickness control is easy since the thickness is proportional to the
deposition time.
5. Substrate cleaning in situ is possibly by ion bombardment.
The disadvantages of sputter deposition
1.Deposition rate usually lower than 40 A/s.
2.Substrate must be cooled except for short runs.
sputtering has become the commercial method of depositing Al and other
metals.

Chemical Vapor Deposition

CVD
It is a chemical process for thin film deposition. Where a gases or
vapors are chemically reacted, leading to the formation of solids on a
substrate
In this process either a compound decomposes to form the film or a
reaction between gas components takes place to form the film.
CVD processes fall into one of three general categories. They are:
1.Atmospheric pressure (APCVD or simply CVD): which can be
performed in relatively simple systems.
2.Low-pressure (LPCVD): it offers uniform deposition and less gas
consumption.
3.Plasma-enhanced (PECVD) processes: the electrons in the plasma
impart energy to the reaction gases, thereby enhancing the reactions
and permitting very low deposition temperatures.

Parallel Plate PECVD

Reactor

Epitaxy
Epitaxy is a special type of thin-layer deposition.
Other type of depositions described previously yield either amorphous
or polycrystalline films.
Epitaxy process produces a crystalline layer that is an extension (same
structure) of the underlying semiconductor lattice.
It is commonly formed
from the vapor-phase
decomposition of silicon
teirachloride (SiCI4) or a
silane compound (SiH4,
SiHCI2, SiHCI3) in a reactor
very similar to those
employed in CVD,
additional Si literally grows
following the lattice pattern
of the pre-existing crystal.

10 - Dicing
It is the process by which die are separated from the semiconductor
wafer following the devices designing processes.
The dicing process can be accomplished by scribing and breaking, by
mechanical sawing (normally with a machine called a dicing saw) or
by laser cutting

11 - Mounting
After the IC chips are cut apart, they are sealed into packages. The IC
chips must first be attached to a platform called the lead frame.

12 - Wire bonding
It is the process of connecting the mounted IC chips to the lead
frames.

12 - Wire bonding (cont.)

The mounted IC chips are connected to the lead frames.

Fabrication of a Simple
pn Junction Diode