UNIT – II
Programmers Model for Intel 8086
                Introduction
• 8086 has 20 address lines, ie 1 MB of memory
• The memory has further divided in to 4
  segments
• Each has 64 KB memory segment
• There are four different 64 KB segments for
  instructions
• The functions of segment registers are to store
  the starting address of the segments in the
  memory.
Introduction
Code segment (CS)
Stack segment (SS)
Data segment (DS)
Extra segment(ES)
Introduction
                   Introduction
• All general registers of the 8086
  microprocessor be used for arithmetic and
  logic Operations
• The l6 bit general registers are:
     •   Accumulator register (AX)
     •   Base register (BX)
     •   Count register (CX)
     •   Data register (DX)
              Introduction
• It consists of two 8-bit registers AL and AH,
  which can be combined together and used
  as a l6-bit register AX.
   • Similar for BX, CX and DX
Introduction
         Accumulator Register:
• Accumulator can be used for I/O operations
  and string manipulation
                Base register:
• BX register usually contains a data pointer
  used for based, based indexed or
  Register in direct addressing.
               Count register
• Count register can be used as a count in
  string manipulation and shift/rotate
  instructions.
                       Data register
• Data register can be used as a port number in I/O operations
  In integer 32-bit multiply and divide instruction
• DX register contains high-order word of the initial or resulting
  number.
               Segment Registers
Code segment (CS)
  • It is an l6-bit register containing address of 64 KB
    segment with processor instructions.
  • The processors uses CS register for all accesses to
    instructions referenced by instruction pointer (IP)
    register CS register cannot be changed directly.
  • The CS register is automatically updated during FAR
    JUMP, FAR CALL and FAR RET instructions.
                Segment Registers
Stack segment (SS)
• It is an l6-bit register containing address of 64KB segment
  with program stack.
• By Default, the processor assumes that all data
  referenced by the stack pointer (SP) and base Pointer
  (BP) registers are located in the stack segment
• SS register can be changed directly using POP
  instruction.
               Segment Registers
 Data segment (DS)
  • It is a 16-bit register containing address of 64KB
    segment with program data.
  • By default, the processor assumes that all data
    referenced by general registers
  • (AX, BX, CX, DX) and index register (SI, DI) is located
    in the data segment
  • DS register can be changed directly using POP and
    LDS instructions.
            Segment Registers
 Extra segment (ES)
  • It is a 16-bit register containing address of 64KB
    segment, usually with program data.
  • the processor assumes that the DI register references the
    ES segment in string Manipulation instructions ES
    register can b e changed directly using POP and LES
    instructions.
  • It is possible to change defaults segments used by
    general and index registers by prefixing instructions with
    a CS, SS, DS or ES prefix.
                Pointer Registers
Stack Pointer (SP)
  • It is an l6-bit register pointing to program stack.
Base Pointer (BP)
  • It is an l6-bit register pointing to data in the stack
    segment
  • BP register is usually used for based, based indexed
    or register indirect addressing.
                    Index Registers
• Source Index (SI)
       • It is an l6-bit register.
       • SI is used for indexed, based indexed and register
         indirect addressing,
       • Also a sourced data addressing string
         manipulation instructions.
                     Index Registers
• Destination Index (DI)
    • It is a l6-bit register
    • DI is also used for indexed, based indexed and
      register indirect addressing
    • Also a destination data addressing string
      manipulation instructions.
            Instruction Pointer (IP)
• It is a 16-bit register
• The operation is same as the Program Counter
• The IP register is updated by the BIU to point to the
  address of the next instruction.
• Programs do not have direct access to the IP
• During execution of a program the IP can be modified or
  saved and restored from the stack.
                  Flag register
• 6 status flags and 3 Control flags
• It is a l6-bit register containing nine l-bit flags
• Six status or condition flags (OF, SF, ZF, AF, PF, CF)
• Three control flags ( TF, DF, IF)
                     Flag register
• Overflow Flag (OF) - set if the result is too large positive
  number or is too small negative number to fit into destination
  operand.
• Sign Flag (SF) - set if the most significant bit of the result is set.
• Zero Flag (ZF) - set if the result is zero.
• Auxiliary carry Flag (AF)- set if there was a carry from or
  borrow to bits 0-3 in the AL register.
• Parity Flag (PF) - set if parity (the number of "1" bits) in the
  low-order byte of the result is even.
• Carry Flag (CF) - set if there was a carry from or borrow to the
  most significant bit during last result calculation
                    Flag register
• Trap or Single-step Flag(TF)- if set then single-step
 interrupt will occur after the next instruction.
• Direction Flag (DF) - if set then string manipulation
 instructions will auto decrement index registers. If cleared then the
 index registers will be auto incremented.
• Interrupt-enable Flag (IF) - setting this bit enables maskable
 interrupts.
         Memory Write operation:
• To execute Memory Write Operation,
• the CPU places the value zero on the data bus, the
 address(say 1250H ) on the address bus,
• Asserts the w rite line (since the CPU is writing data to
 memory).
Memory Write operation:
         Memory Read operation:
• To execute Memory Read Operation,
• the CPU places the address (say1 250H) on the
  address bus, assert the read line
• Then reads the resulting data from the data bus.
Memory Read operation:
Memory Organization:
               Instruction Set:
• Intel 8086 has approximately 117 instructions.
• These instructions are used to transfer data between
  registers, register to memory, memory to register or
  register to I/O ports and other instructions are used for
  data manipulation
               Instruction Set:
• 8086 instruction set consists of
• Data moving instructions.
• Arithmetic instructions- add, subtraction, increment
  decrement convert byte/word and compare.
• Logic instructions- AND, OR, exclusive OR,
  shift/rotate and test.
• String manipulation instructions- load, store, move,
  compare and scan for byte/word.
               Instruction Set:
• Control transfer instructions- conditional,
  unconditional, call subroutine and return from
  subroutine.
• Input/Output instructions.
• Other instructions- setting/clearing flag bits stack
  operations, software interrupts, etc.
             Addressing modes:
• An addressing mode is the way the 8086 identifies the
  operands for the instruction.
• All instructions that access the data use one or more of
  the addressing modes.
• The memory address of an operand consists of two
  components:
      » Starting address of the memory segment
      » Offset
• The starting address of the memory segment resides in
  the corresponding segment register.
• When an operand is stored in a memory location, the
  operand's memory location is within a memory segment
  from the starting address of the segment, is called Offset
  or Effective Address( EA).
       Addressing modes Conti….:
• An offset is determined by adding any combination of
  three address elements:
       » Displacement, Base or Index.
• The combination depends on the addressing mode of
  the instruction.
   Displacement:
      » It is an 8-bit or l6-bit immediate value given in the
        instruction
   Base:
      » It is the content of the base register, BX or BP
   Index:
      » It is the content of the index register, SI or DI
        Addressing modes Conti….:
• Memory address = starting address of the
  memory segment + offset
      Addressing modes Conti….:
The 8086 has the following addressing modes:
      » Register Addressing Mode
      » Immediate Addressing Mode
      » Direct Addressing Mode
      » Register Indirect Addressing Mode
      » Base Addressing Mode
      » Indexed Addressing Mode
      » Based Indexed Addressing Mode
      » String Addressing Mode
      » I/O Port Addressing Mode
      » Relative Addressing Mode
      » Implied Addressing Mode
Addressing modes Conti….:
Addressing modes Conti….:
Addressing modes Conti….:
Addressing modes Conti….:
Addressing modes Conti….:
Addressing modes Conti….:
Addressing modes Conti….:
Addressing modes Conti….:
Addressing modes Conti….:
Addressing modes Conti….:
Addressing modes Conti….:
Data Transfer Instructions :
Data Transfer Instructions :
Data Transfer Instructions :
Data Transfer Instructions :
Data Transfer Instructions :
Data Transfer Instructions :