UNIT 1

8 BIT EMBEDDED PROCESSOR

Define
• An embedded system is a computer system—a combination of a
computer processor, computer memory, and input/output peripheral
devices—that has a dedicated function within a larger mechanical or
electronic system.
• H/W +S/W
8 bit Microcontroller Architecture
CPU:
8 bit arithmetic & logic unit with associate registers-(A,B,PSW,SP,16
bit PC, & DPTR),special function registers
Unique feature-1 bit & as well as 8 bit data ALU-manipulate
A & B CPU registers:
Register A Register B
It holds source Operand & receives the In addition to accumulator an 8 bit
result of the arithmetic instruction register is available as general purpose
register
Rotate, Parity, computation testing for Hardware multiply /divide operation
zero

DPTR:
It serves base registers in indirect jumps, look up table & external
data transfer 16 bit DPTR
DPH(83H) DPL(82H)
memory address
PC:
16 bit PC.
Holds the address of memory location from which the next
instruction is fetched
8051 Flag Bits and the PSW Register:
CY-Carry
AC-Auxillary Carry flag
RS-Register bank Select
OV-Overflow Flag
P-Parity
Special Function Register:
Group of register-perform special functions are located immediately
above 128 bytes of RAM
All four I/O ports,CPU,Interrupt,Timer/Counter,UART-80H and FFH
Sort of control table- used for running/monitoring the operation of
microcontroller
21 registers share the memory locations
Pin description
• Pins 1 to 8 − These pins are known as Port 1. This port
doesn’t serve any other functions. I/O port
• Pin 9 − It is a RESET pin, which is used to reset the
microcontroller to its initial values.
• Pins 10 to 17 − These pins are known as Port 3. This port
serves some functions like interrupts, timer input,
control signals, serial communication signals RxD and
TxD, etc.
• Pins 18 & 19 − These pins are used for interfacing an
external crystal to get the system clock.
• Pin 20 − This pin provides the power supply to the
circuit.
• Pins 21 to 28 − These pins are known as Port 2. It serves as I/O
port. Higher order address bus signals are also multiplexed
using this port.
• Pin 29 − This is PSEN pin which stands for Program Store
Enable. It is used to read a signal from the external program
memory.
• Pin 30 − This is EA pin which stands for External Access input.
It is used to enable/disable the external memory interfacing.
• Pin 31 − This is ALE pin which stands for Address Latch Enable.
It is used to demultiplex the address-data signal of port.
• Pins 32 to 39 − These pins are known as Port 0. It serves as I/O
port. Lower order address and data bus signals are
multiplexed using this port.
• Pin 40 − This pin is used to provide power supply to the circuit.
Internal &External Memories
• Access up to 64K Program memory & Data memory
• It has 4K bytes of internal program memory & 256 bytes of internal
data memory
Internal RAM organization
• 8051-128 bytes of RAM
• Divided-3 sections
1. Register Banks
2. Bit/Byte addressable area
3. General purpose memory area
Stack and Stack Pointer
• Area of internal RAM-store and retrieve data quickly
• SP-hold an internal RAM address-top of stack
• SP register-8 bit wide.
• Increased before the data is stored during PUSH and CALL instructions
• Decremented after the data is restored during POP and RET
instructions
Instruction Set Programming
8051 Addressing Modes
• Addressing mode is defined as the way of specifying the data or operand in the instruction
• i.e to specify the given data as an immediate data or an address
• Moving the data from source to destination by using mnemonic-addressing mode
Types:
 Register Addressing
 Direct Byte Addressing
 Register Indirect Addressing
Immediate Addressing
Register Specific Addressing
Index Addressing
Stack Addressing mode
Register
• In the register addressing mode the source or
destination data should be present in a register (R0 to
R7).
• MOV A, R5;
• MOV R0, A;
Direct
• In this mode, the source or destination address is specified by using 8
bit data in the instruction itself
• Only the internal data memory can be used in this mode
• MOV R0,45H
• ADD A,51H
Register indirect
• In this mode, the source and destination address are
given in the register
• This method is used to access the internal and external
memory locations
• @ sign
• MOV A, @R0; Load the contents pointed by R0 to A
• Add A,@R1; Add the contents of A and the contents pointed by R1
Immediate
• The data is provided in the instruction itself.
• The data is provided immediately after the opcode
• Data-constant value
• MOV A,#05H: Move the immediate data 05H to the accumalator
• 05 05H
# -immediate data.
Register Specific
• Inherent in the instruction – refer a specific register such as
accumulator or DPTR

• SWAP A; Swap nibbles with in the accumulator

Index
• In this mode, only the program memory can be accessed.
• The destination operand is always the accumulator A
• MOVCA, @A+PC;
• MOVCA, @A+DPTR;
• The C in MOVC instruction refers to code byte.
• For the first instruction, let us consider A holds 30H. And
the PC value is1125H.
• The contents of program memory location 1155H
(30H + 1125H) are moved to register A.
Stack addressing mode
• Subtype of direct addressing mode
• PUSH and POP
• PUSH A- invalid- specify the address of the register A
• PUSH 0E0H-Valid –pushes/store the instruction the content of the
accumulator in the stack
• Push 04
• Pop 02
DATA TRANSFER INSTRN(Data moving)
• Instruction to access external data memory
• Instruction to access External ROM/program memory
• Data transfer with stack instructions
• Data Exchange instruction
Byte Level Logical instructions
BOOLEAN 8051 MNEMONIC
OPERATOR

AND ANL (AND logical)

OR ORL (OR logical)

XOR XRL (exclusive OR logical)

NOT CPL (complement)

Arithmetic Instructions
ADD A,Rn
Adds the register to the accumulator

ADD A,direct
Adds the direct byte to the accumulator

ADD A,@Ri
Adds the indirect RAM to the accumulator

ADD A,#data
Adds the immediate data to the accumulator
 SUBB A,Rn DEC A
Subtracts the register from the accumulator with a borrow Decrements the accumulator by 1

SUBB A,direct DEC Rn

Subtracts the direct byte from the accumulator with a borrow Decrements the register by 1

SUBB A,@Ri DEC Rx

Subtracts the indirect RAM from the accumulator with a borrow Decrements the direct byte by 1

SUBB A,#data DEC @Ri

Subtracts the immediate data from the accumulator with a borrow Decrements the indirect RAM by 1
INC A
Increments the accumulator by 1
MUL AB
INC Rn Multiplies A and B
Increments the register by 1
DIV AB
INC Rx Divides A by B
Increments the direct byte by 1
DA A
INC @Ri Decimal adjustment of the accumulator according to BCD code
Increments the indirect RAM by 1
Bit Level Logical instruction
Rotate and Swap instructions
• RLA – Rotate accumulator left
8 bits in the accumulator are rotated one bit to the left. Bit 7 is rotated
into the bit 0 position
• RLC A-Rotate A Left through the carry flag

8 bits in the accumulator and the carry flag are together rotated one bit
to the left. Bit 7 moves in to the carry flag, original state moves to 0 th
position. No other flags are affected
Jump and Call instructions
• Change the flow of program by changing the contents of the program
counter
• Jump-permanently changes the program flow
• Call-Temporarily changes the program flow to allow another part of
the program
Following types:
1. Jump on bit conditions
2. Compare byte and jump if not equal
3. Decrement unconditionally
4. Call a sub routine \ Return from a subroutine
Jump and Call Program Range
• Replace the contents of PC with a new program address.
• New address- specified either by specifying the difference between
the new address and current program counter contents or by
specifying the entire new address
• Range of jump-difference in bytes of the new address from the
address in the PC
• Relative range:127 to -128(+7FH to -80H)
• Absolute range: 000H to 07FFH
• Long range: 0000H to FFFFH
Jump

• LJMP
• SJMP
• AJMP
Syntax: LJMP address
The program execution directly jumps to the specified address. This
instruction can be used for 64Kb of memory. It has a range of 65,536
addresses, and can jump over these many addresses. So named Long jump.
• This instruction consumes 3 bytes of instruction( size of instruction ).
• LJMP – 1 byte
Address – it is a 16-bit address , so 2 bytes.
When a particular address is given in the instruction that address is stored in
the PC.
Call and Sub routine
• 2 sub routine call instructions
• LCALL and ACALL
• RET
• RETI
Time delay for 8051
• Machine cycle period=12/crystal frequency
• Crystal frequency-11.0592 Mhz
• Machine cycle period=12/11.0592x10^6=1.085us
PARALLEL PORTS
8051 I/O Ports structure
• Each port of 8051 has bidirectional capability.
• Port 0 is called 'true bidirectional port' as it floats (tristated) when
configured as input.
• Port-1, 2, 3 are called 'quasi bidirectional port’.
Port 0 Structure
• Port-0 can be configured as a normal bidirectional I/O port or it can be
used for address/data interfacing for accessing external memory.
• When control is '1', the port is used for address/data interfacing.
• When the control is '0', the port can be used as a normal bidirectional
I/O port.
• Port-0 latch is written to with 1's when used for external memory
access.
Port 1
• Port-1 does not have any alternate function i.e. it is dedicated solely
for I/O interfacing.
• I/O pins used
• When used as output port, the pin is pulled up or down through
internal pull-up.
Port 2
• Used to access external memory.
• Port 2 outputs the higher order byte of the external memory address
when the address is 16 bits wide
Port 3
• Multifunctional
• Programmed to use as I/O or as one of the alternate function
• Special functions include two external interrupts, two counter inputs,
two special data lines and two timing control strobes
I/O Bit manipulation Programming
• Port 0 has open drain outputs-I/P or O/P it is necessary to connect
external pull up resistors
• Port 1,2,3 do not require any pull up resistors since they have internal
pull up resistors
• On reset all ports are configured as an input ports
• If the ports are configured as an output ports to make them input
ports again we have to write FFH(1 to all 8 bits) on these ports
Programming I/O ports using 8051C
• We need to include the file reg51.h
• C compiler
• Much easier and less time consuming to write programs in C than
assembly
• C is more flexible t is easier to modify and update
 Data type Bits Bytes Value range

bit 1 0 to 1

Data types signed char

unsigned char
8

8
1

1
-128 to +127

0 to 255

-128 to +127 or -32768 to

enum 8 or 16 1 or 2
+32767

signed short 16 2 -32768 to +32767

unsigned short 16 2 0 to 65535

signed int 16 2 -32768 to +32767

unsigned int 16 2 0 to 65535

-2147483648 to
signed long 32 4
2147483647

unsigned long 32 4 0 to 4294967295

±1.175494E-38 to
float 32 4
±3.402823E+38

sbit 1 0 to 1

sfr 8 4 0 to 255

sfr16 16 2 0 to 65535
• It is necessary to keep in mind that the code space
for 8051 or 89c51 is limited to 64 Kilobytes and it
has limited on-chip ROM.
• Thus, it is necessary to look at the size the created
hex file. One way to keep the size of the data file
optimum is to use appropriate data type.
•The unsigned char is an 8-bit data type. Thus, it
must be to store the value in the range of 0-255
(00H-FFH). Since the 8051 is an 8-bit
microcontroller, it is the one of the most widely
used data type.
•Use unsigned data types when there is no need of
signed data.
•C compiler uses signed data type as default. Thus
when we want to use unsigned data type, we must use
unsigned keywords.
•sbit data type should be used to access bit
addressable registers. It allows use to access single bits
of SFR registers.
•SFR data type should be used to access the byte size
SFR registers.
Logical operations in 8051c
• One of the most frequent operations required in embedded
applications is monitoring a single or a group of bits of a port,
checking the status of bits and controlling an external device
connected to a bit of an output port.
• C allows logical operations such as AND, OR, X-OR as well as
shifting a byte to the left and right.
 Operations In assembly In C Example in C

NOT CPL A ~ A=~A

AND ANL A,#DATA & A=A&DATA

OR ORL A,#DATA A=A DATA

EX-OR XRL A,#DATA ^ A=A^DATA

Shift right by n-bits RR A >> A=A>>n

Shift left by n-bits RL A << A=A<<n

TIMERS
8051 Timer
• There are two 16-bit timer registers. These registers
are known as Timer0 andTimer1.
• The timer registers can be used in two modes.
• TL and TH
• These registers can be accessed like other registers-
A,B,R0,R1
Structure of TMOD register
TMOD(Timer Mode) is an SFR. The address of this
register is 89H.
This is not bit-addressable.
GATE
• Every timer defines starting and stopping.
• Some timers do this by software, some by hardware, and
some have both software and hardware controls.
• 8051 timers have both software and hardware controls.
• The start and stop of a timer is controlled by software
using the instruction SETB TR1 and CLR TR1 for timer 1,
and SETB TR0 and CLR TR0 for timer 0.
C/T (CLOCK / TIMER)
• Decide whether a timer is used as a delay generator or
an event manager.
• Bit cleared-Timer
• Bit set-Counter
Structure of TCON register
• TCON is an 8-bit register. Its bits are used for generating interrupts
internal or external
• Contrls the following timer operations
1. Start and stop timer 0 and 1
2. Provides status of timer / counter overflows
3. Provides status of external interrupts
4. Configure external interrupts as either low level or falling edge
8051 Timer Modes and
Programming
• Four modes of timer, mode 0,mode1,mode2 and mode 3
Mode 0: Both timers in mode 0 are 8 bit counters with a divide by 32
prescalar
• This 13 bit timer is MCS-48 compatible
• In this mode timer register is configured as 13 bit register
• As the count roll overs from all 1s to 0s, it sets the timer interrupt
flag-TF1
• The counted input enabled the timer when TR1-1/G-0 or INT1=1
• TR1 –control bit in the SFR TCON Gate is in TMOD
• 13 bit register consists of all 8 bits of TH1 and lower bits 5 are TL1
• Upper 3 bits of TL1 are indeterminate and should be ignored.
• Setting the run flag(TR1) does not clear all the registers
• Mode 0 operation is the same for timer 0 as for timer 1
• Substitute TR0 and TF0 and INT0-corresponding timer 1 signals
• There are 2 different gate bits one for timer 1(TMOD 7) and one for
timer 0 (TMOD3)
Mode 1
• Both timers mode 1 are 16 bit counters .
• Counter roll over from 1s to all 0s –set the timer interrupt flag
• Counted input enabled to the timer when TR-1 and either gate
-0/INT1-1
• Setting G-1 allows the timer to be controlled by external inputs INT1
to facilitate pulse width measurements
• Timer 0 mode 1 programming
• Timer 1 mode 1 programming
Timer 0 mode 1 • Time delay can be generated
programming • Load TMOD register indicating timer 0 is used and mode
1 is selected
• Load TL0 and TH0 registers with count values
• Start the timer by setting TR0 bit-1
• Monitor the timer flag (TF0) with JNB TF0,target address
instruction when it is raised, get out of the loop
• Stop the timer by clearing TR0 bit =0 with CLR TR0
instruction
• Clear TF0 with CLR TF0 instruction
• When start and stop of timer is done using software, no
external hardware is needed for the same
 • Time delay can be generated
Timer 1 mode 1 • Load TMOD register indicating timer 1is used
programming and mode 1 is selected
• Load TL1and TH1 registers with count values
• Start the timer by setting TR1 bit-1
• Monitor the timer flag (TF1) with JNB
TF1,target address instruction when it is
raised, get out of the loop
• Stop the timer by clearing TR1 bit =0 with CLR
TR1 instruction
• Clear TF1 with CLR TF1instruction
• When start and stop of timer is done using
software, no external hardware is needed for
the same
Mode 2 :
• It configures the timer register as 8 bit counter (TL) with automatic
reload
• Overflow from TL only sets TF, but also reloads TL with the contents of
TH, which is preset by software
• The reload leaves TH unchanged
Timer 0 mode 2 • Time delay can be generated
programming 1. Load TMOD register indicating timer 0 is used and
mode 2 is selected
2. Load TH0 registers with count values
3. Start the timer by setting TR0 bit-1
4. Monitor the timer flag (TF0) with JNB TF0,target
address instruction when it is raised, get out of the
loop
5. Clear TF0 with CLR TF0 instruction
6. Go back to step 4. there is no need to load TH0
register again since Mode 2 is auto reload
• When start and stop of timer is done using software, no
external hardware is needed for the same
 • Time delay can be generated
Timer 1 mode 2 1. Load TMOD register indicating timer 1 is used
programming and mode 2 is selected
2. Load TH1registers with count values
3. Start the timer by setting TR1 bit-1
4. Monitor the timer flag (TF1) with JNB
TF1,target address instruction when it is
raised, get out of the loop
5. Clear TF1 with CLR TF1instruction
6. Go back to step 4. there is no need to load
TH1 register again since Mode 2 is auto reload
• When start and stop of timer is done using
software, no external hardware is needed for
the same
Mode 3
• Timer 1 in mode 3 simply hold its
count .
• The effect is the same as setting
TR1=0 .
• Timer 0 in mode 3 establishes TL0
and TH0 as separate counters
• TL0 uses the timer 0 control bits: C/T,
GATE , TR0, INT0 and TF0
• TH0 is locked in to the mode and
takes over the use of TR1 and TF1
from Timer 1
• Thus TH0 now controls the timer 1
interrupt
8051 Counter Programming
TMOD, TH and TL register are used, functioning the same as for the
timer
• C/T in TMOD Register
• Counter 0 in mode 1
• Counter 1 in mode 1
• Counter in mode 2
C/T in TMOD Register
• When C/T bit in TMOD reg-0 timer mode is selected
• When timer/counter is used as timer-8051 crystal used as a source of
the frequency
• When C/T bit in the TMOD reg-1 counter moder is selected
• When timer/counter is used as a counter –it gets the pulses from
outside the 8051
Counter 0 in mode 1
• G-0,INT0-1 ̄
• Counter 0 counts up when the logic signal goes from high –low level
• Steps
1. C/T bit in TMOD reg(bit 2) is set to 1 to allow counter mode
operation
2. M1:M0 in TMOD set to 01-select mode 1
3. When gate bit(Bit 3) in TMOD reg cleared to 0,TR0 bit(bit 4 of TCON)
set to 1-start the counter
4. When gate bit(Bit 3) in TMOD reg is set to 1,counter will run only if
TR0 is set to 1 and the logic signal on ext interrupt pin INT0 is high
Counter 1 in mode 1
• G-0, INT0-1
• Same as counter 0
• Difference is that there here registers for counter 1 are programmed
instead of counter 0
Counter in mode 2
• Counter is used in auto reload mode instead of 16 bit counter
• Rest of the operation is exactly same as mode 1
 8051 SERIAL PORT
 Operating modes of serial port
 Generating baud rates
 Programming 8051 for serial data transfer
 Programming 8051 for receiving data serially
 Doubling the baud rate
 8051 connection to RS 232C
 Serial communication programming in C
• Full duplex
• Uses SBUF to hold data
• Register SCON-controls data communication
• Register PCON controls data rates
• Pin RxD(P3.0) & TxD(P3.1) –data transfer
Bit pattern of SCON register
Bit pattern of PCON register
Operating modes for Serial Port
Mode 0:

o In this mode the serial port function as half duplex serial port with fixed baud rate.

o The 8- bit serial data is received and transmitted through RxD pin and the controller output the shift
clock through TxD pin during reception and transmission.

o The baud rate is fixed at 1 / 12 of the oscillator frequency.

Mode 1:

o In this mode the serial port function as full duplex serial port with variable baud rate.

o In this mode one data consists of 10 bits, which includes one start bit, eight data bit and one stop bit.
During reception the stop bit is stored as RB8 in SCON register.

o Baud rate in mode-1 depends on the value of SMOD bit in PCON register and the timer-1overflow
rate.
Mode 2:

o In this mode the serial port function as full duplex serial port with a baud rate of
either 1/32 or 1/64 of the oscillator frequency.

o In this mode one data consists of 11 bits which includes one start bit, eight data bit,
a programmable 9th data bit and one stop bit.

o During transmission the TB8 of SCON register is added as 9th data bit and during
reception the 9th data bit is stored as RB8 in SCON register.

o The baud rate depends on the value of SMOD bit in PCON register.

Mode 3:

o The mode-3 is same as mode-2, except the baud rate.

o In mode-3, the baud rate is variable. The baud rate depends on the value of SMOD
bit in PCON register and the timer- 1 overflow rate.
Generating Baud rates
• Serial port in Mode 0:fixed baud rate which is 1/12 of the oscillator
frequency. SCON register needs to be defined
• Serial port in Mode 1: Variable baud rate. Baud rate can be defined by
either Timer 1 or 2 (8052)
• Using Timer/Counter to generate baud rates