UNIT-2

 Addressing Modes of 8086

 Instruction Formats of 8086
 Instruction Set of 8086
 Assembler Directives
 Simple Programs
 Procedures And Macros

unit-2 1
 Addressing Modes Of 8086
 Addressing modes:
The way the data or operand is
accessed by an instruction.
 Categories of Addressing modes:
1. Data Addressing Modes
2. Program Memory Access Addressing Modes
3. Port Access Addressing Modes

unit-2 2
 DATA ADDRESSING MODES
 Data Addressing Modes
Data Addressing Modes explains the way the operands/Data are
Accessed by an instruction
 Types of Data Addressing modes:
1. Immediate Addressing Mode
2. Register Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
5. Based Addressing mode
6. Indexed Addressing Mode
7. Based Indexed Addressing Mode
8. Relative Register Addressing Mode
9. Relative Based Indexed
unit-2
Addressing Modes 3
 DATA ADDRESSING MODES
 Immediate Addressing Mode:
The data is part of instruction itself and is available in successive
bytes of instruction code.
Example: MOV AX,0005H
Instruction
Datum

 Register Addressing Modes:

In this mode data is stored in a register and it is referred using
particular register.
All registers except IP and Segment Registers can be used to store
the data.
Example: MOV AX,BX
Instruction Register
Register unit-2
Datum 4
 DATA ADDRESSING MODES
 Direct Addressing Mode:
the operands will reside in memory and the address of memory is
specified in the instruction as a part of its successive bytes.
Example: MOV AX, [5000]
Instruction Memory

EA Datum

 Register Indirect Addressing Mode:

The operands will reside in memory and its address is specified
indirectly by using offset registers.The offset address may be in either
BX or SI or DI registers. The default segment is either DS or ES. The
data is supposed to be present at the address pointed by above
registers in the default segment.
Example: MOV AX,[BX]
Instruction Register Memory
Register EA Datum
unit-2 5
 DATA ADDRESSING MODES
 Based Addressing Mode:
The effective address will be the contents of base register or base
pointer register.
 Indexed Addressing Mode:
The effective address of the datum will be the contents of index
register, the default segments are DS and ES for SI and DI respectively.
 Based Indexed Addressing Mode:
This is same as register indirect, but the effective address of the
operand is formed by adding contents of base register to the index
registers. DS and ES are default segments, SI and DI are used as index
registers and BX and BP are used as base registers.
Example: MOV AX, [BX][SI]
Instruction Register
Base Index Index EA Memory
Register + Datum
unit-2 6
Base Address
 DATA ADDRESSING MODES
 Register Relative Addressing Mode:
The address of the operand is formed by adding 8-bit or
16-bit displacement with the contents of any one of the
registers BX,BP,SI,DI in the default segments.
Example: MOV AX,50[BX] / MOV AX,[50][BX]
Instruction

Register Displacement
EA Memory
Register + Datum

Address

unit-2 7
 DATA ADDRESSING MODES
 Relative Based Indexed Addressing Mode:
The address of the operand is formed by adding 8-bit or
16-bit displacement with the contents of any one of the
base registers( i.e. BX/BP) and index register (i.e.
SI/DI) in the default segments.
Example: MOV AX, 50[BX][SI]
Instruction
Base Index Displacement
Register
Memory Index + Datum

Register
Base

unit-2 8
 Program Memory Access Addressing Modes
 The Program memory access addressing modes explains about
the transfer of control to some other location which is not in
sequence hence is applicable to control transfer instructions and is
sometimes known as Control Transfer Addressing Modes.
 The control transfer instructions, the addressing modes depend
upon whether the destination location is within the same segment
or in different segment. It also depends upon the method of
passing the destination address to the processor .
 The various control transfer addressing modes are:
1. Intra-segment Direct
2. Intra-segment Indirect
3. Inter-segment Direct
4. Inter-segment Indirect

 If the location to which the control is to be transferred lies in the

same segment as the current location then it is called Intra-
segment mode and if the destination lies in a different segment
then it is known as Inter-segment mode.

unit-2 9
 Program Memory Access Addressing Modes
 Intra-Segment Direct Addressing Mode:
the address to which the control is to be transferred lies in the same
segment in which the control transfer instruction lies and appears directly in
the instruction as an immediate displacement value .The displacement is
computed relative to the contents of IP. The EA is sum of 8-bit or 16-bit
displacement and current contents of the IP.
Instruction
EA
Displacement

+
IP
The effective address to which the control will be transferred is given by the
sum of 8 or 16-bit displacement and current contents of IP.In case of jump
instruction, if the signed displacement (d) is of 8-bits(i.e.,-128<d<+127), we
term it as Short jump and if it is of 16-bits(i.e., -32768<d<+32767), it is
termed as Long jump.
Example : JMP SHORT Label
unit-2 10
 Program Memory Access Addressing Modes
 Intra-Segment Indirect Addressing Mode:
The displacement to which the control is to be transferred is in the
same segment in which the control is transfer instruction lies but it
is passed to the instruction indirectly. The branch address is found
as the content of a register or a memory location.This addressing
mode is used in unconditional branch instructions.
Example: JMP [BX]

Register
Effective
Instruction EA Branch Address
Compta-
Addressing tion
Mode Memory
Effective
Branch Address

unit-2 11
 Program Memory Access Addressing Modes
 Inter-segment Direct Addressing Mode;
In this mode, the address to which the control is to be transferred is in
a different segment. This addressing mode Provides a means of
branching from one code segment to another code segment.Here the
CS and IP of the destination address are specified directly in the
instruction
Example: JMP 5000H:2000H
[CS]:5000H,[IP]:2000H
 Inter-segment Indirect Addressing Mode:
In this mode, the address to which the control is to be transferred lies
in a different segment and it is passed to the instruction
indirectly,i.e.,contents of a memory block containing four bytes,
i.e.,IP(LSB),IP(MSB),CS(LSB), CS(MSB) sequentially. The starting
address of the memory block may be referred using any of the
addressing modes,except immediate addressing mode.
Example: JMP [2000H]
[IP]=[DS:2001H,DS:2000H],[CS]=[DS:2004H,DS:2003H]
unit-2 12
 PORT ADDRESSING MODES
 Port addressing modes explains about how the
I/O ports are accessed by the program.
 Port addressing modes are of two types:
1. Direct I/O Port addressing mode
2. Indirect I/O Port addressing mode
 Direct Port addressing mode:
o Used to access data from standard I/O mapped
devices or ports.
o An 8-bit port address is directly specified in the
instruction.
o Example: IN AL,[09H]
unit-2 13
 PORT ADDRESSING MODES
 Indirect Port addressing Mode:
o Used to access data from standard I/O mapped devices
or ports .
o The name of the register which holds the port address
is specified in the instruction.
o In 8086, the 16-bit port address is stored in DX register.
o Example: OUT [DX],AX

unit-2 14
 STRING ADDRESSING MODE
 This addressing mode is employed in string instructions to operate on
string data .In string addressing mode the effective address (EA) of
source data is stored in SI register and the EA of destination data is
stored in DI register.
 The segment register used for calculating base address for source data
is DS register and can be overridden. The segment register used for
calculating base address for destination data is ES register and cannot
be overridden.
 The addressing mode also supports auto increment/decrement of index
registers SI and DI depending on direction flag (DF).
 If DF= 1 then the contents of index registers are decremented to point to
the next byte/word of the string after execution of a string instructions.
 If DF = 0 , then the contents of index registers are incremented to point
to next byte/word.
 Example: MOVSB (move string byte)
EA=[SI],BA= [DS]X1610 , MA (memory Address) = EA + BA.
EAE = [DI],BAE = [ES] X 1610 , MAE = EAE + BAE.
[MAE] [MA] ; If DF = 1 [SI] = [SI] -1, [DI] = [DI] – 1;
If DF = 0unit-2
[SI] = [SI] +1, [DI] = [DI] + 1; 15
 RELATIVE ADDRESSING MODE
 In this addressing mode the effective address of a
program instruction is specified relative to instruction
pointer (IP) by an 8-bit signed displacement.
Example: JZ 0AH
0AH is sign extended to 000AH.
If ZF = 1 then (IP) = (IP)+000AH;
EA = (IP) + 000AH
BA = (CS) X 16 10
MA = BA + EA.

unit-2 16
 IMPLIED ADDRESSING MODE
 In implied addressing mode, the instruction itself will
specify the data to be operated by the instruction.
Example: CLC (clear carry flag)
CF 0

unit-2 17
 Instruction Formats Of 8086
 A machine language format has one or more number of fields
associated with it.
 The first field is called as operation code(Opcode) field,
which indicates the type of the operation to be performed by
the CPU.
 The instruction format also contains other fields known as
Operand(data) fields. The CPU executes the instruction using
the information which resides in these fields.
 There are six general formats of instructions in 8086
instruction set. The length of an instruction may vary from
one byte to six bytes.
 The instruction formats are also known as instruction
templates.

18
 Instruction Formats
 One Byte Instruction Format:
This format is only one byte long and may have the implied data or
register operands.
The least significant 3-bits of the opcode are used for specifying the
register operand, if any.Otherwise, all the 8-bits form an opcode and
the operands are implied.
7 0 7 0
Opcode or Opcode W

7 0 7 32 0
or
Opcode Z Opcode Reg.

19
 Instruction Formats
 Two Byte Instruction:
Used for Register to register and register to/from memory with no
displacement.
This format is 2 byte long
The first byte of the code specifies the operation code and the width of
the operand specified by W bit.
The second byte of the code shows the register operands and R/M
field.
The register specified by Reg. field is one operand and the R/M field
specifies another register or memory location i.e., the other operand.
The mod field will be specifying the addressing mode of the operand.
7 2 1 0 7 6 5 3 2 0
opcode D W Mod Reg. R/M
(or)

7 opcode2 1 V 0 W 6 5 Reg.
7 Mod 3 2 R/M0
20
 Instruction Formats
 Three Byte Instruction:
Used for register to/from memory with 8-bit displacement or 8-bit
immediate data.
This format is 3 byte long
The first two bytes are similar to the two byte instruction format, and
have all the fields of two bytes same.
7 2 1 0 7 6 5 3 2 0 7
0
opcode D W Mod Reg. R/M Disp-8

(or)
7 opcode D W2 1 0 Mod 7Reg.6 5 R/M3 2 0 Data-8
7
0

21
 Instruction Formats
 Four Byte Instruction:
Used for register to/from memory with 16-bit displacement and also
for 16-bit immediate data to Register/Memory .
This format is 4 byte long
The format of instruction for register to/from memory with 16-bit
displacement, there will be two bytes of displacement along with the
first two bytes similar to two byte instruction,its format is as shown
below:
7 2 1 0 7 6 5 3 2 0 7
0
opcode D W Mod Reg. R/M Disp. Lower Byte

Disp. Higher Byte

7 0

22
 Instruction Formats
 Four Byte Instruction:
The format of instruction for moving 16-bit immediate data to
register/memory will have the first byte as well as the 3-bits of second
byte which were used for Reg. field by two byte instruction as opcode
fields.
The following bytes i.e., third and fourth bytes as 16-bit immediate
data.
The format of instruction for moving 16-bit immediate data to
register/memory will have the following template.
7 2 1 0 7 6 5 3 2 0 7
0
opcode D W Mod Reg. R/M Data Lower Byte

Data Higher Byte

7 0

23
 Instruction Formats
 Five Byte Instruction:
Used for moving immediate 8-bit data to memory with 16-bit displacement.
This is five byte long template.
The format of instruction will have the first byte as well as the 3-bits of
second byte which were used for Reg. field by two byte instruction as
opcode fields.
The next two bytes will be the 16-bit displacement bytes.
The last byte is an 8-bit data.
The format of the template is:
7 2 1 0 7 6 5 3 2 0 7
0
opcode D W Mod Reg. R/M Disp. Lower Byte

7 0 7 0
Disp. Higher Byte Data Byte

24
 Instruction Formats
 Six Byte Instruction:
Used for moving immediate 16-bit data to memory with 16-bit displacement.
This is six byte long template.
The format of instruction will have the first byte as well as the 3-bits of
second byte which were used for Reg. field by two byte instruction as
opcode fields.
The next two bytes will be the 16-bit displacement bytes.
The next two bytes is 16-bit data.
The format of the template is:
7 2 1 0 7 6 5 3 2 0 7
opcode 0 W
D Mod Reg. R/M Disp. Lower Byte

Disp. Higher Byte Lower Data Byte Higher Data Byte

7 0 7 0 7 0
25
 Instruction Formats
 The templates have the single bit indicators their significance
is as given below:
o W-bit: indicates whether the instruction is to operate over an 8-bit or
16-bit data/operand.
W=0 if the operand is of 8-bit,W=1 if the operand is of 16-bit .
o D-bit: destination
D=0, If the register specified by REG field is source operand.
D=1, If the register specified by REG field is destination operand.
o S-bit: Sign extension bit
if s=0,w=0 => 8-bit operation with 8-bit immediate operand
if s=0,w=1 => 16-bit operation with 16-bit immediate
operand
if s=1,w=1 => 16-bit operation with a sign extended immediate
data.
o V-bit: used in case of shift & rotate instruction
v=0 if shift count is 1
v=1 if CL contains shift count 26
 Instruction Formats
 The templates have the single bit indicators their significance is as given
below:
o Z-bit: used by REP instruction to control the loop.
If z=1, REP prefix is executed until zero flag matches the Z-bit.
 Reg. field:
This 3-bit reg. field is used to indicate the source or destination of operand along
with d-bit. If d=0, then the register specified by reg. field is source operand. If d=1,
then the register specified by reg. field is destination operand. The register can be
8-bit/16-bit register as specified by the w-bit.
 R/M field :
This 3-bit field is used to indicate the source or destination of operand. If
register specified by reg. field is source of operand then r/m field is used to
indicate destination operand or vice versa.
 Mod field :
This 2-bit mod field defines the method of addressing the operand
specified by the r/m field.

27
 Instruction Formats
 Codes for Mod field

Code for Mod Name of the Mode

Field
00 Memory mode with
No displacement
01 Memory mode with an 8-bit
signed displacement
10 Memory mode with 16-bit
unsigned displacement
11 Register Mode

28
 Instruction Formats
 Codes for Segment Registers

Code for SEG. Name of the SEG.

Registers Register
00 ES
01 CS
10 SS
11 DS

 Usually all the addressing modes have DS as default segment, but the
instructions/Addressing modes using SP and BP for Effective Address
calculation use Stack segment as default segment.

29
 Instruction Formats
 Codes for Reg. field

Code for Name of the register represented by code

Reg. field when W= 0 or 1
When W = 0 When W = 1

000 AL AX
001 CL CX
010 DL DX
011 BL BX
100 AH SP
101 CH BP
110 DH SI
111 BH DI

30
 Instruction Formats
 Codes for R/M field

Code for Effective Address calculation when Mod = 00/01/10

R/M field Mod = 00 Mod = 01 Mod = 10

000 [BX + SI] [BX + SI + Disp.8] [BX + SI + Disp.16]

001 [BX + DI] [BX + DI + Disp.8] [BX + DI + Disp.16]
010 [BP + SI] [BP + SI + Disp.8] [BP + SI + Disp.16]
011 [BP + DI] [BP + DI + disp.8] [BP + DI + disp.16]
100 [SI] [SI + disp.8] [SI + disp.16]
101 [DI] [DI + disp.8] [DI + disp.16]
110 [DISP. 16] [BP + Disp.8] [BP + Disp.16]
111 [BX] [BX + Disp.8] [BX + Disp.16]

 Disp.8  8-bit signed displacement

Disp.16  16-bit unsigned displacement
31
 Instruction set of 8086
• The instruction set of 8086 can be classified into
following groups
1.Data transfer instructions
2. Arithmetic instructions
3. Bit manipulation instructions
4. String instructions
5.Program execution transfer instructions
6. Processor control instructions
• The data transfer instructions can be classified into
following categories
1. General purpose byte / word transfer instructions
2.Simple input and output port transfer instructions
3. Special address transfer instructions
4. Flag transfer instructions
instruction set 32
 Data transfer instructions
• The functions of data transfer instructions is
1. Copy the contents of a register to another register.
2. Copy the contents of a register to memory or vice-versa.
3. Load the immediate operand to memory/register
4. Copy the contents of a register/ memory to segment
registers (excluding CS register) or vice-versa.
5. Exchange the contents of two registers or register and
memory.
6. Copy the contents of accumulator to port or vice-versa.
7. Load the effective address in segment registers.

• The data transfer instructions generally involve two

operands i.e. Source operand and Destination operand.

instruction set 33
 Data transfer instructions
• The Source and Destination operand should be of same
size i.e. both the operands should be either 8-bits (byte)
or 16-bit (word).
• Only 8-bit word can be moved to a 8-bit register/memory
or a 16-bit word can be moved to 16-bit register/memory.
• Moving the contents of 8-bit register to 16-bit register/
memory or vice-versa is illegal.
• The Source can be a register or a memory location or an
immediate data.
• The destination can be a register or a memory location.
• In double operand instructions the source and destination
cannot refer to memory locations in the same instruction.

instruction set 34
 Data transfer instructions
• Copying the contents of one memory location to
another memory location in a single instruction is not
possible (except push instruction).
• The data transfer instructions (except POPF & SAHF
instructions) do not affect any flags of 8086.
• While executing the POPF instruction, the previously
stored status of flag is restored in the flag register.
• The instruction SAHF is used to modify the content of
flag register.
• For XCHG instruction, at least one of the operands
must be a register, but neither operand can be a
segment register.

instruction set 35
 Data transfer instructions
• General purpose byte or word transfer instructions:
1) MOV
2) PUSH
3) POP
4) XCHG
5) XLAT
• MOV: Copy byte or word from specified source to specified
destination.
Format: MOV <dest>, <source>
Operation: (dest)  (source)
Examples: MOV Reg2, Reg1
MOV AL, Mem
MOV Seg reg, Mem

instruction set 36
 Data transfer instructions
General purpose byte or word transfer instructions
• PUSH: Copy specified word to top of the stack
Format: PUSH < source >
Operation: (SP)  (SP) – 2
(PA)stack = (SS) X 1610 + (SP)
(PA; PA+1)  source
The stack point is decremented by 2 and the contents
of the source are transferred to stack memory
pointed by stack pointer
Examples: PUSH Reg16
PUSH Mem
PUSH Seg reg

instruction set 37
 Data transfer instructions
General purpose byte or word transfer instructions
• POP: Copy word from top of the stack to specified
location
Format: POP < destination >
Operation: (PA) = (SS) X 1610 + (SP)
destination  (PA; PA+1)
(SP)  (SP) + 2

The contents of 16-bit stack memory pointed by SP is

moved to destination and the stack pointer is
incremented by 2
Examples: POP Reg16
POP Mem
POP Seg reg
instruction set 38
 Data transfer instructions
General purpose byte or word transfer instructions

• XCHG: Exchange bytes or words between 2 registers

or a register and memory location
Format: XCHG < destination > , < source >
Operation: (destination)  (Source)

Examples: XCHG Reg1, Reg2

XCHG Mem, Reg
XCHG AX, Reg16

instruction set 39
 Data transfer instructions
General purpose byte or word transfer instructions
• XLAT: Translate a byte in AL, using a table in memory
Format: XLAT
Operation: PA = DS X 1610 + (BX) + (AL)
(AL)  (PA)
This instruction is used to translate a byte from one code to
another code
The instruction replaces a byte in the AL register with a byte
pointed to by BX register in a look up table in memory
Before executing XLAT instruction, the look up table is to be put
into memory and the starting address of the look up table has to
be loaded into BX register
Examples: ASCII value of 0-9 is 30-39 and EBCDIC is 0-9.
Hence to convert EBCDIC code in ASCII, the ASCII values of the
0-9 has to be stored say from 2000H, then save 2000H in BX.
instruction set 40
 Data transfer instructions
Simple input and output port transfer instructions
IN & OUT
• IN : Copy a byte or word from specified port to
accumulator.
Format : IN <Accumulator>, <Source>
Example : IN AL/AX,[DX]
(AL/AX)  ( Port)
the contents of 8-bit port whose address is specified
by DX register is transferred to 8-bit accumulator
(AL/AX)
IN AL/AX, addr8
(AL/AX)  (addr8)
The contents of 8-bit port whose address is given in the
instruction is transferred to accumulator (AL/AX)
instruction set 41
 Data transfer instructions
Simple input and output port transfer instructions

• OUT : copy a byte or word from accumulator to

specified port.
Format : OUT <Destination>, AL/AX
(port)  AL/AX
Example: OUT [DX],AL/AX
The contents of accumulator is transferred to the
specified port whose address is given in DX register.
OUT addr8,AL/AX
The contents of accumulator are transferred to the port
whose address is specified in the instruction.

instruction set 42
 Data transfer instructions
Special Address transfer instructions

Special address transfer instructions

LEA, LDS & LES
• LEA : Load effective address of operand into
specified register.
LEA Reg16,Mem
(Reg16)  EA
The 16-bit register is loaded with the effective address
(EA) of the memory location specified by the
instruction.

instruction set 43
 Data transfer instructions
Special Address transfer instructions
• LDS : Load DS register and the other specified register from
memory.
LDS Reg16,Mem
(Reg16)  (Mem)
(DS)  (Mem+2)
Copies a word from two memory locations into the register specified
in the instruction,it then copies a word from the next two memory
locations into the DS register.
• LES : Load ES register and the other specified register from
memory.
LES Reg16,Mem
(Reg16)  (Mem)
(ES)  (Mem+2)
Copies a word from two memory locations into the register specified
in the instruction,it then copies a word from the next two memory
locations into the ES register.
instruction set 44
 Data transfer instructions
Flag Transfer instructions

Flag Transfer Instructions

LAHF,SAHF,PUSHF&POPF
• LAHF: Load AH wit6h the low byte of the flag register.
(AH)  (lower byte of flag register)
The contents of the lower byte of flag register is transferred to
the higher byte register of the accumulator.
• SAHF: Store (copy) AH register to Low byte of flag register.
(Lower byte of flag register)  (AH)
The content of the higher byte register of the accumulator is
moved to lower byte flag register.

instruction set 45
 Data transfer instructions
Flag Transfer instructions
• PUSHF: Push (copy) the flag register to the top of the stack.
(sp)  (sp)-2
MAs = (ss) X 1610 + (sp)
(MAs; MAs + 1)  (flags)
the stack pointer is decremented by two and the contents of the
16-bit flag register is pushed to stack memory to pointed by the
SP.
• POPF:
MAs = (ss) X 1610 + (sp)
(flags)  (MAs; MAs + 1)
(sp)  (sp) + 2
The contents of (16-bit) stack memory pointed by the SP is
moved to flag register and the stack pointer is incremented by 2.
instruction set 46
 ARITHMETIC INSTRUCTIONS
• The Arithmetic instructions can be classified into following
categories
1. Addition instructions
2. Subtraction instructions
3. Multiplication instructions
4. Division instructions
• The arithmetic operands involve two operands i.e., source and
destination.
• The result of the arithmetic operations is stored in destination
register or memory location except in the case of comparison. (in
comparison the result is used only to update the flags and then it
is discarded).
• Performing arithmetic operations directly on two operands in two
memory locations is not possible.
• In immediate addressing mode arithmetic operations is the
data/operand is not matching with the size of register then the
operation will be performed on sign extended data.
instruction set 47
 ARITHMETIC INSTRUCTIONS
Addition instructions
• The arithmetic instructions alter the flags, the result is used to
update the flags.

Addition instruction
ADD,ADC,INC,AAA,DAA
ADD: Add
ADD Reg1,Reg2  Reg1 = Reg1. + Reg2.
the contents of two registers or a immediate data to register
or contents of one memory location to a register contents
are added.
The ADD instruction affects all conditional flags depending
on the result of operation.
Example: ADD AX,BX

instruction set 48
 ARITHMETIC INSTRUCTIONS
Addition instructions
ADC: Add with carry
ADC Reg1. ,Reg2  Reg1 + Reg2 + [CY]
the contents of two registers or a immediate data to register or
contents of one memory location to a register contents along with
carry flag contents are added.
The ADC instruction affects all conditional flags depending on
the result of operation.
Example: ADC AX,BX
INC : Increment
INC <source>
This instruction increases the contents of the specified register or
memory location i.e., source by 1.
This instruction affects all conditional flags except the carry flag.
This instruction adds 1 to the contents of the operand.
Immediate data cannot be operand of this instruction.
Example: INC BX
INC [5000H]
instruction set 49
 ARITHMETIC INSTRUCTIONS
Addition instructions
AAA : ASCII Adjust after Addition
The AAA instruction is executed after an ADD instruction that adds
two ASCII coded operands to give a byte of result in AL. The AAA
instruction converts the resulting contents of AL to unpacked decimal
digits.

After the addition the AAA instruction examines the lower 4-bits of AL
to check whether it contains a valid BCD between 0 to 9.

If the contents of AL is between 0 to 9 and AF = 0, AAA sets the 4

higher order bits of AL to 0.The AH must be cleared before addition.

If the lower digit of AL is between 0 to 9 and AF = 1, 06 is added to

AL, The upper 4 bits of AL are cleared and AH is incremented by one

If the value in the lower nibble is greater than 9 then the AL is

incremented by 06,AH is incremented by 1,the AF and CF flags are
set to 1, and the higher nibble of AL is cleared to 0.
instruction set 50
 ARITHMETIC INSTRUCTIONS
Addition instructions
• Example: 1) AL = 67 (before AAA)
AL = 07(after AAA)
2) AL = 6A; AH = 00 (before AAA)
A > 9 ,hence A + 6 = 1010 + 0110
= 10000B = 10H & AF
=1

Thus before AAA instruction AX = 006AH

After the execution of AAA instruction AX = 0100 and after

OR’ing the contents of AX with 3030H then AX = 3130H which is
equivalent to ASCII equivalent of BCD number 10.

instruction set 51
 ARITHMETIC INSTRUCTIONS
Addition instructions
DAA : Decimal adjust Accumulator
This instruction is used to convert the result of the addition of
two packed numbers to a valid BCD number,but the result
has to be only in AL.
If the lower nibble is greater than 9, after addition or if AF is
set, it will add 06H to the lower nibble in AL. After adding 06
in the lower nibble of AL is greater than 9 or if carry flag is
set, DAA instruction adds 60H to AL.
The DAA instruction affects AF,CF,PF and ZF flags. The OF
is undefined.
Example: AL = 53, CL = 29
ADD AL,CL ; AL <- (AL) + (CL)
AL = 53 + 29 = 7C H
After DAA AL <- 7C + 06 H
AL = 82

instruction set 52
 ARITHMETIC INSTRUCTIONS
Addition instructions
Example:
AL = 73 and CL = 29
ADD AL,CL
AL <- AL + CL
AL <- 73 + 29
AL <- 9C H
DAA
AL <- 02 and CF = 1
AL  73
CL  + 29
9C
+ 06
A2
+ 60
CF = 1 02 in AL

instruction set 53
 ARITHMETIC INSTRUCTIONS
Subtraction instructions

Subtraction instructions:
SUB, SBB, DEC, NEG, CMP, AAS, DAS
o SUB : subtraction
SUB X,Y
X = X – Y, X  destination, Y - source
This instruction subtracts the source operand from the
destination operand and the result is stored in destination.
the source operand may be a register or a memory location
or an immediate data and the destination operand may be a
register or a memory location, but source and destination
operand both must not be memory operands.The destination
operand cannot be an immediate data.
All the conditional flags are affected by SUB instruction.
Example: SUB BX,DX

instruction set 54
 ARITHMETIC INSTRUCTIONS
Subtraction instructions
o SBB : Subtract with Borrow
SBB X,Y
X = X – Y – BW(CY) X  destination, Y  Source,
BW  Borrow i.e., Carry flag contents.

The subtract with borrow instruction subtracts the source

operand
and borrow flag(CF) which may reflect the result of the previous
calculations , from the destination operand.

Subtraction with borrow is equivalent to subtracting 1 from

the result of SUB (subtraction) operation when the carry flag is
set.

The result is stored in the destination operand.

All the flags are affected (conditional flags) by this instruction.

Example: SBB CX,DX
instruction set 55
 ARITHMETIC INSTRUCTIONS
Subtraction instructions
o DEC : Decrement

DEC <Destination>

The decrement instruction subtracts 1 from the contents of

the specified register or memory location.

All the conditional flags except the carry flag are affected
depending upon the result

Immediate data cannot be operand of the instruction.

Example : DEC AX

instruction set 56
 ARITHMETIC INSTRUCTIONS
Subtraction instructions
o NEG : Negate
NEG Mem./Reg.
The negate instruction forms 2’s complement of the
specified destination in the instruction.
For obtaining 2’s complement,it subtracts the contents of
destination from 0(zero).
The result is stored back in the destination operand which
may be a register or a memory location.
Using NEG instruction if the OF flag is set, it will indicate that
the operation was not successfully completed.
The NEG instruction affects all conditional flags.
Example:NEG BX

instruction set 57
 ARITHMETIC INSTRUCTIONS
Subtraction instructions
o CMP :Compare
CMP X,Y ; X  Destination, Y  Source

This instruction compares the source operand, which may be a

register or an immediate data or memory location, with a destination
operand that may be a register or a memory location.
For comparison, it subtracts the source operand from the
destination operand but does not store the result any where.
The flags are affected depending upon the result of the subtraction.
ZF = 1; when the source and destination operands are equal.
CF = 1; when source operand is greater than the destination
operand.
CF = 0; when destination operand is greater than source
operand

Example: CMP AX , 1098 H

CMP AX, BX

instruction set 58
 ARITHMETIC INSTRUCTIONS
Subtraction instructions

o AAS : ASCII adjust AL after subtraction

AAS
AAS instruction corrects the result in AL register after
subtracting two Unpacked ASCII operands.
The result is in unpacked decimal format.If the lower 4-bits
of AL register are greater than 9 or if the AF flag is 1,The AL
is decremented by 6 and AH register is decremented by 1,
the CF and AF are set to 1.
Otherwise, the CF and AF are set to 0, the result needs no
correction.
As a result, the upper nibble of AL is 00 and the lower nibble
may be any number from 0 to 9.
the procedure is similar to the AAA instruction except for
subtraction of 06 from AL. AH is modified as difference of the
previous contents(usually zero) of AH and borrow for
adjustment.

instruction set 59
 ARITHMETIC INSTRUCTIONS
Subtraction instructions

o DAS: Decimal adjust after subtraction

DAS
The instruction converts the result of subtraction of two packed
BCD numbers to a valid BCD number.
The subtraction has to be in AL only.
If the lower nibble of AL is greater than 9, this instruction will
subtract06 from the lower nibble of AL. If the result of
subtraction sets the carry flag or if upper nibble is greater than
9, it subtracts 60 H from AL.
DAS instruction modifies the AF,CF,SF,PF and ZF flags. The OF
flag is undefined after DAS instruction.
DAA and DAS instructions are also called packed BCD
arithmetic instructions.

instruction set 60
 ARITHMETIC INSTRUCTIONS
Subtraction instructions
• Example:
• (1) AL = 75, BL = 46
SUB AL,BL ; AL  2F = (AL) – (BL)
; AF = 1
DAS ; AL  29 ( as F > 9, F-6 = 9)

(2) AL = 38 , DL = 61
SUB AL , DL ; AL  D7 & CF = 1(borrow)
DAS ; AL  77 (as D > 9 , D-6 = 7)
; CF = 1 (borrow)

instruction set 61
 ARITHMETIC INSTRUCTIONS
Multiplication instructions
Multiplication instructions:
MUL, IMUL, AAM
o MUL : Unsigned Multiplication of byte or word.
MUL Reg. / Mem.
This instruction multiplies an unsigned byte or word by the contents
of AL.
The Unsigned byte or word may be in any one of the general
purpose registers or memory locations.
For Byte multiplication the most significant byte will be stored in AH
register and least significant byte is stored in AL register.
For Word multiplication the most significant word of the result is
stored in DX, while the least significant word of the result is stored
in AX register
All the flags are modified depending upon the result of the
operation.
Immediate operand is not allowed in this instruction.
If the most significant byte or word of result is ‘0’ CF and OF both
will be set.
Example: MUL BL
instruction set 62
MUL BX
 ARITHMETIC INSTRUCTIONS
Multiplication instructions
 IMUL : Signed Multiplication.
This instruction multiplies a signed byte in source operand by a
signed byte in AL register or A signed word in AX register.
The source can be a general purpose register, memory
operand,index register or base register, but it cannot be an
immediate data.
While using this instruction the content of accumulator and
register should be sign extended binary in 2’s complement form
and the result is also in sign extended binary.
In case of 32-bit results, the higher order word(MSW) is stored in
DX and lower order word is stored in AX
In case of 16-bit result it will be stored in AX register.
The AF, PF, SF, and ZF flags are undefined after IMUL instruction
execution.
If AH and DX contains parts of 16-bit and 32-bit result
respectively, CF and OF both will be set.
The AL and AX are the implicit operands in case of 8 –bits and
16-bits multiplication respectively.
The unsigned higher bits of the result are filled by sign bit and
CF,AF are cleared.
Example: IMUL BL / IMUL instruction
BX set 63
 ARITHMETIC INSTRUCTIONS
Multiplication instructions
 AAM : ASCII Adjust after Multiplication
This instruction after execution, converts the product available
in AL into unpacked BCD format.
The AAM instruction follows a multiplication instruction that
multiplies two unpacked BCD operands, i.e., higher nibbles of
the multiplication operands should be ‘0’.The multiplication of
such operands is carried out using MUL instruction.
The result of the multiplication will be available in AX.
(AH) = (AL)  0A H
(AL) = (AL) MOD 0A H
The AAM instruction replaces the contents of AH by tens of
decimal multiplication and AL by singles of the decimal
multiplication.
MOV AL, 04 ; AL  04
MOV BL, 09 ; BL  09
MUL BL; AH:AL  24 H (9 X 4)
AAM ; AH  03
; AL 06
instruction set 64
 ARITHMETIC INSTRUCTIONS
Division instructions
Division instructions: DIV, IDIV, AAD, CBW, CWD
o DIV : Unsigned division
DIV <reg./Mem>
This instruction performs unsigned division. It divides an
unsigned word or double word by a 16-bit or 8-bit operand.
The dividend must be in AX for 16-bit operation and the
divisor may be specified using any one of the addressing
modes except immediate.
The dividend for 32-bit operation will be in DX:AX register
pair (Most significant word in DX and least significant word in
AX).
All the flags are undefined for DIV instruction.
The result of division is for 16-bit number divided by 8-bit
number the Quotient will be in AL register and the remainder
will be in AH register similarly for 32-bit number divided by
16-bit number the Quotient will be in AX register and the
remainder will be in DX register.
If the result is too big to fit into AL or AX register then Type-0
(divide by zero) interrupt is generated and the ISR for the
Type zero will be executed such that correction steps are
taken to accommodateinstruction
the result.
set 65
 ARITHMETIC INSTRUCTIONS
Division instructions

 For 16-bit  8-bit

(AL)  (AX)  (reg.-8) ; Quotient
reg.-8 : 8 – bit register
(AH)  (AX) Mod (reg.-8) ; Remainder

 For 32-bit  16-bit

(AX)  (DX)(AX)  (reg.-16) ; Quotient
(DX)  (DX)(AX) Mod (reg.-16) ; Remainder
Reg.-16 : 16 – bit register
Example: DIV AX/ DIV [BX]

instruction set 66
 ARITHMETIC INSTRUCTIONS
Division instructions
o IDIV : signed division
IDIV <reg./Mem>
This instruction performs signed division. It divides an signed word or
double word by a signed 16-bit or 8-bit operand.
While using IDIV instruction the contents of accumulator and register
should be sign extended binary.
The signed dividend must be in AX for 16-bit operation and the signed
divisor may be specified using any one of the addressing modes
except immediate.
The signed dividend for 32-bit operation will be in DX:AX register pair
(Most significant word in DX and least significant word in AX).
All the flags are undefined for IDIV instruction.
The sign of the quotient depends on the sign of dividend and divisor.
The sign of remainder will be same as that of dividend.
The result of division of signed division is also stored in the same way
as the result of unsigned division but the sign of the quotient and
remainder depends on the sign of dividend and divisor.
If the result is too big to fit into AL or AX register then Type-0 (divide by
zero) interrupt is generated and the ISR for the Type zero will be
executed such that correction steps are taken to accommodate the
instruction set 67
result.
 ARITHMETIC INSTRUCTIONS
Division instructions

• AAD: ASCII adjust before division

The AAD instruction converts two unpacked BCD digits in AH
and AL .
The ASCII adjustment must be made before dividing the two
unpacked BCD digits in AX by an unpacked BCD byte.
After execution of AAD instruction PF,SF,ZF are modified but
AF,CF and OF are not defined.
The AAD instruction has to be used before DIV instruction is
used in the program.
(AL)  (AH) X 1610 + (AL)
(AH)  00H
Example: AX = 0508
After executing AAD instruction AX = 3A ; As 58D =
3AH
All the ASCII adjust instructions are also called as unpacked
BCD arithmetic instructions.

instruction set 68
 ARITHMETIC INSTRUCTIONS
Division instructions

o CBW : Convert signed byte or word

This instruction converts a signed byte to a signed word i.e., it
copies the sign bit of a byte to be converted to all the bits in
the higher byte of the result word.
The byte to be converted will be in AL register and the result
will be in AX register
CBW is used before signed division.
CBW does not affect any flags.
Using bit-7 of AL is moved to all the bits of AH register.
1. If AL = 1xxx xxxx (i.e.,  80H )
Then AH  1111 1111(FFH)
2. If AL = 0xxx xxxx (i.e., < 80H)
Then AH  0000 0000 (00H)

instruction set 69
 ARITHMETIC INSTRUCTIONS
Division instructions

o CWD : Convert signed word to double word

CWD instruction copies the sign bit of AX to all the bits of DX
register
This operation is to be done before signed division.
CWD is used for sign extension of 16-bit number into 32-bit
number.
CWD does not affect any flags.
Bit-15 of AX is moved to all the bits of DX register.
1. If AX = 1xxx xxxx xxxx xxxx (i.e.,  8000H)
then DX  1111 1111 1111 1111 (FFFFH)
2. If AX = 0xxx xxxx xxxx xxxx (i.e. < 8000H)
then DX  0000 0000 0000 0000 (0000H)

instruction set 70
 Bit Manipulation Instructions
 The Logical group includes instructions for performing AND, OR,
EX-OR, complement, shift and rotate operations on binary data.
The mnemonics used for logical instructions are AND, OR, XOR,
TEST etc……….
 The Logical instructions except shift and rotate involve two
operands i.e., source and destination operand.
 The source operand can be a register or memory location or
immediate data.
 The destination operand can be a register or memory location.
 The result of the logical operation is stored in destination register
or memory except in the case of TEST instruction , for which the
result is used only to modify the flags and then the result is
discarded.
 In double operand logical instructions, both the source and
destination cannot refer to memory locations in the same
instruction . Thus performing logical operation on two memory
bytes or words simultaneously is not possible.
 In double operand logical instructions, the source and destination
operand should be of same size, either both the operand size
should be byte or word.
instruction set 71
 Bit Manipulation Instructions
 The Logical instructions alter the flags of 8086.
 The processor uses the result of logical operations to alter the
flags which reflect the status of the result.

 The various categories of Bit manipulation instructions are

1. Logical instructions
2. Shift instructions
3. Rotate instructions

 The various logical instructions are

NOT
AND
OR
XOR
TEST

instruction set 72
 Bit Manipulation Instructions
Logical Instructions
 NOT : Complement / Negation (Invert each bit of operand)
NOT < Destination>
The NOT instruction inverts each bit (forms the 1’s complement)
of the byte or word at the specified destination.
The destination can be a register or a memory location specified
by any one of the addressing mode except for immediate
addressing mode.
No flags are affected by the NOT instruction.
Example: NOT AL
NOT [AX]

instruction set 73
 Bit Manipulation Instructions
Logical Instructions
 AND : Logical AND of corresponding bits of two operands
AND <Destination> , <Source>
This instruction ANDs each bit in a source byte or word (which might
be a register or a memory location or an immediate data) with the
same number bit in a destination (which might be a register or a
memory location) byte or word.
The result is stored in destination operand. At least one of the
operands should be a register or an memory location , but both the
operands cannot be memory locations or immediate operands and
also immediate operand cannot be a destination operand.
The AND operation gives output 1 only when both the inputs are high.
AND AX , 0008H (let [AX] = 4567H
4567 = 0100 0101 0110 0111 ; 0008 = 0000 0000 0000 1000
 4567 AND 0008  0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1
AND                
00 00 00 00 0 000 10 00

00 00 00 00 0 000 10 00=
0008H instruction set 74
 Bit Manipulation Instructions
Logical Instructions
 OR : Logical OR of corresponding bits of two operands
OR <Destination> , <Source>
This instruction ORs each bit in a source byte or word (which might be
a register or a memory location or an immediate data) with the same
number bit in a destination (which might be a register or a memory
location) byte or word.
The result is stored in destination operand. At least one of the
operands should be a register or an memory location , but both the
operands cannot be memory locations or immediate operands and
also immediate operand cannot be a destination operand.
The OR operation gives output 1 when any one of the inputs are high.
OR AX , 0008H (let [AX] = 4567H
4567 = 0100 0101 0110 0111 ; 0008 = 0000 0000 0000 1000
 4567 OR 0008  0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1
OR    
00 00 0000 000 0 1000

01 00 01 01 0110 1 1 1 1 = 456F
H instruction set 75
 Bit Manipulation Instructions
Logical Instructions
 XOR : Logical XOR of corresponding bits of two operands
XOR <Destination> , <Source>
This instruction XORs each bit in a source byte or word (which might be
a register or a memory location or an immediate data) with the same
number bit in a destination (which might be a register or a memory
location) byte or word.
The result is stored in destination operand. At least one of the operands
should be a register or an memory location , but both the operands
cannot be memory locations or immediate operands and also immediate
operand cannot be a destination operand.
The XOR operation gives output 1 only when both the inputs are
dissimilar.
XOR AX , 0018H (let [AX] = 4567H
4567 = 0100 0101 0110 0111 ; 0008 = 0000 0000 0000 1000
 4567 XOR 0018  0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1
XOR                
00 00 0000 000 1 1000

01 00 01 01 0111 1 1 1 1 = 457F H
instruction set 76
 Bit Manipulation Instructions
Logical Instructions
 TEST : Logical Compare instruction( AND operands to update flags)
TEST <Destination> , <Source>
This instruction performs a bit by bit logical AND operation on two
operands.
The source and destination operands are not altered they simply
update the flags.
The result of the ANDing operation is not available for further use,but
flags are affected.The affected flags are OF, CF,SF,ZF and PF.
The TEST instruction is often used to set flags before a conditional
jump instruction.
The source operand can be a register or a memory location or
immediate data.
The destination operand can be either a register or a memory
location .
But both source and destination cannot be memory location.
CF and OF are both 0’s after TEST instruction execution.
AF will be undefined for TEST instruction.

instruction set 77
 Bit Manipulation Instructions
Shift Instructions
Shift instructions
SHL / SAL, SHR, SAR
SHL / SAL : Shift Logical / Arithmetic Left
SHL <reg. / Mem>
CF  R(MSB) ; R(n+1)  R(n) ; R(LSD)  0

CF MSD 0

These instructions shift the operand word or byte bit by bit to the
left and insert zeros in the newly introduced least significant bits.
The number of bits to be shifted if 1 will be specified in the
instruction itself if the count is more than 1 then the count will be
in CL register.
The operand to be shifted can be either register or memory
location contents but cannot be immediate data.
All the flags are affected depending upon the result.The shift
operation will considering using carry flag.
instruction set 78
 Bit Manipulation Instructions
Shift Instructions
SHR : Shift Logical Right
SHR <reg. / Mem>
CF  R(LSB) ; R(n)  R(n+1) ; R(MSD)  0

0 MSD LSD CF

These instructions shift the operand word or byte bit by bit to the
right and insert zeros in the newly introduced Most significant
bits.
The result of the shift operation will be stored in the register
itself.
The number of bits to be shifted if 1 will be specified in the
instruction itself if the count is more than 1 then the count will be
in CL register.
The operand to be shifted can be either register or memory
location contents but cannot be immediate data.
All the flags are affected depending upon the result.The shift
operation will considering using carry flag.
instruction set 79
 Bit Manipulation Instructions
Shift Instructions
SAR : Shift Logical Right
SAR <reg. / Mem> , <count>
CF  R(LSB) ; R(n)  R(n+1) ; R(MSD)  R(MSD)

MSD LSD CF

These instructions shift the operand word or byte bit by bit to the
right.
SAR instruction inserts the most significant bit of the operand in the
newly inserted bit positions.
The result will be stored in the register or memory itself.
The number of bits to be shifted if 1 will be specified in the
instruction itself if the count is more than 1 then the count will be in
CL register.
The operand to be shifted can be either register or memory location
contents but cannot be immediate data.
All the flags are affected depending upon the result.The shift
operation will considering using carrysetflag.
instruction 80
 Bit Manipulation Instructions
Rotate Instructions
Rotate instructions
ROL, RCL, ROR, RCR
 ROL : Rotate left without carry
ROL <Reg. / Mem> , <Count>
R(n+1)  R(n) ; CF  R(MSB) ; R(LSB)  R(MSB)
MSB LSB
CF

This instruction rotates all the bits in a specified word or byte to the left
by the specified count (bit-wise) excluding carry.
The MSB is pushed into the carry flag as well as into LSB at each
operation. The remaining bits are shifted left subsequently by the
specified count positions.
The PF, SF, and ZF flags are left unchanged in this rotate operation .
The operand can be a register or a memory location.
The count will be in instruction if it is 1, and in CL register if greater than
1. instruction set 81
 Bit Manipulation Instructions
Rotate Instructions
 RCL : Rotate left through i.e., with carry
RCL <Reg. / Mem> , <Count>
R(n+1)  R(n) ; CF  R(MSB) ; R(LSB)  CF
MSB LSB

CF

This instruction rotates all the bits in a specified word or byte to the left
by the specified count (bit-wise) including carry.
The MSB is pushed into the CF and CF into LSB at each operation.
The remaining bits are shifted left subsequently by the specified count
positions.
The PF, SF, and ZF flags are left unchanged in this rotate operation .
The operand can be a register or a memory location.
The count will be in instruction if it is 1, and in CL register if greater
than 1.
instruction set 82
 Bit Manipulation Instructions
Rotate Instructions

 ROR : Rotate right without carry

ROR <Reg. / Mem> , <Count>
R(n)  R(n + 1) ; R(MSB)  R(LSB) ; CF  R(LSB)
MSB LSB
CF

This instruction rotates all the bits in a specified word or byte to the right
by the specified count (bit-wise) excluding carry.
The LSB is pushed into the carry flag as well as the MSB at each
operation. The remaining bits are shifted right subsequently by the
specified count positions.
The PF, SF, and ZF flags are left unchanged in this rotate operation .
The operand can be a register or a memory location.
The count will be in instruction if it is 1, and in CL register if greater than
1. instruction set 83
 Bit Manipulation Instructions
Rotate Instructions

 RCR : Rotate right through i.e., with carry

RCR <Reg. / Mem> , <Count>
R(n)  R(n + 1) ; R(MSB)  CF ; CF  R(LSB)
MSB LSB
CF

This instruction rotates all the bits in a specified word or byte to the right
by the specified count (bit-wise) excluding carry.
The LSB is pushed into the carry flag as well as the MSB at each
operation. The remaining bits are shifted right subsequently by the
specified count positions.
The PF, SF, and ZF flags are left unchanged in this rotate operation .
The operand can be a register or a memory location.
The count will be in instruction if it is 1, and in CL register if greater than
1. instruction set 84
 String Instructions
 A string is a sequence of bytes or words i.e., a series of data bytes
or words available in memory at consecutive locations, to be
referred to collectively or individually and is known as byte strings
or word strings.
 For referring to a string, two parameters are required,
 Starting or end address of the string.
 Length of the string.
 The length of the string is usually stored as count in the CX register.
 In case of 8085, the strings are referred by using pointers and
counter arrangement which are modified at each iteration, till the
required condition for proceeding further is satisfied.
 But in the case of 8086, a set of instructions are used for
manipulating the string bytes or words and the index registers are
used as pointers for the source and destination strings (SI and DI
respectively). The pointers are updated i.e., incrementing and
decrementing of the pointers depending on the status of the DF
flag.
 If the pointers are byte pointers then they are updated by one. On
the other hand, if it is a word string operation, the index registers
are updated by two. The counter is decremented by one for both
byte and word strings.
instruction set 85
 String Instructions
 The 8086 instruction set includes instructions for string movement,
comparison, scanning, loading and storing.
 Generally the string instructions have prefix for repeating the execution of
string instructions till the condition is satisfied.
 The string instructions end with “S” or “SB” or “SW” , where “S” represents
string, “SB” represents string byte, “SW” represents string word.
 All the string instructions has implied source and destination operand (i.e.,
the operands are not specified as a part of the instruction).
 The string instructions MOVS and CMPS assume that the source operand
is in data segment memory, and the destination is in extra segment
memory.
 The string instructions STOS and SCANS assumes that the source
operand is in accumulator, and the destination is in extra segment
memory.
 The string instruction LODS assumes that the source operand is in data
segment memory and the destination is accumulator.
 For string operations, the offset or the effective address of the source
operand is stored in SI register and that of destination operand is stored in
DI register.
 On execution of string instruction depending on DF, SI and DI registers
are automatically updated to point to the next byte / word of the source
and destination.If DF = 0 SI and DI are incremented by 1 and if DF = 1
then SI and DI are decremented instruction
by 1. set 86
 String Instructions
 The string instructions are categorized as
1. Prefix instructions
2. String data manipulation instructions

 The Prefix instructions are:

REP
REPE / REPZ
REPNE / REPNZ
 The string data manipulation instructions are :
MOVS / MOVSB / MOVSW
CMPS / CMPSB / CMPSW
SCAS / SCASB / SCASW
LODS / LODSB / LODSW
STOS / STOSB / STOSW

instruction set 87
 String Instructions
Prefix instructions
 REP : Repeat instruction Prefix
The instruction with REP prefix will be executed repeatedly until
the CX register becomes zero( for each iteration CX is
automatically decremented by one).
When CX becomes zero , the execution proceeds to the next
instruction in the sequence.
 REPE / REPZ : Repeat when equal or till ZF = 1.
The instruction with REPE / REPZ prefix will be repeated if CX 
0 and ZF =1 ( for each iteration CX is automatically decremented
by 1).
The repeat operation is terminated if CX = 0 or ZF = 0.
 REPNE / REPNZ : Repeat when not equal or till ZF = 0.
The instruction with REPNE / REPNZ prefix will be repeated if
CX  0 and ZF =0 ( for each iteration CX is automatically
decremented by 1).
The repeat operation is terminated if CX = 0 or ZF = 1.

instruction set 88
 String Instructions
String data byte/word manipulation instructions
 MOVS / MOVSB / MOVSW: Move string byte or word
One byte or word of a string data stored in data segment is copied
into extra segment.
The SI register points to the source string and DI register points to
the destination string.
The CX register is decremented by one for each byte / word
movement.
The SI and DI registers are automatically incremented or
decremented depending on the status of DF.
MA = (DS) X 1610 + (SI)
MAE = (ES) X 1610 + (DI)
(MAE)  (MA)
For byte operation
If DF = 0, then (DI)  (DI) + 1 ; (SI)  (SI) + 1
If DF = 1, then (DI)  (DI) - 1 ; (SI)  (SI) – 1
For word operation
If DF = 0, then (DI)  (DI) + 2 ; (SI)  (SI) + 2
If DF = 1, then (DI)  (DI)instruction
- 2 ; (SI)set (SI) - 2 89
 String Instructions
String data byte/word manipulation instructions
 CMPS / CMPSB / CMPSW: Compare string byte or word
Compare one byte or word of a string data stored in data
segment with that stored in extra segment.
The SI register points to the source string and DI register points
to the destination string.
The CX register is decremented by one for each byte / word
movement.
The SI and DI registers are automatically incremented or
decremented depending on the status of DF.
MA = (DS) X 1610 + (SI)
MAE = (ES) X 1610 + (DI)
Modify flags  (MA) - (MAE)
If (MA) > (MAE) then CF = 0 ; ZF = 0 ; SF = 0
If (MA) < (MAE) then CF = 1 ; ZF = 0 ; SF = 1
If (MA) = (MAE) then CF = 0 ; ZF = 1 ; SF = 0

instruction set 90
 String Instructions
String data byte/word manipulation instructions
 For byte operation
If DF = 0, then (DI)  (DI) + 1 ; (SI)  (SI) + 1
If DF = 1, then (DI)  (DI) - 1 ; (SI)  (SI) – 1
For word operation
If DF = 0, then (DI)  (DI) + 2 ; (SI)  (SI) + 2
If DF = 1, then (DI)  (DI) - 2 ; (SI)  (SI) - 2

instruction set 91
 String Instructions
String data byte/word manipulation instructions
 SCAS / SCASB / SCASW: Scan string byte or String word
One byte or word of a string data stored in extra segment is subtracted
from the contents of AL / AX and the result modifies the flags.
The DI register points to the string byte or word.
The CX register is decremented by one for each byte / word
movement.
The DI register is automatically incremented or decremented
depending on the status of DF.
MA = (DS) X 1610 + (SI)
MAE = (ES) X 1610 + (DI)
Modify flags  (AL) - (MAE) / (AX) - (MAE : MAE + 1)
If (AL) > (MAE) then CF = 0 ; ZF = 0 ; SF = 0
If (AL) < (MAE) then CF = 1 ; ZF = 0 ; SF = 1
If (AL) = (MAE) then CF = 0 ; ZF = 1 ; SF = 0
For byte operation
If DF = 0, then (DI)  (DI) + 1
If DF = 1, then (DI)  (DI) - 1
For word operation
If DF = 0, then (DI)  (DI) + 2
instruction set 92
If DF = 1, then (DI)  (DI) - 2
 String Instructions
String data byte/word manipulation instructions
 LODS / LODSB / LODSW: Load string byte or word into AL
register.
One byte or word of a string data stored in data segment is loaded
or stored into AL / AX register.
The SI register points to the source string .
The SI register is automatically incremented or decremented
depending on the status of DF.
load instruction does not affect any flags.
MA = (DS) X 1610 + (SI)
(AL)  (MA) / (AX)  (MA : MA + 1)
For byte operation
If DF = 0, then (SI)  (SI) + 1
If DF = 1, then (SI)  (SI) – 1
For word operation
If DF = 0, then (SI)  (SI) + 2
If DF = 1, then (SI)  (SI) - 2

instruction set 93
 String Instructions
String data byte/word manipulation instructions
 STOS / STOSB / STOSW: Store string byte or word from AL
register.
One byte or word of a string data stored in AL / AX register is
copied or stored as string data into extra segment.
The DI register points to the destination string.
The DI register is automatically incremented or decremented
depending on the status of DF.
MAE = (ES) X 1610 + (DI)
(MAE)  (AL) / (MAE : MAE + 1)  (AX)
For byte operation
If DF = 0, then (DI)  (DI) + 1
If DF = 1, then (DI)  (DI) - 1
For word operation
If DF = 0, then (DI)  (DI) + 2
If DF = 1, then (DI)  (DI) - 2

instruction set 94
 Processor Control Instructions
 The Processor control instructions include flag manipulation and
processor control instructions.These instructions control the
functioning of the available hardware (programmer accessible
hardware) inside the processor chip.
 These are categorized into two types:
a) Flag manipulation instructions
b) Machine control instructions

 The flag manipulation instructions directly modify some of the flags

of the 8086 flag register.
 The machine control instructions controls the bus usage and
execution.
 The processor control group includes instructions to set or clear
carry flag, direction flag, and interrupt flag.It also includes the HLT,
NOP, LOCK and ESC instructions which controls the processor
operation
 The Various Flag manipulation instructions are
CLC, CMC, STC, CLD, STD, CLI, STI
 The Various machine control instructions are
WAIT, HLT, NOP, ESC, LOCK
instruction set 95
 Processor Control Instructions
Flag manipulation instructions
 CLC : Clear Carry
The carry flag is reset to zero i.e., CF = 0
CF  0
 CMC : Complement the carry
The carry Flag is Complemented i.e., if CF = 0 before CMC then
after CMC CF =1 and vice versa.
CF  ~ CF
 STC : Set Carry
The carry flag is set to one i.e., CF = 1
CF  1
 CLD : Clear direction
The direction flag is cleared to zero i.e., DF = 0
DF  0
 STD : Set direction
The direction flag is set to 1 i.e., DF = 1
DF  1
instruction set 96
 Processor Control Instructions
Flag manipulation instructions

 CLI : Clear Interrupt

The Interrupt flag is cleared to zero i.e., IF = 0
IF  0

 STI : Set Interrupt

The Interrupt flag is set to 1 i.e., IF = 1.
IF  1

instruction set 97
 Processor Control Instructions
Machine control instructions
 WAIT : Wait for Test input pin to go low or an interrupt signal
This instruction causes the processor to enter into an idle state or
wait state and continue to remain in that state until a signal is
asserted on the TEST input pin or until a valid interrupt signal is
received on the INTR or NMI interrupt input pin.
If a valid interrupt signal occurs while the 8086 is in idle state, the
8086 will return to the idle state after the interrupt service
procedure executes. It returns to the idle state because the
address of the WAIT instruction is the address pushed on to the
stack when the 8086 responds to the interrupt request.
WAIT affects no flags
The WAIT instruction is used to synchronize the 8086 processor
with the external hardware such as the 8087 math processor.
 HLT : Halt Processing
The HLT instruction will cause the 8086 to stop the fetching and
execution of the instructions. The 8086 will enter a halt state i.e.,
used to terminate a program.
The only ways to get processor out of Halt state are with an
interrupt signal on INTR pin, an interrupt signal on NMI pin, or a
valid reset signal on RESET input.set
instruction 98
 Processor Control Instructions
Machine control instructions
 NOP : No Operation
No operation is performed for three clock periods
This instruction simply uses up three clock cycles and increments
the instruction pointer to point to the next instruction.
The NOP instruction does not affect any flag.
The NOP instruction can be used to increase the delay of a delay
loop.
When hand coding, a NOP can also be used to hold a place in a
program for instruction that will be added later.

instruction set 99
 Processor Control Instructions
Machine control instructions
 ESC : Escape
ESC opcode, Mem. / Reg.
This instruction is used to pass instructions to a coprocessor , such
as the 8087 math coprocessor which shares the address and data
bus with 8086
Instructions for coprocessor are represented by a 6-bit code
embedded in the escape instruction.
As 8086 fetches the instructions bytes, the coprocessor also
catches these bytes from the data bus and puts them in its queue ,
but treats all the normal 8086 instructions as NOPs and when ESC
instruction is fetched by 8086, the coprocessor decodes the
instruction and carries out the action specified by the 6-bit code in
the instruction.
In most cases 8086 treats the ESC instruction as NOP but in some
cases 8086 will access a data item in memory for the coprocessor.
For ESC opcode, Mem format the data is accessed by 8087 from
memory
For ESC opcode, Mem format the data is accessed by 8087 from
8086 register specified in the instruction.
instruction set 100
 Processor Control Instructions
Machine control instructions
 LOCK : Assert Bus Lock signal
The LOCK is used as a prefix to a critical instruction which has to
be executed without any disturbances to system bus from other
bus masters.
When LOCK prefix is used in an instruction then during execution
of this instruction the lock prefix ensures that the shared system
resources are not taken over by other bus masters in the middle of
the critical instruction execution.
When an instruction with LOCK prefix is executed the 8086 will
assert its bus lock signal output.This signal is connected to an
external bus controller device, which then prevents any other
processor from taking over the system bus
LOCK affects no flags.

instruction set 101

 Program execution transfer instructions
 The control transfer group consists of call, jump, loop and software
interrupt instructions.
 Normally a program is executed sequentially( i.e., the program
instructions are executed one after the other), when a branch
instruction is encountered the program execution control is transferred
to the specified destination or target instructions. The transfer of
program execution control is done either by changing the content of IP
or by changing the contents of IP and CS.
 When the content of IP alone is modified, the program control
branches to new memory location in the same segment.
 When the contents of IP and CS are modified, the program control
branches to new memory location in another memory segment.
 The control transfer instructions do not affect the flags of 8086.
 The jump and loop instructions can be classified into conditional and
unconditional instructions.
 In conditional instructions, the status of one or more flags are checked
and control transfer takes place only if the specified condition is
satisfied. instruction set 102
 Program execution transfer instructions
 The program execution transfer instructions can be categorized as:

Unconditional transfer instructions

Conditional transfer instructions

Iteration control instructions

Software interrupt instructions
 Unconditional transfer instructions:
CALL
RET
JMP
 CALL : Unconditional Call
The CALL instructions transfer control to a subprogram or subroutine
or a procedure after saving return address in the stack memory.
There are two types of CALL instructions:
Intra-segment or near call
Inter-segment or far call
instruction set 103
 Program execution transfer instructions
Unconditional transfer instructions

 A near call refers to calling a procedure stored in

the same code segment memory in which main
program( or calling program) resides.
 A far call refers to calling a procedure stored in
different code segment memory than that of
main program.
 While executing near call, the content of IP
alone is pushed to stack. While executing far call
the contents of CS and IP are pushed to stack.

instruction set 104

 Program execution transfer instructions
Unconditional transfer instructions

 Direct near call:

CALL Disp-16
This instruction is near-direct call in which the program control is
transferred within the same segment.
The stack pointer is decremented by 2, the IP is pushed into stack
and effective address (Disp-16) of the subroutine or procedure to be
executed is loaded in IP.

 CALL Disp-16
(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (IP)
(IP)  Disp-16
instruction set 105
 Program execution transfer instructions
Unconditional transfer instructions

 In-direct Near CALL

CALL reg. / Mem.
This instruction is near- indirect call in which the control transfer is
within same segment and the effective address of subroutine /
procedure to be called is stored in register or memory.
The stack pointer is decremented by 2, the IP is pushed into the
stack and the effective address of the subroutine / procedure to be
executed is loaded in IP from the register / memory.
CALL reg. / CALL Mem.
(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (IP)
(IP)  (reg.) / (IP)  (Mem.)

instruction set 106

 Program execution transfer instructions
Unconditional transfer instructions
 Direct Far CALL
CALL Addroffset, Addrbase
This instruction is far-direct call in which the program control is
transferred to another segment.
The offset and segment base address of the procedure to be executed
are stored in memory.
The stack pointer is decremented by 2, the IP is pushed into the stack.
The stack pointer is again decremented by 2 and CS is pushed onto the
stack and the base address of the procedure to be executed is loaded
into CS.
(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (IP)
(IP)  Addroffset
(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (CS)
(IP)  Addrbase instruction set 107
 Program execution transfer instructions
Unconditional transfer instructions
 In-direct Far CALL
CALL Mem.
This instruction is far-indirect call in which the program control is
transferred to another segment.
The offset and segment base address of the procedure to be executed
are directly given in the instruction.
The stack pointer is decremented by 2, the IP is pushed into the stack.
The stack pointer is again decremented by 2 and CS is pushed onto
the stack and the base address available in memory is loaded into CS.
(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (IP)
(IP)  (Mem.)(offset address)
(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (CS)
(IP)  (Mem.)(base address) instruction set 108
 Program execution transfer instructions
Unconditional transfer instructions

 Every procedure or subroutine end with RET instruction.

 The execution of RET instruction at the end of subroutine or
procedure, will pop the contents of top of the stack to IP in case of
near call or to IP and CS in case of far call. Thus the program
control return back to main program.
 Return instruction does not affect any flags.
 Depending upon the type of procedure and the SP contents, the
RET instruction is of four types.
1. Return within segment
2. Return within segment adding 16-bit immediate displacement
to the SP contents.
3. Return inter-segment
4. Return inter-segment adding 16-bit immediate to the SP
contents

instruction set 109

 Program execution transfer instructions
Unconditional transfer instructions
 Return from call within segment
RET
Return the control back to calling procedure from the called
procedure with in the segment.
The content of top of stack is transferred to IP and the stack pointer
is incremented by two.

MAS = (SS) X 1610 + (SP)

(IP)  (MAS)
(SP)  (SP) + 2

instruction set 110

 Program execution transfer instructions
Unconditional transfer instructions
 Return from call within segment adding immediate value to SP
RET data-16
Return the control back to calling procedure from the called
procedure within the segment. The content of top of the stack is
transferred to IP and the SP is incremented by a value (data-16)
specified in the instruction.

MAS = (SS) X 1610 + (SP)

(IP)  (MAS)
(SP)  (SP) + data-16

instruction set 111

 Program execution transfer instructions
Unconditional transfer instructions
 Return from inter-segment call
RET
Return the control back to calling procedure from the called
procedure which is in different segment. The content of top of the
stack is transferred to IP and the SP is incremented by 2. Next the
content of the current top of the stack is moved to CS and SP is
incremented by 2.

MAS = (SS) X 1610 + (SP)

(IP)  (MAS)
(SP)  (SP) + 2
MAS = (SS) X 1610 + (SP)
(CS)  (MAS)
(SP)  (SP) + 2

instruction set 112

 Program execution transfer instructions
Unconditional transfer instructions
 Return from inter-segment call adding immediate data to SP.
RET data-16
Return the control back to calling procedure from the called
procedure which is in different segment. The content of top of the
stack is transferred to IP and the SP is incremented by 2. Next the
content of the current top of the stack is moved to CS and SP is
incremented by a value (data-16) specified in the instruction.
MAS = (SS) X 1610 + (SP)
(IP)  (MAS)
(SP)  (SP) + 2
MAS = (SS) X 1610 + (SP)
(CS)  (MAS)
(SP)  (SP) + data-16

instruction set 113

 Program execution transfer instructions
Unconditional transfer instructions
 JMP : Unconditional Jump
The unconditional jump instructions does not check for any flag
condition. When the unconditional jump instruction is executed the
program control is transferred to new memory location either in
same segment or in another segment.
In near jump instruction the program control is transferred to new
memory location in the same segment by modifying the content of
instruction pointer (IP).
In far jump instruction the program control is transferred to new
memory location in another segment by modifying the content of
instruction pointer (IP) and code segment (CS) register.
 JMP Disp-16 (near jump instruction)
The 16-bit value (Disp-16)given in the instruction is added to
instruction pointer (IP).
(IP)  (IP) + Disp-16
instruction set 114
 Program execution transfer instructions
Unconditional transfer instructions
 JMP Disp-8 (near jump instruction)
The 8-bit value (Disp-8) given in the instruction is sign extended to
16-bit and added to instruction pointer(IP).
Disp-16  (sign extended) Disp-8
(IP)  (IP) + Disp-16

 JMP reg. / Mem. (near jump instruction)

JMP Reg.
JMP Mem.
The 16-bit value stored in the register or memory is added to
instruction pointer (IP).
(IP)  (IP) + (Reg.)
(IP)  (IP) + (Mem)

instruction set 115

 Program execution transfer instructions
Unconditional transfer instructions
 JMP Addroffset, Addrbase (Far jump instruction)
The offset address given in the instruction is loaded in IP and the
base address given in the instruction is loaded in CS register.
(IP)  Addroffset
(CS)  Addrbase

 JMP Mem.
The content of (16-bit) memory is moved into IP and the next word
in memory is moved into CS register.
(IP)  (Mem.)
(CS)  (Mem. + 2)

instruction set 116

 Program execution transfer instructions
Iteration control instructions
 The iteration instructions are also known as Loop instructions.
 Loop instructions are used to execute a group of instructions, a
number of times as specified by a count value stored in CX register.
 The number of instructions to be looped will be specified directly in
the instruction as a signed eight bit number ( Displacement 0r Disp-
8).
 For positive displacement the instructions below the LOOP
instruction are executed and for negative displacement the
instructions above the LOOP instruction are executed.
 The contents of CX register is decremented by one after each
execution of looped instructions. The effective address of first
instruction of the loop is obtained by sign extending the Disp-8 to 16-
bit and adding to IP.

instruction set 117

 Program execution transfer instructions
Iteration control instructions
 LOOP Disp-8
LOOP <Disp-8>
Repeat execution of the group of instructions until the content of CX is
zero. After each execution CX is decremented by one.
Loop if (CX)  0
(CX)  (CX) – 1
 Example:
MOV BX, OFFSET List ; BX loaded with the address of 1st
;element in array List array .
MOV CX, 20 ; load the no. of elements in array List into CX
Reg.
X1 : MOV AL, [BX] ; get the element pointed by BX into AL Reg.
ADD AL, 05H ; Add 5H to element
MOV [BX], AL ; Store the result back into array List
INC BX ; Increment pointer
LOOP X1 ; Repeat the process till count is zero
LOOP X1 similar to DEC CX ; JNZ X1
instruction set 118
 Program execution transfer instructions
Iteration control instructions
 LOOPZ / LOOPE <Disp-8>
Repeat execution of the group of instructions, if the content of CX is
not zero and ZF = 1. After each execution CX is decremented by
one.
Loop if (CX)  0 and ZF =1
(CX)  (CX) – 1
Example:
MOV BX, OFFSET List ; Get offset of 1 st element of List
array ; into BX.
MOV CX, 10 ; Count in CX
DEC BX
X1 : INC BX
CMP [BX] , 45H ; compare all array elements with
45H
LOOPE X1
If (CX) = 0 and ZF = 1 on exit then all elements of array are 45H;
If (CX)  0 and ZF = 0 BX pointing to first element  45H in array ;
If (CX) = 0 and ZF =0 then last element
instruction set of the array is 45 H. 119
 Program execution transfer instructions
Iteration control instructions
 LOOPNZ / LOOPNE <Disp-8>
Repeat execution of the group of instructions, if the content of CX is not
zero and ZF = 0. After each execution CX is decremented by one.
Loop if (CX)  0 and ZF =0
(CX)  (CX) – 1
Example:
MOV BX, OFFSET List
MOV CX, 20
DEC BX
X1 : INC BX
CMP [BX], 40H ; Compare the array elements with 40H
LOOPNE X1
If (CX) = 0 and ZF =0 then 40H was not found in array ; If (CX)  0 and
ZF = 1 then BX is pointing to the element which is 40H ; If (CX) = 0 and
ZF = 1 then the last element in the array was 40H.

instruction set 120

 Program execution transfer instructions
Iteration control instructions
 JCXZ : Jump if the CX register is zero
This instruction will cause a jump to a label given in the instruction if
the CX register contains all 0’s.
If CX does not contain all zeros , execution will simply proceed to the
next instruction. This instruction does not refer to the zero flag when it
decides whether to jump or not.
The destination label for this instruction must be in the range of –128
to +127 bytes from the address of the instruction after the JCXZ
instruction.
JCXZ affects no flags.
Example:
JCXZ X1 ; If CX is all zeros then go to label X1
X2 : ADD [BX], 05H
INC BX
LOOP X2
X1 : MOV [BX], 00H instruction set 121
 Program execution transfer instructions
Software Interrupt Instructions
 The Software Interrupt instructions are the instructions used for
executing interrupts through instructions.
 The INT instructions are called Software Interrupts.
 The INT instructions are used to call a procedure or subroutine on
Interrupt basis.
 The procedure executed on Interrupt basis is called Interrupt Service
Routine (ISR).
 The INT instruction is accompanied by a type number, which can be
in the range of 0 to 255. Thus 8086 processor has 256 types of
software interrupts that can be implemented.
 The software interrupts are used to implement the system call
service of the operating system.
 In order to execute an ISR, a 16-bit effective address for IP and a 16-
bit base address for CS are needed. Thus for each INT instruction
four memory locations are reserved in the first 1K address space of
memory.
instruction set 122
 Program execution transfer instructions
Software Interrupt Instructions
 In the reserved locations, the 1 st two locations are used to store the
effective address(to be loaded into IP) and the next two locations are
used to store the base address(to be loaded into CS register).
 The address of the reserved memory location is called vector address.
 The vector address of an interrupt is obtained by multiplying the type
number by 4.
 Before executing ISR, the contents of IP, CS and Flag register are
pushed to stack. Each ISR is terminated by IRET (Interrupt return)
instruction.
 On executing IRET instruction the top of stack are Popped to IP, CS and
Flag register.
 Thus the program control returns back to main program after executing
ISR.
 INT  Interrupt program execution
INT 3  Break-point Interrupt
INTO  Interrupt on overflow
IRET  Interrupt return instruction set 123
 Program execution transfer instructions
Software Interrupt Instructions
 INT <type>
 This instruction is a software interrupt and used to call a service
procedure(or subroutine) on interrupt basis.
 The type number is from 0 to 255.On execution of this instruction
the contents of flag register, CS register and IP are pushed to
stack, one by one after decrementing SP by 2 before each push
operation.
 The flags IF and TF are also cleared.
 The effective vector address is calculated by multiplying the type
number by 4.
 The memory location pointed by vector address contain the
address of interrupt service routine.
 The 1st word pointed by the calculated vector address is moved
to IP and the next word is moved to IP and the next word is
moved to CS register.
instruction set 124
 Program execution transfer instructions
Software Interrupt Instructions
 (SP)  (SP) – 2
(MAS)  (flags)
(SP)  (SP) –2
(MAS)  (CS)
(SP)  (SP) –2
(MAS)  (IP)
(IP)  (0000 : (Type X 4))
(CS)  ( 0000 : ( Type X 4) + 2)
IF  0; TF  0

For each push operation stack memory is given by

MAS = (SS) X 1610 + (SP)

instruction set 125

 Program execution transfer instructions
Software Interrupt Instructions
 The sequence operations for executing INT instruction by 8086:
1. Decrement the stack pointer by 2 and push the flags on to the
stack.
2. Decrement the stack pointer by 2 and push the contents of CS
on to the stack.
3. Decrement the stack pointer by 2 and push the offset of the
next instruction after the INT number instruction on to the
stack.
4. Get a new value for IP from an absolute memory address of 4-
times the type specified in the instruction.EX : For INT 8 the
new IP value will be read from address 00020H
5. Get a new value for CS from an absolute memory address of
4-times the type specified in the instruction + 2; FOR INT 8
instruction the new CS value will be read from 00022H location
6. Reset both IF and TF flags but other flags are not affected by
INT instruction
instruction set 126
 Program execution transfer instructions
Software Interrupt Instructions
 INT 3H
 This instruction is a special type of software interrupt which has the
single byte code of CCH.
 Many systems use this as a break point instruction.
 The operations performed by this instruction is same as that of
type-3 interrupt.
 (SP)  (SP) – 2
(MAS)  (flags)
(SP)  (SP) –2
(MAS)  (CS)
(SP)  (SP) –2
(MAS)  (IP)
(IP)  (0000CH) ; 3 X 4 = 12 i.e. 0CH
(CS)  ( 0000EH) ; 12 + 2 = 14 i.e. 0EH
IF  0; TF  0
MAS = (SS) X 1610 + (SP) for instruction
each PUSH set operation. 127
 Program execution transfer instructions
Software Interrupt Instructions
 INTO
If overflow flag (OF) is 1, then type-4 interrupt is performed.
If OF = 1, then following operation are performed.
(SP)  (SP) – 2
(MAS)  (flags)
(SP)  (SP) –2
(MAS)  (CS)
(SP)  (SP) –2
(MAS)  (IP)
(IP)  (00010H) ; 4 X 4 = 16 i.e. 10H
(CS)  ( 00012H) ; 16 + 2 = 18 i.e. 12H
IF  0; TF  0
MAS = (SS) X 1610 + (SP) for each PUSH operation.
instruction set 128
 Program execution transfer instructions
Software Interrupt Instructions
 IRET
This instruction is used to terminate an interrupt service procedure
and transfer the program control back to main program.
On execution of this instruction the contents of top of the stack
(pointed by SP) are moved (popped) to IP , CS and Flag registers
one by one
After each pop operation the SP is incremented by 2.
The RET instruction should not be used to return from procedures
because the RET instruction does not copy the flags from the stack
back to the flag register.
(IP)  (MAS) ; (SP)  (SP) + 2
(CS)  (MAS) ; (SP)  (SP) + 2
(Flags)  (MAS) ; (SP)  (SP) + 2
For each pop operation the stack memory address is calculated as
MAS = (SS) X 1610 + (SP) instruction set 129
 Program execution transfer instructions
Conditional Jump Instructions
 In a conditional jump instruction one or more flag conditions are checked.
If conditions are true, then the program control is transferred to new
memory location in the same segment by modifying the contents of IP.
 All conditional instructions are only near jump (or short jump), hence the
contents of CS is not altered.
 In all conditional jump instructions an 8-bit value (Disp-8), will be directly
specified in the instruction which is sign extended to 16-bit and added to
IP. The new value of IP is the effective address of the instruction where the
program control is transferred, if the condition is true.
 The conditional jump instructions are often used after a compare
instruction.
 When the conditional jump instructions are executed execution control is
transferred to the address specified relatively in the instruction, provide the
condition implicit in the opcode is satisfied, when the condition is not
satisfied the execution continues sequentially and the conditions here
indicate the status of the conditional flags in the flag register.

instruction set 130

 Program execution transfer instructions
Conditional Jump Instructions
 Conditional jump instructions does not affect any flags.
 As the address has to be specified in the instruction relatively in
terms of displacement which must lie within –80H to 7FH (i.e. –128
to 127) bytes from the address of the branch instruction.
 A label may represent the displacement, if it lies within the above
specified range.
 As the conditional jump instructions are generally used with
congestion with comparison of numbers the comparison can be
between unsigned and as well as between signed numbers. Thus
the term below and above refer to unsigned binary numbers. The
terms greater than and lesser than refer to signed binary
numbers.
 The term above means larger in magnitude and below means
smaller in magnitude.
 The term greater than means more positive and the lesser than
means more negative.
instruction set 131
 Program execution transfer instructions
Conditional Jump Instructions
S.No. Mnemoni Condition Operation by instruction
c
1. JA / CF = 0 AND ZF Jump if above / Jump if not
JNBE =0 below or equal.
2. JAE / CF =0 Jump if above or equal / Jump if
JNB not below
3. JB /JNAE CF = 1 Jump if below / Jump if not
above or equal
4. JC CF = 1 Jump if carry flag (CF) = 1.
5. JNC CF = 0 Jump if no carry i.e., CF = 0
6. JE /JZ ZF =1 Jump if equal / Jump if zero
( ZF = 1)
7. JNE / ZF = 0 Jump if not equal/ Jump if Non
JNZ zero (ZF = 0)

instruction set 132

 Program execution transfer instructions
Conditional Jump Instructions

S.No. Mnemoni Condition Operation by instruction

c
8. JO OF = 1 Jump if Over flow flag OF = 1

9. JNO OF = 0 Jump if no over-flow (OF = 0)

10. JP / JPE PF = 1 Jump if parity / Jump if even parity

11. JNP / PF = 0 Jump if no parity / Jump if Odd parity

JPO
12. JS SF = 1 Jump if sign

13. JNS SF = 0 Jump if no sign

instruction set 133

 Program execution transfer instructions
Conditional Jump Instructions

S.N Mnemoni Condition Operation by instruction

o c
14. JG / ZF = 0 (AND) CF = Jump if greater / Jump if not
JNLE OF less than or equal
15. JGE / SF = OF Jump if greater than or
JNL equal / Jump if not less than
16. JL / SF  OF Jump if less than / Jump if
JNGE not greater than or equal
17. JLE / SF  OF (OR) ZF =1 Jump if less than or equal /
JNG Jump if not greater than

instruction set 134

 Program execution transfer instructions
Conditional Jump Instructions
 JG / JNLE :
Greater means more positive and not less than or equal means not
more negative and also not equal.
Example:
00000111 is greater than 11101010. As in signed notation 00000111
is more positive than 11101010 as the second number has MSB = 1
thus negative number.
 JL / JNGE :
Lesser than means more negative and Not greater than or equal
means more negative and also not equal.

instruction set 135

 Assembly Level Language Programming
 Program – Group of instructions
 Programming languages :
o High level language.
o Assembly level language.
o Low level language.
 Features of High level language Programming :
o User Friendly.
o Easy to debug.
o Requires usage of compiler or Interpreter.
o Requires move memory space.
 Features of Assembly Level Language Programming:
o neither user friendly nor machine friendly but yet good to handle
with.
o Requires Assembler.
o Less memory space required when compared with high level
language programs. Assembler Directives 136
 Assembly Level Language Programming
 Features of Low Level Language Programming:
o Machine friendly and machine dependent.
o Lot of human effort required and difficult to debug.
o Lesser Memory space required.

 Assembly level language program uses mnemonics,

hence easy to understand.
 Assembly level language program explains about internal
data movement.
 Assembly level language program use a simple
assembler binary code can be generated.

Assembler Directives 137

 Assembly Level Language Programming
 Assembly Level Language Programming Tools:
 Editor:
o Program which allows a programmer to create a file
containing Assembly language statements.
o Stores the ASCII codes for letters and numbers in successive
RAM locations.
o The program in Editor is stored into a floppy or hard disk as a file.
o The source file is processed with an assembler by saving the
source file with an extension suitable for the assembler.
 Assembler:
o It is program which translates the mnemonics for instructions to
corresponding binary codes.
o It reads the source file and generates two files namely object file
and list file.

Assembler Directives 138

 Assembly Level Language Programming
 Object file : (.OBJ)
o Contains the binary code of the instructions and
information about the addresses of the instructions.
o The object file is then loaded into memory and run after
further processing it.
 List file : (.LST)
o It contains assembly language program statements,
the binary codes for each instruction and offset for
each instruction.
o It also gives information about any typing or syntax
errors present in the program, i.e., Assembly language
grammar errors.
Assembler Directives 139
 Assembly Level Language Programming
 For generating machine codes from source file the
assembler takes two passes:
First Pass:
o Determines the displacement of named data items, the offset of
labels…..etc.
o Puts the information into symbol table.
 Second Pass:
o Produces the binary code for each instruction and inserts the
offsets… etc which are generated during first pass.
o In order to facilitate programmer to test and troubleshoot program,
list file is sent to printer.
o The assembler can give information only about the syntax errors.
o After generating object file and list file an linker or locator is used
to assign the physical starting addresses for the segments.
Assembler Directives 140
 Assembly Level Language Programming
 Linker:
o Linker is a program used to join several object files into one large
object file.
o Linker is useful when working with modular program
o While writing program for an bigger application the ALP will be
large, thus it is usually much more efficient to divide the large
program into smaller modules, which can be written, tested and
debugged individually.
o The modules are linked together to form a large, functioning
program.
o Generally the object modules for useful programs can be kept in a
library file and linked with other programs as and when needed.
o The linker file and link map file generated by linker contains the
binary code for all the combined modules and the address
information about the linked files respectively.
o The linker assigns only relative addresses of the program which
makes program re-locatable as it can be put any where in memory
to run it later. Assembler Directives 141
 Assembly Level Language Programming
o The linkers associated with TASM or MASM assemblers produce link
files with .EXE extension.
o For running the programs on systems such as SDK-86 board, an
locator which assigns physical address to the segments in the .EXE
file is used before debugging it using the debugger.
 Locator :
o Program used to assign the specific addresses for the segments
in object code to be loaded into memory.
 Debugger :
o Program which allows programmer to load object code of program
into system memory, execute the program and debug it i.e .,
trouble shoot it.

Assembler Directives 142

 Assembly Level Language Programming
 Functions of debugger:
o Allows the programmer to look at contents of registers and memory
locations after the program is run.
o Allows to change the contents of registers and memory locations
and return to the program.
o Some debuggers allow programmer to stop execution after each
instruction so that programmer can check or alter memory and
register contents.
o Allows a programmer to set a break point at any point in a program.
 Emulator:
o Mixture of hardware and software.
o Usually used to test and debug the hardware and software of an
external system like prototype of microprocessor based instruments.
o Emulator have a multi-wire cable which connects the host system to
prototype system.

Assembler Directives 143

 Start

Define Problem
2 3

Develop Algorithm

Create Source File .ASM

With Editor

.OBJ
Assemble .LST

Assembl
YES y
Errors NO
Assembler Directives 144
1
 1
.EXE
LINK .MAP

Locate .BIN

NO YES
External
System

Load Debugger Load Emulator

Load Program
Load Program

RUN & TEST RUN & TEST

Program Program

4 5

Assembler Directives 145

 4 5

NO NO
Errors Errors

YES YES

Use Debugger Tools Use Debugger Tools

To find errors To find errors

Stop

2 3

Assembler Directives 146

 Machine Level Language Programming
 Generating the machine codes of program manually and execute it.
 Disadvantages of MLP :
o The process is complicated and time consuming.
o The chances of error being committed are more at the machine
level( in hand-coding and entering the program byte-by-byte into
the system).
o Debugging a program at the machine-level is more difficult.
o The programs are not understood by every one and the results
are not stored in user friendly form.

Assembler Directives 147

 Assembly Level Language Programming
 A program called ‘assembler’ is used to convert the mnemonics of
instructions along with the data into their equivalent object code
modules, which may further be converted in executable code using the
linker and loader programs.
This type of programming is called Assembly level language
programming(ALP).
In ALP, the mnemonics are directly used in the user programs.
The assembler performs the task of coding.
 Advantages of ALP over MLP:
o The Programming in assembly language is not so complicated as in
machine language because the function of coding is performed by
an assembler.
o The chances of error being committed are less because the
mnemonics are used instead of numerical opcodes. It is easier to
enter an ALP.
o As the mnemonics are purpose suggestive, the debugging is easier.
Assembler Directives 148
 Assembly Level Language Programming
o The constants and address locations can be labeled with suggestive
labels hence imparting a more user friendly interface to
user.Advanced assemblers provide facilities like macros, lists,………
etc making the task of programming much easier.
o The memory control is in the hands of users as in machine language.
o The results may be stored in a more user-friendly form.
o The flexibility of programming is more in assembly language
programming as compared to machine language programming
because of advanced facilities available with the modern assemblers.

Assembler Directives 149

 Assembly Level Language Programming
 Assembly language programming (ALP) explains the way the computer
hardware and operating system work together and also about how the
application programs communicate with the operating system.
 ALP helps in understanding the computer architecture and operating system.
 ALP imposes rules about what is allowed and what not allowed in a program.
 ALP makes the programmer understand the operating system, hardware and
data storage which is not possible with high level programming.
 Assembly language programming is called low level language programming
because it is close to machine language in structure and function.
 Each assembly language instruction corresponds to one machine instructions.

Assembler Directives 150

 Assembly Level Language Programming
 Mnemonic :
Short alphabetic code that literally assists the memory in
remembering a CPU instruction. It may be an instruction or directive.
 Operand :
An instruction may contain zero, one (or) two operands.
An operand may be a register, a memory variable, or an
immediate value (data).
The choice of operand is usually determined by the
addressing mode.
The addressing mode tells the assembler, where to find data
in each operand, i.e., whether in a register, or in a memory or as
immediate data.

 Instruction Mnemonic + Operand

Assembler Directives 151
 Assembly Level Language Programming
 Comment :
The beginning of comment is marked by a semi-colon (;)
character. All other characters to the right are ignored by the
assembler.
When a particular line is beginned with a semicolon, then
whole line is treated as a comment.

 When ALP is being executed using Assembler:

 Instruction:
Translated into machine code by the assembler.
 Assembler Directives:
For directing the assembler.
For directives no machine code is generated and no
memory location is allocated.
Assembler Directives 152
 Assembler Directives And Operators
 Assembler Directives:
• Gives direction to the assembler.
• Necessary for assembler to assemble efficiently and correctly.
• Controls the generation of machine code and organizes the
program.
• Is an indication to the assembler about the assumed contents in the
segment registers under the various circumstances as the assembly
progresses.
• Gives the programmer more control over the exact placement of
data and segmentation of program than high level language
program.
 The hints to be given by programmer are regarding:
• The required storage for a particular constant or a variable.
• Logical names of segments.
• Types of different routines and modules
• End of file,………… etc. Assembler Directives 153
 Assembler Directives And Operators
 The hints given to the assembler are:
1) Assembler Directives
2) Operators
 Assembler Directives:
• The hints in the form of predefined alphabetical strings.
• Assembler Directives help the assembler to correctly understand
assembly language programs to prepare the codes.
Thus the directions to the assembler and pseudo
operations are known to be Assembler Directives.
• The Assembler directives are not assigned with any memory
locations.
• The advantages of labels in assembly language programming are:
1) Program becomes more understandable.
2) The tedious byte handling and manipulations are avoided.
Assembler Directives 154
 Assembler Directives And Operators
 When the program is written and assembled using assembler, then
the assembler decides the address of each label and substitutes the
values for each of the constants and variables, the machine code for
mnemonics and data in the assembly language program.
 While assembler is assembling a program it can find out only syntax
errors and in order to handle programming errors and logical errors
the assembler needs some special directions or hints from the
programmer.
 The assembler directives are used to specify start and stop of a
program, attach value to variables, allocate storage locations to input
or output data, to define start and end of
Segments/Procedures/Macros……….. Etc.
 The assembler directives control the generation of machine code and
organization of the programs but no machine codes are generated for
assembler directives.

Assembler Directives 155

 Assembler Directives And Operators
 Operators:
• Operators are the hints which helps the assembler to
assign a particular constant with a label or initialize
particular memory locations or labels with constants is
called an operator.
• The operator performs the arithmetic and logical tasks
unlike directives that just direct the assembler to
correctly interpret the program, to code it appropriately.

Assembler Directives 156

 Assembler Directives
 Data definition and storage allocation:
• Statements that reassign data and reserve storage have the
form:
Variable Mnemonic Operand,……….,Operand ; Comments
(Label)
• The variable is optional, but if it is present it is assigned the
offset of the first byte that is reserved by the directive.
Unlike the label field, a variable must be terminated by
a blank, not a colon.
 The mnemonic in the statement determines the length of each
operand and is one of the following:
• DB (Define Byte) : Each operand datum of the label or variable
occupies one byte location in memory.
• DW(Define Word) : Each operand datum of the label or
variable occupies one Word or two memory locations where
low-order byte is stored in first location and the higher-order
byte is stored in second location.
Assembler Directives 157
 Assembler Directives
 DD (Define Double Word) : Each operand datum is two words long
with low-order word followed by high-order word.
 DQ(Define Quad Word) : Each operand data is 4 words long i.e. 8
bytes and is stored starting from lowest byte to higher bytes.
 DT(Define Ten Bytes) : Each operand datum is 10 bytes long and is
stored starting from the lowest byte to higher bytes.
 The character string is stored in between single quotes and each
character’s ASCII codes are saved(stored) in successive
locations(i.e. the first character goes into the first byte assigned to the
variable, then second character of the string is stored at second byte
and so on…………)
 The character string is defined or pre-assigned using byte type.
 The character string can be defined using DW and DD also, but they
are rarely used as the bytes are reversed and also string operands in
a DW or DD cannot exceed two characters in length.

Assembler Directives 158

 Assembler Directives
 When an question mark (?) is used along with mnemonic as second
mnemonic, it does not pre-assign any value but, the appropriate
amount of space is reserved.
 DUP operator is used along with data size defining mnemonics to
duplicate multiple locations with the specified value in the braces.
ex: DUP(0)  fills 0’s in all the variable locations.
 Types of numbers used in data statements:
 Binary : ex  11100101B
• Negative number is represented in 2’s complement sign-
magnitude form.
• Any binary number is represented using a suffix of character ‘B’.
 Decimal : ex  20/ 20D / -20 / -20D
• Any decimal number is represented using a suffix of character ‘D’.
• Decimal is default data type.
Assembler Directives 159
 Assembler Directives
 Hexadecimal : ex: 30H
• Always any hexadecimal number is represented using a suffix of
character ‘H’.
• Always a ‘0’(zero) is to be appended in front of a hexadecimal
number that starts with alphabet.
• An decimal data type is converted to equivalent hexadecimal
number and then stored in the memory locations.
 BCD : ex: 37H
the difference between an hexadecimal number and an BCD number
can be made only from its usage.
 ASCII : ex: ‘Array’
• An ASCII value is always written in single quotes.
• An variable of ASCII type will have the ASCII equivalent value of
the operand is stored in the memory.
• An Alphanumeric character string given in single quotes as ASCII
string is case sensitive.
Assembler Directives 160
 Assembler Directives
 Program termination directive: END
END Label
• As an END statement is needed to signal the end of a high-level
language program, the end directive indicate the end of a set of
assembler language code.
• The label appears only in the termination of the main program in a
program structure,although all separately assembled program
modules must conclude with an END directive.
• The label must also appear in the instruction to be executed first, the
point at which the program begins.
• Specifically, the address associated with this label is the address that
the loader branches to after the program has been loaded and is
ready for execution.
• Thus the END directive is put after the last statement of the program
to tell the assembler that it is the end of the program module/file.
• Any statement after an END directive is ignored by the assembler.
Assembler Directives 161
 Assembler Directives
 Procedure Definitions directives:
PROC & ENDP
 PROC
• The PROC directive is used to identify the start of the
procedure.
• The PROC directive follows a name given to the
procedure.
• After the PROC directive the label NEAR or FAR is
used to specify the type of the procedure.
 ENDP
The ENDP directive is used along with the name of the
procedure to indicate the end of a procedure to the
assembler.
Assembler Directives 162
 Assembler Directives
 Alignment Directives:
• EVEN: This directive forces the address of the next byte to be even.
• ORG :
ORG Constant Expression
• The ORG directive causes the next byte to be associated with the
byte number expressed by the constant expression
ORG 1000H
X DW 2002H
[1000H] = 2002H
• When an program is being assembled by the assembler (data
declarations or instruction statements) an location counter keeps
track of how many bytes it is from the start of a segment at any
time.
• The usage of EVEN directive tells the assembler to increment the
location counter to the next EVEN address if it is not already at
even address.
Assembler Directives 163
 Assembler Directives
 When the directive EVEN is used in data segment then the location
counter is simply be incremented to the next even address is
necessary.
 When the EVEN directive is used in code segment, the location
counter will be incremented to the next even address if necessary. A
NOP instruction will be inserted in the location incremented over.
EVEN Num1 DW 4
 Assigning names to expressions:
If an expression appears several times in a program, it is
sometimes more convenient to give it a name and refer to
it by the name, which also permit a short name to replace
a lengthy expression, and also will be meaningful which
helps programmers and others to remember as well as
understand them while reading.
Expression_name EQU
Assembler Expression
Directives 164
 Assembler Directives
 Expression_name: any valid identifier or label
 Expression: Have the format of any valid operand or that evaluates to
a constant or any valid mnemonic.
Normally assigning names to expressions is done in the
beginning to the program
 EQU (equate) : The directive EQU is used to assign a label with a
value or a symbol.
The use of this directive is just to reduce the recurrence of
the numerical values or constants in a program code.
While assembling, whenever the assembler comes across
the label, it substitutes the numerical value for that label and finds out
the equivalent code.
Using the EQU directive, even an instruction mnemonic can
be assigned with a label which can then be used in program in place
of that mnemonic.

Assembler Directives 165

 Assembler Directives
 Segment definition directives:
One of the tasks that an assembler should perform is to
assign the offsets of the labels and variables as it translates the
instructions into machine language, the same information has to be
passed to the linker such that various segments and modules are put
together to form a program.
In order to explain the exact structure of each segment such
that variable and label offsets are assigned by the assembler
 The data,extra data, or stack segment normally has the form:
Segment_name SEGMENT
storage definition directives
allocation and alignment directives
Segment_name ENDS

Assembler Directives 166

 Assembler Directives
 A code segment normally has the form of
Segment_name SEGMENT
Instructions and
Instruction-related directives
Segment_name ENDS
 The directives SEGMENT and ENDS defines the starting and ending
boundaries of a segment and the Segment_name is identifier of the
segment.
 The definitions,allocations and directives between SEGMENT and
ENDS directives are contained within that particular segment.
 In addition to specifying boundaries for the assembler to translate the
instructions, it must know the exact correspondence between the
segments and the segment registers, which allows the assembler to
check for certain types of errors and inconsistencies i.e., whether a
variable is defined in the appropriate data or stack segment.
Assembler Directives 167
 Assembler Directives
 The assignments of the segments to the segment registers are
made using the directive ASSUME whose format is:
ASSUME Assignment,………..,Assignment
Where Assignment will be of the form:
Segment_register_name : Segment_name
 It is important to note that the assume directive does not load
the segment addresses into the corresponding segment
registers.
 The segment addresses can not directly loaded into segment
registers, so general purpose registers are used for this
purpose.
 When an logical segment is set-up, a name is to be given as a
label for the segment and the label cannot have spaces within
it, but an underscore can be used.
 Instruction mnemonic or assembler directive can not be used
as label. Assembler Directives 168
 Assembler Directives
 A logical segment is not usually given a physical starting address
when it is declared. After the program is assembled and linked with
other assembled program modules, it is then assigned the physical
address where it will be loaded in the memory to run.
 Additional terms/indicators like PUBLIC,WORD…….etc are added
along with the segment directive statement to indicate some special
way in which we want the assembler to treat the segment.
• Public: To indicate that this can be used with other segments with
same name from other assembly modules, when the modules are
linked together.
• Word: Contents of this segment located on the next available
word(even) address when absolute addresses given to it, else it
will be loaded on the next available paragraph(16-bytes) address.
When the assembler starts reading a segment by default
the location counter is automatically set to 0000H, the ORG
directive allows programmer to set the location counter to a
desired value at any point in the program.
Assembler Directives 169
 Assembler Directives
 LABEL :
Used to give a name to the current value in the location
counter.
 INCLUDE : (Include Source Code From File)
Used to tell the assembler to insert a block of source code
from the named file into current source module.
 GROUP: (Group Related Segments)
The group directive is used to tell the assembler to group the
logical segments named after the directive into one logical group
segment.
This directive allows the contents of all the segments to be
accessed from the same group segment base.
The assembler sends a message to the linker telling it to link
the segments so that the segments are physically in the same 64K-
Byte segment.
Assembler Directives 170
 Assembler Directives
 PUBLIC:
Any label/variable name referred to in other modules must be
declared public in the module in which it is defined.
The public directive is used to tell the assembler that a
specified name or label will be accessed from other modules.
 GLOBAL : (Declare symbols as Public/Extern)
The GLOBAL directive is used in the place of a PUBLIC /
EXTERN directive.
The GLOBAL directive is used to make the symbol/variable
available to other modules.
 EXTERN :
Used to tell the assembler that the names or labels following
the directive are in some other assembly module.
 LOCAL :
The labels, variables, constants or procedures declared
LOCAL in a module are to be used only by that particular module.

Assembler Directives 171

 Assembler Directives
 NAME : (Logical Name Of A Module)
The NAME directive is used to assign a name to an assembly
language program module. The module,may now be referred to by its
declared name.
The names, if selected to be suggestive, may point out the
functions of the different modules and hence may help in
documentation.
 FAR PTR :
This directive indicates to the assembler that the label
following FAR PTR is not available within the same segment and the
address of the label is of 32-bits i.e., 2-bytes offset followed by 2-
bytes segment address.
 NEAR PTR :
This directive indicates that the label following NEAR PTR is
in the same segment and needs only 16-bits i.e., 2 bytes offset to
address it.
Assembler Directives 172
 Operators
 SHORT :
Used to tell the assembler that only a 1-byte displacement
is needed to code a jump instruction.
Using the SHORT operator saves 1-byte of memory by
telling the assembler that it needs to reserve only 1-byte for this
particular jump.
The destination must be in the range of –128 bytes to +127
bytes from the address of the instruction after the jump.
 LENGTH :
Returns the number of units assigned to a variable (not
available in MASM)
 SIZE :
Same as the LENGTH operator,except that it returns the
number of bytes instead of the number of units.

Assembler Directives 173

 Operators
 ‘+’ and ‘-’ operators:
These operators represent arithmetic addition and subtraction
respectively and are typically used to add or subtract displacements( 8-
bit or 16-bit ) to base or index registers and stack or base pointer
registers.
 SEG :
Causes the segment address of the variable or label to be
inserted as an immediate data or operand (although the actual
insertion is made by the linker)
If the data_seg is assigned to the block of memory beginning
at 05000H and opr1 is in data_seg, then the instruction
MOV BX, SEG opr1 would put 0500 in BX register.
 TYPE :
Tells the assembler to determine the data type of a specified
variable/label and replaces the TYPE label by the decided data type.
The assembler determines the number of bytes in the type of
the variable,ex: for the word type variable the data type is 2.
ex: MOV AX , TYPE STR will load 1 into AX if STR is a byte
array and 2 is STR is a word arrayDirectives
Assembler 174
 Operators
 OFFSET : Offset of the label
Tells the assembler to determine the offset or displacement of
a named data item (variable) or procedure from the start of the
segment which contains it.
This operator is usually used to load the offset of a variable
into a register so that the variable can be accessed with one of the
indexed addressing modes.
 PTR : ( Pointer)
Used to assign a specific type to a variable or a label .
It is necessary to do so in any instruction where the type of
the operand is not clear.
The PTR operator can be used to override the declared type
of variable and also to clarify our intentions when we use indirect
jump instructions.

Assembler Directives 175

 Procedures and Macros
 Procedures:
When a group of instructions are to be used several times to
perform a same function in a program, then we can write them as separate
subprogram called procedure or subroutine.
Procedures can be called in a program using CALL instructions.
Procedures are written and assembled as separate program
modules and stored in the memory. The assembling of procedures will be
done without considering the main program i.e., independent of calling
program.
When procedure is called in main-program control is transferred to
procedure and after execution the control is transferred back to main
program, procedures are called using CALL instruction and returned back
using RET instruction.
 Label PROC Far / Near
------
------
RET Label ENDP. Procedures and Macros 176
 Procedures and Macros
 Types of Procedures:
i. Depending on Position of procedure in memory
o Intra-segment Procedure
o Inter-segment Procedure
ii. Depending on occurrence in program
o Single Procedure
o Nested Procedure
o Re-Cursive Procedure
o Re-Entrant Procedure

Procedures and Macros 177

 Procedures and Macros
 Intra-Segment Procedure:
CALL  (SP)  (SP) – 2
((SP) + 1 : (SP))  (IP)
(IP)  (EA)
RET  (IP)  ((SP) + 1 : (SP))
(SP)  (SP) +2

 Inter-Segment Procedure:
CALL  (SP)  (SP) – 2
(((SP) + 1) : (SP))  (CS)
(SP)  (SP) –2
(((SP) + 1) : (SP))  (IP)
(IP)  (EA)
(CS)  Seg. Address

Procedures and Macros 178

 Procedures and Macros
• RET  (IP)  ((SP) + 1 : (SP))
(SP)  (SP) – 2
(CS)  ((SP) + 1 : (SP))
(SP)  (SP) – 2

Procedures and Macros 179

 Procedures and Macros
• Single Procedure:
MP  Main Program
SP  Sup-Program / Procedure

MP

CALL
SP
RET

Procedures and Macros 180

 Procedures and Macros
• Nested Procedure

MP SP1
SP2

CALL
CALL

RET
RET

Procedures and Macros 181

 Procedures and Macros
 Re-Cursive Procedure:

SP1
SP1
MP SP1
CALL

CALL CALL

RET
RET

RET

Procedures and Macros 182

 Procedures and Macros
 The recursive procedures are implemented using procedure CALL itself,
but care must be taken to assure that each successive call does not destroy
the parameters and results generated by the previous CALL and make sure
that procedure does not modify itself, i.e., each call must store its set of
parameters, Registers and all temporary results in a different place in
memory.

 Push all the flags and all registers used in the procedure.

 Should use only register or stack to pass parameters.

Procedures and Macros 183

 Procedures and Macros
• Re-Entrant Procedures:

MP SP ISR

INT
CALL CALL SP

RET
IRET

Procedures and Macros 184

 Procedures and Macros
Passing Parameters to procedures:
o Using global declared variables.
o Using (General Purpose) registers.
o Using dedicated memory locations accessed by
name.
o Using pointers passed in registers.
o Using stack.

Procedures and Macros 185

 Procedures and Macros
 Using Global declared variables:
Data SEGMENT
Num EQU 77H GLOBAL
Data ENDS
Code SEGMENT
ASSUME CS : Code, DS : Data
START : Mov AX, Data
Mov DS, AX
:
Mov AX,Num
CALL X1
INT 3H
X1 PROC Near
MOV BX,Num
:
Add AX, BX
:
RET
X1 ENDP
Code ENDS
END START
Procedures and Macros 186
 Procedures and Macros
 Using (General purpose CPU Registers) Registers:
Code SEGMENT
ASSUME CS : Code
START : Mov AX, 2234H
Mov BX, 3342H
:
CALL X1
:
INT 3H
X1 : PROC Near
:
Add AX,BX
:
RET
X1 ENDP
Code ENDS
END START
Procedures and Macros 187
 Procedures and Macros
 Passing Parameters using Dedicated Memory Locations:
Data SEGMENT
Num DB (55H)
Count EQU 10H
Data ENDS
Code SEGMENT
ASSUME CS : Code, DS : Data
START : Mov AX, Data
Mov DS, AX
:
CALL X1
:
INT 3H
X1 PROC Near
MOV BX,Num
Mov CX, Count
:
RET
X1 ENDP
Code ENDS
END START
Procedures and Macros 188
 Procedures and Macros
 Passing parameters using pointers passed in registers:
:
Mov SI, OFFSET Str1
Mov DI, OFFSET Str2
:
CALL X1
:
INT 3H
X1 PROC Near
Mov AL, (SI)
Mov BL, AL
Mov CL, (DI)
:
RET
X1 ENDP
Code ENDS
END START

Procedures and Macros 189

 Procedures and Macros
 Features of Passing parameters using global variables:
o Extra memory required.
o All the globally declared variables need to be remembered.
o Modification of parameters cannot be done directly.
o Can be implemented only by using ASSEMBLER and not by any other
means.
 Features of Passing parameters using CPU Registers:
o Parameters passed are limited to number of CPU registers available.
o Each register assigned to the parameter need to be remembered and care
to be taken that they are properly used and altered in the procedure.
 Features of Passing parameters using Dedicated Memory Locations:
o Unlimited Storage
o Extra time is added to total execution time.
 Features of Passing parameters using Pointers passed in registers:
o Limited registers for pointers.
o Track of each pointer need to be remembered.
Procedures and Macros 190
 Procedures and Macros
 Passing parameters using stack Memory:
Code SEGMENT
ASSUME CS: Code, SS:Stack
START: Mov AX, Stack
Mov SS, AX
Mov AX, 0011H X1 PROC Near
Mov BX, 2220H :
: Mov DX, SP
Push AX Add SP, 02H
Push BX Pop BX
CALL X1 Pop AX
: Sub AX, BX
INT 21H :
RET
X1 ENDP
Code ENDS
END START
Procedures and Macros 191
 Procedures and Macros
 Features of Passing parameters using Pointers passed in
registers:
o Unlimited storage.
o Storage order and retrieval order need to be remembered correctly.
o Requires to use PUSH and POP instructions.
o Overhead time of Push and POP instructions added to total total
execution time.

Procedures and Macros 192

 Procedures and Macros
 MACROS:
o When a group of instructions are to be used several times to
perform a same function in a program and they are too small
to be written as a procedure, then they can be defined as a
MACRO.
o A MACRO is a small group of instructions enclosed by the
assembler directives MACRO and ENDM.
o The MACROS are identified by their names and usually
defined at the start of a program.
o The Macro is called by its name in the program, whenever the
MACRO is called in the program, the assembler will insert the
defined group of instructions in place of CALL instruction.

Procedures and Macros 193

 Procedures and Macros
o X1 MACRO
Mov SI, OFFSET Arr
Mov DI, OFFSET Arr1
Mov AL, (SI)
Add AL, (DI)
Inc SI
Inc DI
ENDM

 Passing parameters in MACROS:

X1 MACRO Arr, Arr1
:
END M
:
X1 Arr2,Arr3
:
X1 Arr4, Arr5
:
Procedures and Macros 194
 Procedures and Macros
 Advantages and Disadvantages Of Procedures and Macros:
 Procedures:
o Advantages:
1. Machine codes for the group of instructions in the procedure has to
be put in memory only once.
2. Each set of instructions can be individually assembled and debugged.
o Disadvantages:
1. Need stack operations performed.
2. Over-head time required to call the procedure and return to the
calling program.
 Macros
o Advantages:
1. Simple
2. No over-head time required.
o Disadvantages:
Program may take up more memory due to insertion of machine codes
in the program at the place of Macros.
Procedures and Macros 195
 Procedures and Macros
 Comparison of Procedures and Macros:

S.No. Procedures Macros

1. Machine code for instructions Machine codes are generated for
are stored in memory only once. instructions in the Macro each time
it is called in the main program.
2. Accessed by CALL and RET Accessed during assembly with
mechanisms during program name given to Macro when
execution. defining it.
3. Size is unlimited. Size is limited to few lines.
4. Parameters are passed in Parameters are passed as part of
registers, Memory locations or statement which calls Macro.
stack.
5. Can be present in Same (or) Usually defined at the beginning of
different segment as that of the program in the same segment.
main program.

Procedures and Macros 196