1 Axi Jobs nearby Mysore

Role Overview: As a DV Lead Engineer at TekWissen in Mysore, your responsibilities will include: Key Responsibilities: - Build test plan, tests, coverage assertions from Specification. - Architect and build testbench and testbench components with expertise in UVM, SV, and C SVA. - Demonstrate familiarity with industry protocols like AXI, APB, AHB, PCIe, SoC. - Showcase strong debugging skills and experience with industry standard EDA tools such as Synopsys, Cadence simulators, and debugging tools. Qualifications Required: - Experience with scripting and automation. - Demonstrated leadership and collaboration abilities, including mentoring, cross-functional communication, UPF-simulations, GLS, and a proactive approach to automation. - Exposure to SOC verification and Formal verification methodologies. Please note that at TekWissen Group, we are an equal opportunity employer committed to supporting workforce diversity.,

As an experienced RTL designer, you will be responsible for working on complex high-performance RTL design, with a focus on DSP or processor-based sub-systems. Your expertise in hardware design using Verilog, System Verilog, or VHDL, along with knowledge of on-chip bus interface protocols such as AXI, APB, and AHB, will be essential for success in this role. Additionally, your experience with model development, RTL to gate synthesis, design rule checking, and scripting languages will be valuable assets. Key Responsibilities: - Develop micro-architecture, design, and program specific documentation - Design and model compute ASIC modules and sub-systems - Own RTL development, ensuring power, performance, area, and timing goals are met - Resolve architecture, design, or verification problems using sound ASIC engineering practices - Utilize various design tools to check and improve design quality - Assist the design verification team in executing the functional verification strategy - Generate innovative ideas for IP core and process flow improvements Qualifications Required: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 2+ years of Hardware Engineering experience - OR Master's degree in Computer Science, Electrical/Electronics Engineering, or related field with 1+ year of Hardware Engineering experience - OR PhD in Computer Science, Electrical/Electronics Engineering, or related field About Qualcomm: Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please contact Qualcomm at disability-accommodations@qualcomm.com. The company values workplace accessibility and ensures compliance with applicable policies and procedures. Note: The job description does not include any additional details about the company.,

As a semiconductor company, ST believes in the power of technology to drive innovation and make a positive impact on people, business, and society. You will be part of a global business of diverse creators and makers from over 115 nationalities, dedicated to pushing boundaries and driving innovation around the world. Join ST to unlock your potential and be a part of shaping the future with cutting-edge technology. **Role Overview:** As part of the verification team, your main responsibility will be to drive towards zero-defect by developing verification test benches, verification components, and test cases for simulation. You will also be involved in debugging failures and creating simulation cases for various studies across standalone IPs, Subsystem level, and SoC level. **Key Responsibilities:** - Verification planning, reviewing, and architecture definition - Development of verification test bench components like drivers, monitors, and response checkers utilizing advanced UVM VIPs - Creation of direct and constrained-random stimulus and analysis of RTL code - Strong skills in debug, failure re-creation, and root cause analysis - Gate level simulations and debugging - Test pattern debugging and testing for verification - Continuous improvement of verification methods and tools - Assertion based verification and automated testcase/scenario generation **Qualification Required:** - Bachelors/Masters in Electronics or Computer Science - Proficiency in VHDL/Verilog, System Verilog, and C language - Experience with OVM/UVM and Class based verification methodologies - Deep understanding of ARM multi-core based SoC architecture - Familiarity with AMBA AXI, AHB, and APB bus protocols - Knowledge of NIC/FlexNOC interconnect architecture - Understanding of ARM Based Core, Trace, and Debug infrastructure - Scripting proficiency in PERL, Python, and UNIX/LINUX - Experience with simulation tools like Xcelium/VCS/Questasim and assertion tools like Perspec - Exposure to defect and version management tools ST is committed to innovating for a smarter and greener future in a responsible and sustainable way. If you are passionate about technology and want to be part of a team that drives innovation, join ST and shape the future with us. Visit st.com/careers to learn more.,

You will be joining 7Rays Semiconductors, a company that specializes in providing end-to-end VLSI design solutions to help clients achieve execution excellence. The team of experts at 7Rays Semiconductors is proficient in various areas such as architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologies. The company is dedicated to building effective partnerships with clients to deliver high-quality solutions tailored to their specific needs. With a proven track record of successful projects, 7Rays Semiconductors is committed to excellence and innovation in semiconductor design. **Key Responsibilities:** - Experience in interconnect protocols such as PCIe and Ethernet. - Proficiency in memory protocols including DDR, LPDDR, and preferably HBM. - Understanding of AXI, ACE, and CHI protocols, with a strong emphasis on AXI. - Knowledge of DMA usage. - Proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM). - Experience in using standard Verification IP (VIP) in testbenches, preferably Synopsys VIP. - Familiarity with AI/ML network concepts (desirable). - Additional knowledge of Perl/Tcl scripting will be advantageous. **Qualifications Required:** - Bachelor's Degree in Electrical, Electronics, or Computer Engineering.,

You will be responsible for building emulation models from RTL for IP/SS or SOC and bringing up the emulation model, as an Emulation Engineer/Validation Engineer. Your tasks will include developing content, working with RTL designers and Verification engineers to resolve emulation build issues, and collaborating with customers and vendors to support emulation issues. Your role will require hands-on experience with Emulators like Palladium, Veloce, Zebu, strong skills in porting ASIC RTL on Emulators, and generating Emulation builds. Additionally, you should be proficient in various domains/functions such as AXI, APB, AHB, SPI, I2C, UART, PCIe, USB, Ethernet, CXL, Ucie, C2C, D2D, DDR4/5/6, LPDDR3/4/5/6, and NoC/Interconnect verification. Qualifications Required: - B.Tech/M.Tech in Electronics/VLSI or equivalent - Familiarity with SV/UVM methodology Key Responsibilities: - Hands-on experience with Emulators like Palladium, Veloce, Zebu - Strong in porting ASIC RTL on Emulators and generating Emulation builds - Proficiency in domains/functions such as AXI, APB, AHB, SPI, I2C, UART, PCIe, USB, Ethernet, CXL, Ucie, C2C, D2D, DDR4/5/6, LPDDR3/4/5/6, and NoC/Interconnect verification - Involvement in HW-SW co-verification, Boot, Reset, Clock verification, Low Power Verification, Regression management and debug, Development of Scoreboard, Checkers, and tracker, and using scripting languages like PERL, PYTHON.,

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. **Key Responsibilities:** - Full chip design for multi-million gates SoC - Digital design and development (RTL) - Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification - Manage IP dependencies, planning and tracking of all front end design related tasks - Driving the project milestones across the design, verification and physical implementations **Qualifications Required:** - Minimum 15 years of solid experience in SoC design - Developing architecture and micro-architecture from specs - Understanding of various bus protocols AHB, AXI and peripherals like USB, SDCC - Understanding of Memory controller designs and Microprocessors is an added advantage - Understanding of Chip IO design and packaging is an added advantage - Familiarity with various bus protocols like AHB, AXI is highly desired - Ability to review top level test plans - Expertise in Synopsys Design Compiler Synthesis and formal verification with Cadence LEC - Working knowledge of timing closure is a must - Good post silicon bring up and debug experience - SoC integration exposure and its challenges - Exposure to design verification aspects - SoC specification to GDS to commercialization experience is highly desired - Ability to make effective and timely decisions, even with incomplete information - Strong communication and leadership skills to ensure effective communication with Program Applicants - Provides direction, mentoring, and leadership to small to medium-sized groups Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities. If you require accommodation during the application/hiring process, you may contact Qualcomm via email at disability-accomodations@qualcomm.com or call Qualcomm's toll-free number.,

As a Senior/Lead System Firmware Engineer, your role involves developing application, drivers, and wrapper code for RF Transceiver and SoC from companies like MaxLinear, ADI, TI, NXP, Xilinx. Your key responsibilities will include: - Strong knowledge in Embedded C, Matlab/Python - Coding experience in C/C++ and networking protocols - Writing drivers for devices with interfaces such as AXI, UART, SPI, I2C, GPIO - Programming peripherals such as ADC, DAC, IO Expander, I2C Expanders, EEPROM, RF Power sensors, and FPGA - Understanding message queues, shared memory, processes, threads, scheduler - Hands-on experience in handling Oscilloscopes, Logic/protocol Analyzers, Multimeters - Understanding of debuggers including JTAG, GDB - Understanding of baseband control system, state machines, and configuration management - Good documentation skills for High-level design and Low-level design Qualifications required for this role include: - B.E/B.TECH/M.Tech in Electronics/Electrical/Telecommunication Engineering or related field - 4-6 years of relevant experience - Knowledge of Embedded build environment and Embedded Linux Operating System This position is based in Bangalore and involves working on cutting-edge technologies in the field of firmware engineering.,

As a SOC DV (SI58FT RM 3600) you will be responsible for: - Having a good understanding of AMBA AXI, AHB, APB protocols. - Being well versed with SystemVerilog. - Having basic knowledge of C language. - Possessing good debug skills. - Having basic knowledge of UVM. Qualifications required: - Strong understanding of AMBA AXI, AHB, APB protocols. - Proficiency in SystemVerilog. - Basic knowledge of C language. - Strong debug skills. - Familiarity with UVM.,

As a Technology Analyst at Infosys BPM, you will be responsible for working with a range of technologies and tools to deliver high-quality solutions. Your primary responsibilities will include: - Minimum 3-to-4-year experience working with Microservices, Hibernate, Spring JPA - Minimum 3-to-4-year experience with Microsoft SQL Server or any database - Minimum 3 years of experience with JavaScript and jQuery - Minimum 4-year experience with Spring framework, Spring boot, Spring MVC - Must have SOAP OR REST Web services development experience with Apache Axis or Spring - Must have strong knowledge in Object-oriented development, version control (SVN, Git), release management, change management - JBPM experience is preferable - Should have experience in Agile Methodology (Scrum) Qualifications required for this role include: - Mandatory skills in JAVA, Hibernate, Spring boot, Microsoft SQL, Microservice - Additional skills in Angular, Junit, ANT, Maven, Hudson, SVN, and Git If you join Infosys BPM, you will be part of a dynamic team that values innovation and collaboration. We look forward to welcoming you to our team.,

Role Overview: At Blueberry Semiconductors, you have the opportunity to join a verification team dedicated to a Next-Gen AI SoC for Edge & Automotive applications. As a Lead Verification Engineer, you will play a crucial role in driving the verification strategy for a full-fledged AI SoC. This involves building verification frameworks from scratch, influencing design decisions, and ensuring performance and quality meet the highest automotive-grade standards. You will work alongside industry experts and be part of an exciting journey in developing cutting-edge technologies for edge computing and automotive intelligence. Key Responsibilities: - Own the SoC-level verification strategy, planning, and closure. - Deliver exceptional verification quality and support designers effectively. - Create scalable UVM environments for multi-protocol data fabrics. - Drive coverage metrics, randomization quality, and regression efficiency. - Mentor mid-level engineers, contribute to verification methodology evolution, and work closely with cross-functional teams including architecture, design, DFT, and prototyping. Qualification Required: - 10+ years of hands-on experience in SoC/IP verification using SystemVerilog & UVM. - Strong background in protocols such as PCIe, Ethernet, UCIe, AXI, and Interlaken. - Proficient in debugging, performance optimization, and committed to achieving first-pass success silicon. Additional Company Details: At Blueberry, you will collaborate with professionals who have a track record of developing and delivering numerous complex SoCs. The company values depth, curiosity, and ownership, offering continuous learning opportunities where your contributions directly impact silicon products that are deployed globally. Join Blueberry and be part of a team that is at the forefront of innovation in AI SoC verification for edge and automotive applications.,

As a Senior FPGA Engineer at izmo Microsystems Ltd., you will play a crucial role in architecting and implementing FPGA-based systems for high-performance digital logic applications. With a minimum of 3 to 6+ years of hands-on experience in FPGA development, you will be responsible for various key tasks and collaborate with cross-functional teams to ensure the success of next-generation electronic systems. Key Responsibilities: - Architect and implement FPGA-based systems using VHDL or Verilog to meet high-performance requirements. - Develop RTL code, simulation testbenches, and synthesis scripts while considering timing, power, and area constraints. - Integrate FPGA designs with embedded processors, memory interfaces, and peripheral components effectively. - Collaborate with hardware teams on custom PCB designs involving modern FPGA/SoC devices. - Create simulation and verification environments using tools like ModelSim, Questa, or Vivado Simulator. - Perform lab-based debugging and bring-up using oscilloscopes, logic analyzers, and JTAG tools. - Conduct performance analysis and optimization of FPGA implementations for throughput and latency improvements. - Define hardware/software interfaces and protocols to ensure seamless communication between FPGA and host systems. - Support board-level integration and validation, including signal integrity and timing closure. - Engage with vendors for FPGA component selection, IP licensing, and toolchain support. - Participate in design reviews, documentation, and cross-functional meetings. Technical Skills Required: - Strong command of VHDL and/or Verilog for FPGA development. - Experience with FPGA toolchains such as Xilinx Vivado, Intel Quartus, or Lattice Diamond. - Proficiency in timing analysis & constraints using tools like SDC, XDC, and STA for timing closure. - Familiarity with high-speed interfaces like PCIe, DDR, Ethernet, MIPI, and low-speed protocols including SPI, I2C, UART, GPIO. - Knowledge of embedded integration using AXI, Avalon, AMBA buses for SoC designs. - Ability to develop testbenches using UVM, SystemVerilog, or custom frameworks, and work with simulation tools like ModelSim, Questa, Vivado Simulator, or Synopsys VCS. - Experience with debugging tools like Chipscope, SignalTap, or custom logic analyzers, and consideration of power and thermal aspects in FPGA deployments. Desired Skills: - Ability to lead and mentor development teams effectively. - Collaborative work approach in cross-functional environments to contribute to overall team success. Educational Qualifications & Experience: - Master's/Bachelor's degree in Electronics and Communications or equivalent. - 3 to 6+ years of professional experience in FPGA development. Join izmo Microsystems Ltd. in Bangalore as a Senior FPGA Engineer and be a part of a leading semiconductor and systems company driving innovation in electronic systems development.,

You are passionate about precision machining and seeking to work with cutting-edge CNC technology to contribute to world-class aerospace and automotive components. Join Ferra, a global leader in precision engineering. Role Overview: - Operate CNC Milling Machines independently. - Program 2D parts using Haas, Fanuc & Heidenhain systems. - Collaborate with CAM Programmers on development jobs. - Ensure top-notch quality using precision measuring tools. Key Responsibilities: - Diploma or ITI in Mechanical / Industrial / Aerospace / Automotive Engineering. - 3-5 years of experience in CNC VMC / Turning / Haas Machine operations. - Prior experience in Aerospace or Automotive manufacturing is preferred. - Knowledge of CAD/CAM & CNC Turning is an advantage. Be part of a team that makes precision possible! Send your CV to Nidhi.Tiwari@ferra-group.com.,

You will be responsible for the following key responsibilities: - Efficiently operating 3, 4, or 5-axis CNC milling machines. - Setting up the machine, setting tools and offsets, and understanding or loading programs. - Inspecting finished parts for critical dimensions and ensuring adherence to tolerances using measurement instruments. - Reading and interpreting technical drawings, blueprints, and GD&T specifications. - Maintaining production efficiency, keeping logs, and ensuring a clean and safe work area (5S). You are required to have the following skills and qualifications: - Hands-on experience with CNC machine operation and setting, often in a specific industry like aerospace. - Proficiency with various machine controls (e.g., Fanuc, Siemens) and measurement instruments. - The ability to accurately read and interpret technical drawings is mandatory. - A high degree of attention to detail is necessary for achieving the required precision. - The job may require physical strength and stamina to stand for long periods and lift parts. - A technical certification (e.g., ITI), diploma, or bachelor's degree in a related field is often preferred.,

Role Overview: You will be part of the Common Hardware Group, specializing in FPGA verification for both data-path and control-path FPGAs. Your responsibilities will include crafting DV architecture, test plans, and coverage plans, leveraging industry-standard tools for simulation, linting, coverage, and assertions to ensure bug-free RTL for first-pass success. Collaboration with remote teams in the US and Italy will be essential for successful project execution. Key Responsibilities: - Develop comprehensive FPGA verification strategies, methodologies, and detailed test plans from concept to sign-off. - Design and implement robust testbenches using UVM/System Verilog, incorporating BFMs, checkers, monitors, and scoreboards. - Manage functional coverage analysis, regression testing, root cause analysis, and debugging of failures. - Lead and mentor junior verification engineers, provide technical guidance, and drive successful project execution. - Collaborate with RTL designers to understand specifications and support hardware bring-up and integration. - Promote continuous improvement in verification methodologies and processes. - Facilitate knowledge sharing in the team through activities like brownbags, demos, and design sessions. Qualifications Required: - Bachelor's degree/Master's degree in electrical or computer engineering with over 12 years of experience in FPGA/ASIC verification, including leadership roles. - Expertise in System Verilog, UVM, Verilog/VHDL, and simulation tools such as VCS, QuestaSim, DVE, and Verdi. - Extensive experience with high-speed interfaces like PCIe, Ethernet, AXI, DDR, or similar. - Familiarity with AMD (Xilinx), Intel (Altera), or Microsemi FPGAs. - Proficiency in scripting languages like Perl, Tcl, or Python. - Strong problem-solving abilities, excellent communication skills, sense of ownership, and collaborative team spirit. Additional Company Details: Omitted as it is not present in the provided job description.,

You will be responsible for defining micro-architecture specifications and detailed designs for interconnects (NoCs/NICs) and related IPs based on system-level use cases. You will collaborate with SoC, verification, physical design, floorplan, and core teams to develop optimal NoC topology for area and performance. Additionally, you will innovate partitioning strategies for implementation-friendly interconnect designs, own coherent interconnect solutions (Full/IO) across cores and subsystems, ensure interconnect meets performance targets, and validate assumptions with the silicon validation team. Furthermore, you will partner with third-party NoC technology providers to shape future interconnect technology for NXP products. Qualifications required for this position are: - BTech/MTech/Ph.D. in Electrical/Computer Engineering or similar disciplines with 5-10 years of relevant experience. - Strong understanding of interconnect protocols: AHB, AXI, ACE, ACE-Lite, NoC concepts. - Familiarity with tools like Arteris FlexNoC, ARM Socrates. - Proficiency in scripting languages: PERL/Python. - Solid knowledge of Digital Design and RTL development; hands-on experience with SoC Design and Verilog RTL coding. - Working knowledge of Synthesis, DFT, verification, and silicon debug. - Experience with Lint, CDC, PLDRC, CLP, etc. If you join us, you will have the opportunity to: - Work on cutting-edge semiconductor solutions - Be part of a collaborative, growth-driven team - Have opportunities for learning and career advancement Please send your resume to vinayak_shrivastava@yahoo.com or dhruv.arya@hotmail.com.,

As an IP Level Verification Engineer at our company, you will be responsible for independently owning the verification of IP level modules end to end with continuous enhancements. Key Responsibilities: - Verification of IP level modules - Continuous enhancements of verification processes Qualifications Required: - Minimum Qualifications: Verification aptitude, Expertise in SV-UVM, Coverage Closure, RTL debug till root causing, Low Power Verification/UPF, GLS, Assertions based verification, DPI, Testbench building - Familiarity with bus protocols like AHB, AXI, ARM based system architecture, emulation (ex: Veloce), Scripting language like Perl - Excellent problem-solving skills - Strong communication and teamwork skills - Preferred Qualifications: Formal Verification concepts and working knowledge, C/C++, working knowledge on camera are a plus In addition to the above, our company values education and requires candidates to have a BE/BTech/ME/MTech/MS in Electrical Engineering and/or Electronics, Vlsi from a reputed university with preferably distinction. If you find this opportunity exciting and have the required qualifications, we welcome you to apply. Please send your resumes to hr@smartvlsi.com. (Note: Location for the job can be in Bangalore, Hyderabad, Chennai, or Delhi.),

Role Overview: You will be part of the Common Hardware Group specializing in FPGA development, involving sophisticated data-path and challenging control-path FPGAs. Your responsibilities will include crafting the FPGA functional specification document, RTL coding, image generation, and validation. Collaboration with remote teams in the US and Italy is essential. The ultimate goal is to deliver bug-free RTL for first-pass success on the board. Key Responsibilities: - Design and implement FPGAs - Participate in architecture definition, implementation, and verification phases - Develop detailed design specifications and test plans - Implement block-level RTL, perform synthesis, and achieve timing closure - Work with multi-functional teams including hardware, software, diagnostics, and signal integrity groups - Assist in complex subsystem level lab bring-up, integration, and unit test validation - Contribute to the design process adoption within the team - Promote continuous improvement in design methodologies and processes - Lead and mentor junior design engineers, offer technical guidance, and drive successful project execution - Facilitate/encourage knowledge sharing in the team Qualification Required: - Educational Background: 12+ years of experience in FPGA designs with MTech/BTech in EE/EC domain - Experience with Xilinx, Altera, and Microsemi FPGAs or proficiency in HDL languages (Verilog, VHDL, System Verilog) - Hands-on experience with FPGA vendor tools like Vivado, Quartus, and Libero - Hands-on experience with Ethernet-based protocols, PCIe, AXI, memory controllers, OTN, I2C, SPI, UART, etc. Familiarity with simulation flow like UVM and VMM is advantageous - Basic knowledge of Unix system and script tool - Knowledge of signal integrity and system bring-up preferred - Good English written and verbal communications - Self-motivation, partnership, and strong interpersonal skills are required Additional Details: At Cisco, innovation has been a core value for 40 years, revolutionizing how data and infrastructure connect and protect organizations in the AI era and beyond. Cisco solutions provide unparalleled security, visibility, and insights across the digital footprint. The collaborative environment encourages growth, innovation, and building meaningful solutions globally. Cisco's impact is felt everywhere, driven by a worldwide network of experts working together to create significant advancements.,

Role Overview: You will be part of the Common Hardware Group, specializing in FPGA development, focusing on both sophisticated data-path and challenging control-path FPGAs. Your responsibilities will include crafting FPGA functional specifications, RTL coding, image generation, and validation. You will use industry-standard tools for FPGA design, incorporating quality metrics to ensure a robust process. Your main goal will be to deliver bug-free RTL for first-pass success on the board. Additionally, you will collaborate closely with remote teams based in the US and Italy. Key Responsibilities: - Create and review test & coverage plans. - Design and implement DV Architecture. - Develop constrained random test cases. - Specify and analyze coverage. - Design and implement reference models. - Automate the regression test suite. - Collaborate with architects, designers, and software engineers in a remote team setup. - Contribute to adopting new methodologies in the team. - Provide lab debug simulation support. Qualification Required: - Proficiency in Verilog & System Verilog. - Strong verification skills including planning, problem-solving, debugging, adversarial testing, and constraint random testing. - Hands-on experience with UVM & VMM methodologies. - Ability to architect the test-plan & test bench. - Knowledge of OTN, Ethernet-based protocols, PCIe, AXI, I2C, SPI, MDIO, and memory controllers is advantageous. - Familiarity with VCS simulation flow, Verdi, coverage, and assertions is desirable. Relevant Experience: - 4 to 7 years of hands-on experience in functional verification. Additional Details: Cisco is revolutionizing how data and infrastructure connect and protect organizations in the AI era and beyond. With 40 years of fearless innovation, Cisco creates solutions that empower the collaboration between humans and technology in the physical and digital worlds. These solutions offer customers unparalleled security, visibility, and insights across the digital footprint. Cisco's depth of technology fuels experimentation and the creation of meaningful solutions. The global network of experts provides limitless opportunities to grow and build impactful solutions collaboratively. Working at Cisco means collaborating with empathy to make significant global achievements. Cisco's solutions have a global impact, and your journey with Cisco starts here.,

Role Overview: As an Electrical Engineer in the VLSI (Silicon engineering) field, you will be responsible for designing and developing complex electrical systems. Your main focus will be on utilizing your expertise in security protocols, real boot processes, Debug mode, Warm reset, power management, and LP-UPF. Additionally, you will need to have proficiency in Trace, Cross-Trigger, JTAG, and AXI protocols to excel in this role. Key Responsibilities: - Design and develop complex electrical systems - Utilize expertise in security protocols, real boot processes, Debug mode, Warm reset, power management, and LP-UPF - Demonstrate proficiency in Trace, Cross-Trigger, JTAG, and AXI protocols - Collaborate with team members to ensure project success - Stay updated on the latest industry trends and technologies Qualifications Required: - Bachelors or Masters degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech) - Strong communication skills, both written and verbal - At least 8 years of professional experience in the field - Previous experience with AMD is considered an advantage Note: Interested candidates are required to submit a detailed resume highlighting their relevant experience and skills. Please note that the job is a Full-Time position located in India, with options in Bangalore and Hyderabad.,

As a Silicon Design Engineer at AMD, you will work on SOC level verification activities for Graphics IPs and subsystems in complex SOCs. Your responsibilities will include verifying and integrating IPs, coordinating with various teams for SOC integration, developing test plans, coding test cases, checkers, UVM agents, scoreboards, and assertions. Key Responsibilities: - Understand and work with IPs like Video processing unit, Display controller, Graphics controller, and NOC. - Deploy IPs to complex SOCs and conduct integration testing. - Code test cases, debug issues, handle regressions, and develop UVM agent coding, checkers coding, scoreboard coding, and assertions coding. Preferred Experience: - Knowledge of graphics IPs. - Expertise in IP, Subsystem, and SOC Verification with a focus on Integration and verification tools. - Hands-on experience in SOC Verification activities, UVM, System Verilog, C++, HW/SW co-verification, and more. - Familiarity with design/verification tools like VCS, Verdi, SOC Connectivity, SV assertions, HW-SW co-simulations, and UPF/CPF flows. - Strong understanding of System integration, Verification Methodologies, and Boot-up sequence. - Experience with JIRA-based project management is a plus. Qualifications: - BE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE/CSE. - Approximately 5-14 years of strong DV experience in IP, Sub System & SOC Verification, IP deployment/integration. Join AMD to be part of a culture that values innovation, collaboration, and pushing the limits of technology to solve the world's most important challenges. Shape the future of AI and beyond with us as we advance your career.,