3 Pdl Jobs nearby Hassan

As a software developer, you will be responsible for: - Developing experience of PDLs (peripheral drivers and libraries) like crypto, smartio, etc. - Developing experience of Hardware Abstraction Layer (HAL) - Developing experience of Middleware - Developing Connectivity Applications for RTOS platforms that use BT/WiFi Connectivity Silicon - Hands-on experience with one or more of the following: Free RTOS, ThreadX, and Zephyr - Hands-on experience with networking interfaces and networking protocol stack for RTOS - Experience in Matter SW stack is a plus - Some validation experience is expected - End-to-End testing of individual features in RTOS - End-to-End testing of the product - Integration testing with multiple RTOS assets, release management to internal SW validation teams No additional details about the company are present in the job description.,

Role Overview: You will be responsible for developing Design for Testability/Design for Debugging (DFT/DFD) flows and methodologies. Your main focus will be on developing DFT specifications, DFT architecture, fault modeling, test standards, and industry tools related to DFT/DFD/Automatic Test Pattern Generation (ATPG) for Application-Specific Integrated Circuit (ASIC) DFT, synthesis, simulation, and verification flow. Key Responsibilities: - Develop DFT specifications and DFT architecture - Perform fault modeling and define test standards - Work with industry tools for DFT/DFD/ATPG for ASIC DFT - Collaborate with cross-functional teams including Design for testing (DFT) engineers, RTL Engineers, SoC DFT, and Product Engineering team - Implement Subsystem level DFT scan and Memory Built-In Self Test (MBIST) Architecture with multiple voltage, power domains - Automate the DFT flow by writing scripts - Develop tests for Production in the Automatic Test Equipment (ATE) flow - Collaborate with the DFT team to deliver multiple Subsystems in a SoC Qualifications Required: - Bachelor's or Master's degree in a relevant field - Minimum of 5 years of experience in Design for Testability/Design for Debugging (DFT/DFD) flows and methodologies - Experience with DFT for a subsystem with multiple physical partitions - Familiarity with Internal JTAG (IJTAG) ICL, Procedural Description Language (PDL) terminology, ICL extraction, Instrument Connectivity Language (ICL) modeling with Siemens Tessent Tool, Spyglass-DFT, DFT Scan constraints, and evaluating DFT Static Timing Analysis (STA) paths - Knowledge of coding languages like Perl or Python - Familiarity with DFT techniques like SSN and HighBandwidth IJTAG Company Details: You will be part of a team developing custom silicon solutions for Google's direct-to-consumer products. Your work will contribute to shaping the future of hardware experiences, driving innovation in products that are used and loved by millions worldwide. The mission of Google to organize the world's information and make it universally accessible and useful will guide your work, combining the best of Google AI, Software, and Hardware to create radically helpful experiences.,

As a Senior Member of Technical Staff (SMTS) Silicon Design Engineer at AMD, you will play a crucial role in the Circuit Technology team, focusing on DFT Methodology/Architect/RTL execution for high-speed SERDES Phys, Next-gen Memory Phys, and Die-to-Die interconnect IPs. Your tasks will involve defining the DFX architecture for high-speed PHYs and die-to-die connectivity IP designs, RTL coding, supporting scan stitching, developing timing constraints, assisting with ATPG, and post-silicon bringup. Join a dynamic team at AMD that delivers cutting-edge IPs essential for every SOC. Key Responsibilities: - Lead and define Design for Test/Debug/Yield Features specific to PHYs. - Implement DFX features into RTL using Verilog. - Comprehend DFX Architectures and micro-architectures. - Utilize JTAG (1149.1/1687/1500)/IJTAG, Scan Compression (EDT, SSH), and at-speed scan testing implementation. - Conduct gate-level simulation using Synopsys VCS and Verdi. - Perform Spyglass bringup and analysis for scan readiness/test coverage gaps. - Plan, implement, and verify MBIST. - Assist Test Engineering in planning, patterns, and debug. - Support silicon bring-up and debug. - Develop efficient DFx flows and methodology compatible with front-end and physical design flows. Preferred Experience: - Proficiency in industry-standard ATPG and DFx insertion CAD tools. - Familiarity with industry-standard DFX methodology: e.g., Streaming Scan Network (SSN), IJTAG, ICL/PDL, etc. - Knowledge of SystemVerilog and UVM. - Expertise in RTL coding for DFx logic, including lock-up latches, clock gates, and scan anchors. - Understanding of low-power design flows such as power gating, multi-Vt, and voltage scaling. - Strong grasp of high-performance, low-power design fundamentals. - Familiarity with fault models including Stuck-at, Transition, Gate-Exhaustive, Path Delay, IDDQ, and Cell Aware. - Exposure to post-silicon testing and tester pattern debug is advantageous. - Excellent problem-solving and debug skills across various design hierarchies. Academic Credentials: - BS/MS/PhD in EE/ECE/CE/CS with industry experience in advanced DFx techniques. Join AMD and be a part of a culture that values innovation, problem-solving, and collaboration. Together, we can advance technology and shape the future of computing.,

As an Authorization & Review specialist, you will be responsible for reviewing and signing various documents including Exhibit Batch Packing Records, Batch Protocols, Batch Reports, Packaging Trial Batch Protocols, Master Packaging Records, and Bill of Materials. Your attention to detail is crucial in ensuring accuracy and compliance with regulatory standards. Your key responsibilities will include: - Preparing and reviewing Exhibit Batch Batch Production Records (BPRs) - Ensuring strict adherence to cGMP, GDP, regulatory compliance, and Quality Management System (QMS) activities within the PDL department In terms of operational oversight, you will: - Monitor the execution of Scale-up, Feasibility, and Exhibit batches in the packaging area - Prevent mix-ups and cross-contamination - Manage incidents, deviations, and change controls related to packaging - Ensure readiness and execution of Moisture Vapor Transmission Rate (MVTR) studies Your role will also involve cross-functional coordination where you will: - Collaborate with SCM, F&D, and P&D teams for product transfers - Prepare packaging plans for scale-up, exhibit, and validation batches in coordination with relevant departments Additionally, your technical evaluation and execution tasks will include: - Evaluating change parts required for various batches - Conducting machine equivalency comparisons - Executing packaging trials, preparing reports, and maintaining lab notebooks Furthermore, your problem-solving skills and commitment to continuous improvement will be essential as you: - Troubleshoot packaging-related issues - Conduct investigations and root cause analysis - Undertake any other duties assigned by superiors to ensure operational efficiency and compliance within the department.,

As an Applications Development Technology Lead Analyst, you will be responsible for establishing and implementing new or revised application systems and programs in coordination with the Technology team. Your role will involve leading applications systems analysis and programming activities to ensure the successful deployment of new products and process improvements. **Responsibilities:** - Partner with multiple management teams to integrate functions and identify necessary system enhancements - Resolve high impact problems/projects through in-depth evaluation of complex business processes - Provide expertise in applications programming and ensure application design aligns with the overall architecture blueprint - Develop standards for coding, testing, debugging, and implementation - Gain comprehensive knowledge of how different areas of business integrate to achieve goals - Analyze issues and develop innovative solutions - Mentor mid-level developers and analysts - Assess risk in business decisions and ensure compliance with laws and regulations **Qualifications:** - 10+ years of experience in Apps Development role - Expertise in building ETL applications using Ab Initio, MHub, Express>it - Experience in PDLs, Advanced Abinitio Concepts - Extensive experience in system analysis and programming of software applications - Experience in managing and implementing successful projects - Subject Matter Expert (SME) in at least one area of Applications Development - Ability to adjust priorities quickly - Demonstrated leadership and project management skills - Clear and concise written and verbal communication skills **Education:** - Bachelors degree/University degree or equivalent experience - Masters degree preferred Please note that this job description provides a high-level overview of the work performed. Other job-related duties may be assigned as required.,

Role Overview: As the Site QA Head at Halol, you will be responsible for managing overall quality assurance oversight and site activities related to quality systems. This includes documentation review, SOP updates, in-process quality assurance, sampling and batch release, preventive maintenance/calibration/qualification/validation, internal audits, compliance, quality oversight of electronic systems, budget management, continuous improvement of quality systems, RA support, monitoring of pest control, and retention sample management as per Good Manufacturing Practices requirements. You will ensure individual compliance with regulatory requirements, GxPs, and applicable department programs. Key Responsibilities: - Define operational strategy and road map for quality assurance management at the site in alignment with Sun Pharma compliance, product quality management objectives, and regulatory requirements. - Manage site Quality Assurance activities and resources effectively to ensure smooth QA operations. - Provide strong leadership and expertise to achieve all Quality Assurance goals at the site. - Identify and implement solutions to enhance existing site quality assurance systems and processes. - Coach and develop direct and indirect reports through performance feedback, reviews, and training opportunities. - Develop and manage site quality assurance revenue, capital budgets, and headcount projections. - Ensure availability of adequate resources, including manpower, to maintain compliance with GXP requirements. - Prepare the site for regulatory agency inspections/internal audits and implement corrective actions as needed. - Conduct Quality Management Reviews, monitor performance, and identify improvement areas. - Investigate market complaints, failures, and deviations, and implement corrective and preventive actions within set timelines. - Ensure compliance with regulatory requirements on product, process, and release procedures. - Collaborate effectively with all Sun Pharma sites and leverage synergies. - Review and track quality assurance metrics and drive improvements in deviation, change control, CAPA effectiveness, market complaints, etc. - Monitor vendor quality performance and ensure compliance with supply chain management/Global Material Sourcing processes. - Provide inputs to manufacturing, R&D, and PDL processes to ensure Quality by Design. - Design, implement, and ensure compliance with quality-related SOPs, Policies, Standards, and QA systems at the site. - Facilitate internal and regulatory agency audits and address audit findings comprehensively. - Monitor industry trends and identify opportunities to enhance site quality assurance management and processes. - Fulfill training requirements of quality assurance employees. - Ensure implementation and adherence to quality policies, standards, and procedures for computerized systems. - Review and approve documents as per quality procedures. - Collaborate with site and corporate functions for the implementation of new initiatives. Qualification Required: - B.Pharm / M.Pharm - 17 to 18 years of experience in Quality Assurance, specifically in OSD.,