Skip to content
View dtcxzyw's full-sized avatar
🎯
Focusing
🎯
Focusing
  • Shanghai
  • 07:15 (UTC +08:00)

Highlights

  • Pro

Organizations

@Infinideastudio @llvm

Block or report dtcxzyw

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Starred repositories

5 stars written in Scala
Clear filter

Open-source high-performance RISC-V processor

Scala 6,729 833 Updated Nov 12, 2025

Chisel: A Modern Hardware Design Language

Scala 4,467 640 Updated Nov 12, 2025

RISC-V SoC designed by students in UCAS

Scala 1,487 255 Updated Nov 12, 2025

Verification framework and tool for higher-order Scala programs

Scala 387 57 Updated Sep 18, 2025

SUSTech CS202 (Computer Organization) Project, with CPU hardware implemented in Chisel(Scala) and software cross-compiled from Rust.

Scala 34 Updated Jun 16, 2023