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hdl

Verilog is a widely-used hardware description language (HDL) that enables designers to model, simulate, and synthesize digital circuits. It provides a text-based format for specifying the structure and behavior of electronic systems, making it easier to design complex hardware components such as microprocessors, memory, and communication devices.

Here are 22 public repositories matching this topic...

its-hmny / nand2tetris

Collection of projects for the nand2tetris course

go toolchain compiler nand2tetris hdl

Updated Sep 8, 2025
Hack

npanuhin / CU-Computer-Architecture

Homework solutions for the Computer Architecture course at Constructor University (2024/2025)

hack asm nand2tetris hdl

Updated Sep 5, 2025
Hack

R0h1th-1DD4E2 / nand2tetris

Build a Modern Computer from First Principles. A primitive computer.

assembly-language computer-architecture logic-gates hdl

Updated Jul 18, 2025
Hack

waasiq / hack-computer

Implementation of 16 Bit Computer

assembly assembler computer-architecture hdl

Updated Sep 9, 2024
Hack

maxdemaio / hack-computer

Hack computer system built as described in "The Elements of Computing Systems" and Nand2Tetris I/II.

java hack compiler virtual-machine assembly assembler computer-architecture hdl machine-language

Updated Jun 2, 2024
Hack

IlanIwumbwe / NandToTetris

16-bit computing system from "THE ELEMENTS OF COMPUTING SYSTEMS" written by Noam Nisan and Shimon Schocken.

compiler assembler hdl low-level-programming 16-bit-cpu

Updated Apr 21, 2024
Hack

OscarNaslundCuesta / nand2tetris

Completed nand2tetris part 1 & 2 as part of the course Computer Systems from KTH. Langauges: Hardware description language (hdl), Assembly (Hack), Python, VM-language

python hack stack compiler assembly assembler operating-system logic-gates hdl vm-language

Updated Feb 12, 2024
Hack

lucas89901 / nand2tetris

Projects of the "From Nand to Tetris" course, taught in NTU CSIE's "Introduction to Computer" course by Professor Yung-Yu Chuang (2023 fall).

hack compiler assembler nand2tetris jack hdl vm-translator

Updated Jan 29, 2024
Hack

thesems / nand2tetris

Project solutions from the popular course nand2tetris.

computer-architecture hdl low-level-programming machine-language

Updated Dec 2, 2023
Hack

LysanderT / Nand2Tetris

An archive of projects implemented by my self in the course series [Nand2Tetris](https://www.nand2tetris.org/). (mainly in c++)

compiler cpp assembler os nand2tetris hdl vmtranslator

Updated Oct 17, 2023
Hack

dcbuild3r / nand2tetris

Solving through nand2tetris.org challenges

computer-science chips hdl

Updated Sep 24, 2023
Hack

HeidiTran / nand-to-tetris

Building a Modern Computer from First Principles: from Nand to Tetris - a Coursera course

hack python3 nand2tetris logic-gates hdl

Updated Jun 14, 2022
Hack

luc527 / nand2tetris-projects

My solutions to the projects in the "Nand2Tetris" course.

c assembler nand2tetris logic-gates hdl

Updated Mar 26, 2022
Hack

nadavWeisler / Nand2Tetris

Nand to tetris course at the Hebrew University

python assembly nand2tetris jack nand2tetris-assignments hdl

Updated Nov 8, 2021
Hack

sameer-h / Dictionary-Encoder-Decoder

HDL, HACK ASM, PYTHON DICTIONARY ENCODER AND DECODER

python dictionaries encoder decoder asm hdl encoder-decoder

Updated Aug 17, 2021
Hack

dishaShah01 / Nand2Tetris

Building a modern computer

hardware nand2tetris hdl

Updated Apr 24, 2021
Hack

billyean / coursera

Code for courser course "Building a Modern Computer from First Principles"

compiler hardware assembler operating-system hdl

Updated Dec 29, 2020
Hack

VishalSharma0309 / hack_computer

Building 'Hack' computer from ground zero

simulation assembly-language hdl hacktoberfest hacktoberfest-accepted

Updated Oct 25, 2020
Hack

akaps / nand2tetris

Solutions to coursework Nand2Tetris by Shimon Schocken and Noam Nisan https://www.nand2tetris.org/

nand2tetris hdl

Updated Aug 22, 2020
Hack

sarthak-kaps / Nand2Tetris

Nand2Tetris Project Work

interpreter compiler virtual-machine assembler hdl

Updated Aug 2, 2020
Hack

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Website: github.com/topics/verilog
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