The official repository for the gem5 computer-system architecture simulator.
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Nov 11, 2025 - C++
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risc-v
Unlike most other ISA designs, the RISC-V ISA is provided under open source licenses that do not require fees to use. A number of companies are offering or have announced RISC-V hardware, open source operating systems with RISC-V support are available and the instruction set is supported in several popular software toolchains.
Notable features of the RISC-V ISA include a load–store architecture, bit patterns to simplify the multiplexers in a CPU, IEEE 754 floating-point, a design that is architecturally neutral, and placing most-significant bits at a fixed location to speed sign extension. The instruction set is designed for a wide range of uses. The base instruction set has a fixed length of 32-bit naturally aligned instructions, and the ISA supports variable length extensions where each instruction could be an any number of 16-bit parcels in length. Subsets support small embedded systems, personal computers, supercomputers with vector processors, and warehouse-scale 19 inch rack-mounted parallel computers.
Here are 200 public repositories matching this topic...
Speech-to-text, text-to-speech, speaker diarization, speech enhancement, source separation, and VAD using next-gen Kaldi with onnxruntime without Internet connection. Support embedded systems, Android, iOS, HarmonyOS, Raspberry Pi, RISC-V, RK NPU, Ascend NPU, x86_64 servers, websocket server/client, support 12 programming languages
android windows macos linux lazarus raspberry-pi ios text-to-speech csharp cpp dotnet speech-to-text aarch64 mfc risc-v object-pascal asr arm32 onnx vits
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Nov 12, 2025 - C++
RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.
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Nov 11, 2025 - C++
A graphical processor simulator and assembly editor for the RISC-V ISA
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Nov 4, 2025 - C++
Fast, modern C++ DSP framework, FFT, Sample Rate Conversion, FIR/IIR/Biquad Filters (SSE, AVX, AVX-512, ARM NEON, RISC-V RVV)
audio cplusplus dft cxx dsp cpp14 avx clang simd header-only fast-fourier-transform cpp17 cplusplus-14 fft digital-signal-processing avx512 risc-v audio-processing cplusplus-17 discrete-fourier-transform
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Nov 6, 2025 - C++
Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs
simulator cpu pipeline mips simulation mipt cpu-cache optimizations computer-architecture risc cpu-model risc-v branch-prediction computer-architecture-lesson branch-predictor clock-precise pre-silicon mips-binutils prediction-algorithms
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Jun 11, 2022 - C++
Unicode routines (UTF8, UTF16, UTF32) and Base64: billions of characters per second using SSE2, AVX2, NEON, AVX-512, RISC-V Vector Extension, LoongArch64, POWER. Part of Node.js, WebKit/Safari, Ladybird, Chromium, Cloudflare Workers and Bun.
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Nov 11, 2025 - C++
Ted Fried's MicroCore Labs Projects which include microsequencer-based FPGA cores and emulators for the 8088, 8086, 8051, 6502, 68000, Z80, Risc-V, and also Typewriter and EPROM Emulator projects. MCL51, MCL64, MCL65, MCL65+, MCL68, MCL86, MCL86+, MCL86jr, MCLR5, MCLZ8, MCL6809, XTMax
apple2 atari2600 z80 commodore-64 motorola-68000 6502 risc-v 8088 8051 z80-emulator intel-8086 8086 pcjr 68000 commodore64 pcxt 6809 eprom-emulator nabu 8051-microcontroller
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Oct 5, 2025 - C++
RISC-V CPU simulator for education purposes
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Nov 10, 2025 - C++
The fastest RISC-V sandbox
emulator lightweight multi-platform cmake interpreter cpp jit riscv low-latency zero-dependency no-dependencies userspace risc-v binary-translation cpp20 ultra-low-latency riscv-emulator
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Nov 5, 2025 - C++
Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model
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Nov 11, 2025 - C++
RiVEC Bencmark Suite
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Nov 27, 2024 - C++
Extendable Translating Instruction Set Simulator
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Nov 11, 2025 - C++
fdtd3d is an open source 1D, 2D, 3D FDTD electromagnetics solver with MPI, OpenMP and CUDA support for x64, ARM, ARM64, RISC-V, PowerPC, Wasm architectures
c-plus-plus arm cpp simulation gpu physics x64 parallel mpi fdtd cuda wasm modelling arm64 powerpc electromagnetic risc-v maxwell maxwell-equations-solver maxwell-equations
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Nov 24, 2024 - C++
TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
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May 1, 2022 - C++
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