Weixian Xu
Stanford SALT Lab | ACM Honors Class, Shanghai Jiao Tong University
Weixian Xu
Student Researcher, Stanford SALT Lab
with Prof. Diyi Yang
ACM Honors Class, SJTU
Previously GAIR Lab
About Me
I am Weixian Xu, an undergraduate in the ACM Honors Class at Shanghai Jiao Tong University. I am currently conducting research at Stanford SALT Lab with Prof. Diyi Yang. Previously, I worked at GAIR Lab with Prof. Pengfei Liu, and I have also collaborated with Prof. Mengdi Wang and Shilong Liu at Princeton/AI2.
My long-term goal is to build AI systems that can recursively self-improve toward richer and more beneficial forms of intelligence. I am interested in the progression from analysis to reflection to improvement: systems that can examine their own behavior, understand why they succeed or fail, accumulate reusable knowledge, and use that knowledge to improve how they learn, solve problems, and collaborate with people.
I want AI to become stronger, but in the right direction: learning from analysis and reflection, and using its intelligence to help people in more meaningful ways.
Research Statement
My research asks two connected questions: how can AI keep improving itself, and what should that improvement mean? I study recursive self-improvement as a technical problem, but also as a question about the target of intelligence. The objective is to build agents that learn through analysis and reflection, improve over time, and use their intelligence to help people in meaningful ways.
This leads to two connected directions:
- Continual Self-Improvement: Building agents that learn from their own research, tool use, experiments, and failures over long horizons, including systems that improve the process of AI research itself.
- Human-Centered Intelligence: Defining intelligence by whether systems can analyze, reflect, learn, teach, collaborate, and help people in meaningful real-world settings.
Recent Work
ASI-Evolve: AI Accelerates AI
Closed-Loop Self-Improving Research Framework | Paper | Code
An agentic framework for recursive self-improvement in AI research that closes a long-horizon learn-design-experiment-analyze loop across data, architectures, and learning algorithms.
- Core Idea: Combine accumulated research priors with an analyzer that turns experimental outcomes into reusable insights.
- Scope: Studies closed-loop improvement across central components of the AI stack, emphasizing how agents can analyze results, learn from experiments, and carry knowledge into future research.
- Research Direction: A step toward recursive self-improvement as a practical research process where better analysis and reflection lead to better future learning.
EEVEE: Test-Time Prompt Learning for Self-Improving Agents
Princeton/AI2 Collaboration | Paper | Project | Code
A multi-dataset test-time prompt learning framework for LLM agents operating under heterogeneous real-world task streams.
- Core Idea: Use router-prompt co-evolution to assign inputs to specialized prompt slots and reduce cross-dataset interference.
- Scope: Moves test-time prompt learning toward mixed domains, formats, and evaluation rules that better resemble real-world task streams.
- Research Direction: Makes self-improving agents more practical by helping them specialize, adapt, and preserve useful behavior across changing contexts.
ASI-Arch: Autonomous Neural Architecture Discovery
Research Project (GAIR Lab) | Paper | Code (1.1k Stars)
An autonomous AI system designed to conduct neural architecture discovery and reveal new design patterns without human intervention.
- Impact: The repository garnered 1.1k+ stars within a month of publication.
- Contribution: Designed the autonomous discovery pipeline, orchestrated 1,773 large-scale experiments, and validated state-of-the-art architectures.
Engineering Foundation
ACore: Operating System Kernel
System Implementation | Code
A comprehensive OS kernel exploring core operating system concepts through independent development in Rust.
- Implemented memory management with virtual memory and page allocation.
- Developed process scheduling, thread management, and a VFS layer supporting multiple filesystems.
- Engineered user/kernel space isolation for security.
Imxc: Advanced Compiler
System Implementation | Code
A full-featured compiler for a C-like language (Mx*), achieving performance comparable to Clang.
- Implemented advanced optimizations including Mem2Reg, Function Inlining, SCCP, and ADCE.
- Designed a high-performance Register Allocation module using Graph Coloring.
- Supported incremental compilation for efficient multi-file builds.
RISC-V CPU (Tomasulo Architecture)
Hardware Implementation | Code
A sophisticated RISC-V processor core implementation in Verilog.
- Features Tomasulo architecture for dynamic instruction scheduling and out-of-order execution.
- Supports the complete RV32I instruction set with FPGA deployment capabilities.
Technical Background
- Research: Python, PyTorch, Transformers, CUDA, LLM Agents, Self-Improving AI, Test-Time Learning, AI Research Agents, Neural Architecture Discovery.
- Systems: Rust, C++, C, Verilog, OS Development, Compiler Design.
- Infrastructure: Linux, Docker, Git, CI/CD.
Personal Interests
Beyond research and coding, music is a big part of my life. I play both acoustic and electric guitar, and I hold a Grade 9 certification in clarinet. I also enjoy badminton and video games, especially for their storytelling and mechanics. Back in high school, I was a competitive physics student (CPhO Provincial Second Prize), which shaped my analytical thinking.
On a more personal note, I am happily in a relationship and value the time spent exploring life’s journey with my partner.
Contact
I am always open to discussing self-improving AI, human-centered intelligence, systems engineering, or potential collaborations.
- Email: hz.czar@sjtu.edu.cn
- GitHub: @HZxCzar