{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,19]],"date-time":"2026-02-19T07:09:07Z","timestamp":1771484947653,"version":"3.50.1"},"reference-count":34,"publisher":"Elsevier BV","license":[{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/legal\/tdmrep-license"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-017"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-012"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-004"}],"funder":[{"DOI":"10.13039\/501100003399","name":"Science and Technology Commission of Shanghai Municipality","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003399","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Microelectronics Journal"],"published-print":{"date-parts":[[2025,3]]},"DOI":"10.1016\/j.mejo.2025.106583","type":"journal-article","created":{"date-parts":[[2025,1,21]],"date-time":"2025-01-21T08:42:38Z","timestamp":1737448958000},"page":"106583","update-policy":"https:\/\/doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":2,"special_numbering":"C","title":["A calibration scheme for SAR ADCs based on capacitor weight optimization using an improved simulated annealing algorithm"],"prefix":"10.1016","volume":"157","author":[{"given":"Zhuofan","family":"Wang","sequence":"first","affiliation":[]},{"given":"Lili","family":"Lang","sequence":"additional","affiliation":[]},{"given":"Wei","family":"Zhong","sequence":"additional","affiliation":[]},{"given":"Yi","family":"Shan","sequence":"additional","affiliation":[]},{"given":"Zhongying","family":"Xue","sequence":"additional","affiliation":[]},{"given":"Yemin","family":"Dong","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/j.mejo.2025.106583_bib1","first-page":"2249","article-title":"Low-power SAR ADC design: overview and survey of state-of-the-art techniques","volume":"69","author":"Tang","year":"2022","journal-title":"IEEE Trans. Circuits Syst. I."},{"key":"10.1016\/j.mejo.2025.106583_bib2","doi-asserted-by":"crossref","first-page":"1940","DOI":"10.1109\/TCSI.2023.3247434","article-title":"A reconfigurable 12-to-18-bit dynamic zoom ADC with pole-optimized technique","volume":"70","author":"Liang","year":"2023","journal-title":"IEEE Trans. Circuits Syst. Regul. Pap."},{"key":"10.1016\/j.mejo.2025.106583_bib3","first-page":"4141","article-title":"A 101.6-dB-SNDR fully dynamic zoom ADC using miller-compensated floating inverter amplifiers","volume":"71","author":"Choi","year":"2024","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"key":"10.1016\/j.mejo.2025.106583_bib4","first-page":"859","article-title":"A 625kHz-BW, 79.3DB-SNDR second-order noise-shaping SAR ADC using high-efficiency error-feedback structure","volume":"69","author":"Yi","year":"2022","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"key":"10.1016\/j.mejo.2025.106583_bib5","doi-asserted-by":"crossref","first-page":"2481","DOI":"10.1109\/JSSC.2024.3360944","article-title":"A 1.5-MHz BW 81.2-dB SNDR dual-residue pipeline ADC with a fully dynamic noise-shaping interpolating-SAR ADC","volume":"59","author":"Chung","year":"2024","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2025.106583_bib6","doi-asserted-by":"crossref","first-page":"456","DOI":"10.1049\/el.2009.2374","article-title":"Background digital calibration of successive approximation ADC with adaptive equalisation","volume":"45","author":"Liu","year":"2009","journal-title":"Electron. Lett."},{"key":"10.1016\/j.mejo.2025.106583_bib7","first-page":"2355","article-title":"All-digital background calibration of a successive approximation ADC using the \u201csplit ADC\u201d architecture","volume":"58","author":"McNeill","year":"2011","journal-title":"IEEE Trans. Circuits Syst. I."},{"key":"10.1016\/j.mejo.2025.106583_bib8","doi-asserted-by":"crossref","first-page":"2661","DOI":"10.1109\/JSSC.2011.2163556","article-title":"A 12-bit, 45-MS\/s, 3-mW redundant successive-approximation-register analog-to-digital converter with digital calibration","volume":"46","author":"Liu","year":"2011","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2025.106583_bib9","series-title":"2020 IEEE Asian Solid-State Circuits Conference (A-SSCC)","first-page":"1","article-title":"A 16b 1.62MS\/s calibration-free SAR ADC with 86.6dB SNDR utilizing DAC mismatch cancellation based on symmetry","author":"Konno","year":"2020"},{"key":"10.1016\/j.mejo.2025.106583_bib10","series-title":"2024 IEEE Custom Integrated Circuits Conference (CICC)","first-page":"1","article-title":"A 16b 5MS\/s 93.7dB-SNDR SAR ADC with a split sampling technique and SRM-assisted self-calibration","author":"Huang","year":"2024"},{"key":"10.1016\/j.mejo.2025.106583_bib11","first-page":"221","article-title":"Split-delta background calibration for SAR ADCs","volume":"64","author":"Pena-Ramos","year":"2017","journal-title":"IEEE Trans. Circuits Syst. II."},{"key":"10.1016\/j.mejo.2025.106583_bib12","doi-asserted-by":"crossref","first-page":"2129","DOI":"10.1109\/JSSC.2012.2198350","article-title":"Digitally calibrated 768-kS\/s 10-b minimum-size SAR ADC array with dithering","volume":"47","author":"Xu","year":"2012","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2025.106583_bib13","doi-asserted-by":"crossref","first-page":"200","DOI":"10.1109\/TBCAS.2022.3147954","article-title":"A 14-b 20-MS\/s 78.8 dB-SNDR energy-efficient SAR ADC with background mismatch calibration and noise-reduction techniques for portable medical ultrasound systems","volume":"16","author":"Liang","year":"2022","journal-title":"IEEE Trans. Biomed. Circuits Syst."},{"key":"10.1016\/j.mejo.2025.106583_bib14","series-title":"2012 IEEE International Symposium on Circuits and Systems","first-page":"1054","article-title":"Digital foreground calibration methods for SAR ADCs","author":"Li","year":"2012"},{"key":"10.1016\/j.mejo.2025.106583_bib15","doi-asserted-by":"crossref","first-page":"1423","DOI":"10.1049\/el.2014.1868","article-title":"Digital foreground calibration of capacitor mismatch for SAR ADCs","volume":"50","author":"Yeo","year":"2014","journal-title":"Electron. Lett."},{"key":"10.1016\/j.mejo.2025.106583_bib16","first-page":"20","article-title":"Matrix-based digital calibration technique for high-performance SAR and pipeline ADCs","volume":"71","author":"Hassan","year":"2024","journal-title":"IEEE Trans. Circuits Syst. I."},{"key":"10.1016\/j.mejo.2025.106583_bib17","first-page":"146","article-title":"A distortion cancelation technique with the recursive DFT method for successive approximation analog-to-digital converters","volume":"63","author":"Juan","year":"2016","journal-title":"IEEE Trans. Circuits Syst. II."},{"key":"10.1016\/j.mejo.2025.106583_bib18","doi-asserted-by":"crossref","DOI":"10.1587\/elex.19.20220064","article-title":"A digital foreground calibration method for SAR ADCs with redundancy","volume":"19","author":"Xie","year":"2022","journal-title":"IEICE Electron. Express"},{"key":"10.1016\/j.mejo.2025.106583_bib19","doi-asserted-by":"crossref","first-page":"63","DOI":"10.1016\/j.vlsi.2020.04.003","article-title":"An efficient background calibration technique for analog-to-digital converters based on neural network","volume":"74","author":"Deng","year":"2020","journal-title":"Integration"},{"key":"10.1016\/j.mejo.2025.106583_bib20","series-title":"2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)","first-page":"265","article-title":"Machine-learning based nonlinerity correction for coarse-fine SAR-TDC hybrid ADC","author":"Deng","year":"2020"},{"key":"10.1016\/j.mejo.2025.106583_bib21","doi-asserted-by":"crossref","DOI":"10.1016\/j.mejo.2021.105113","article-title":"A digital background calibration scheme for non-linearity of SAR ADC using back-propagation algorithm","volume":"114","author":"Lu","year":"2021","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2025.106583_bib22","doi-asserted-by":"crossref","DOI":"10.1049\/ell2.12762","article-title":"A capacitor mismatch calibration scheme for SAR ADC based on genetic algorithm","volume":"59","author":"Huang","year":"2023","journal-title":"Electron. Lett."},{"key":"10.1016\/j.mejo.2025.106583_bib23","doi-asserted-by":"crossref","DOI":"10.1016\/j.mejo.2023.105701","article-title":"A digital calibration technique for N-channel time-interleaved ADC based on simulated annealing algorithm","volume":"133","author":"Zhang","year":"2023","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2025.106583_bib24","doi-asserted-by":"crossref","DOI":"10.1016\/j.mejo.2023.105767","article-title":"LMS-based digital background mismatch calibration technique for SAR ADC","volume":"136","author":"Wan","year":"2023","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2025.106583_bib25","first-page":"1063","article-title":"Correlation-based background calibration of bit weight in SAR ADCs using DAS algorithm","volume":"68","author":"Zhang","year":"2021","journal-title":"IEEE Trans. Circuits Syst. II"},{"key":"10.1016\/j.mejo.2025.106583_bib26","doi-asserted-by":"crossref","first-page":"920","DOI":"10.1109\/JSSC.2014.2384025","article-title":"A 12 bit 160 MS\/s two-step SAR ADC with background bit-weight calibration using a time-domain proximity detector","volume":"50","author":"Zhou","year":"2015","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2025.106583_bib27","series-title":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","first-page":"176","article-title":"A 1.2V 10b 20MSample\/s non-binary successive approximation ADC in 0.13\u03bcm CMOS","author":"Kuttner","year":"2002"},{"key":"10.1016\/j.mejo.2025.106583_bib28","series-title":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","first-page":"386","article-title":"A 10b 100MS\/s 1.13mW SAR ADC with binary-scaled error compensation","author":"Liu","year":"2010"},{"key":"10.1016\/j.mejo.2025.106583_bib29","doi-asserted-by":"crossref","first-page":"2645","DOI":"10.1109\/JSSC.2015.2466475","article-title":"A 10 bit 320 MS\/s low-cost SAR ADC for IEEE 802.11ac applications in 20 nm CMOS","volume":"50","author":"Liu","year":"2015","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2025.106583_bib30","doi-asserted-by":"crossref","first-page":"1143","DOI":"10.1057\/palgrave.jors.2602068","article-title":"A survey of simulated annealing as a tool for single and multiobjective optimization","volume":"57","author":"Suman","year":"2006","journal-title":"J. Oper. Res. Soc."},{"key":"10.1016\/j.mejo.2025.106583_bib31","article-title":"A novel calibration algorithm for ADCs based on inverse mapping by neural network","volume":"II","author":"Peng","year":"2024","journal-title":"IEEE Trans. Circuits Syst."},{"key":"10.1016\/j.mejo.2025.106583_bib32","first-page":"5067","article-title":"Artificial neural network based calibration for a 12 b 250 MS\/s pipelined-SAR ADC with ring amplifier in 40-nm CMOS","volume":"71","author":"Liu","year":"2024","journal-title":"IEEE Trans. Circuits Syst. I"},{"key":"10.1016\/j.mejo.2025.106583_bib33","doi-asserted-by":"crossref","DOI":"10.1109\/TCE.2025.3526687","article-title":"A 14-bit 250-KS\/s calibration-free SAR ADC for the detection of physiological electrical signals in consumer electronics","author":"Liang","year":"2025","journal-title":"IEEE Trans. Consumer Electron"},{"key":"10.1016\/j.mejo.2025.106583_bib34","first-page":"88","article-title":"A 16-bit calibration-free SAR ADC with binary-window and capacitor-swapping DAC switching schemes","volume":"69","author":"Chung","year":"2022","journal-title":"IEEE Trans. Circuits Syst. I"}],"container-title":["Microelectronics Journal"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1879239125000323?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1879239125000323?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2025,2,27]],"date-time":"2025-02-27T06:20:20Z","timestamp":1740637220000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S1879239125000323"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3]]},"references-count":34,"alternative-id":["S1879239125000323"],"URL":"https:\/\/doi.org\/10.1016\/j.mejo.2025.106583","relation":{},"ISSN":["1879-2391"],"issn-type":[{"value":"1879-2391","type":"print"}],"subject":[],"published":{"date-parts":[[2025,3]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"A calibration scheme for SAR ADCs based on capacitor weight optimization using an improved simulated annealing algorithm","name":"articletitle","label":"Article Title"},{"value":"Microelectronics Journal","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/j.mejo.2025.106583","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"article","name":"content_type","label":"Content Type"},{"value":"\u00a9 2025 Elsevier Ltd. All rights are reserved, including those for text and data mining, AI training, and similar technologies.","name":"copyright","label":"Copyright"}],"article-number":"106583"}}