{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T11:58:51Z","timestamp":1777636731893,"version":"3.51.4"},"reference-count":30,"publisher":"Elsevier BV","license":[{"start":{"date-parts":[[2026,3,1]],"date-time":"2026-03-01T00:00:00Z","timestamp":1772323200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"},{"start":{"date-parts":[[2026,3,1]],"date-time":"2026-03-01T00:00:00Z","timestamp":1772323200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/legal\/tdmrep-license"},{"start":{"date-parts":[[2026,3,1]],"date-time":"2026-03-01T00:00:00Z","timestamp":1772323200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-017"},{"start":{"date-parts":[[2026,3,1]],"date-time":"2026-03-01T00:00:00Z","timestamp":1772323200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"},{"start":{"date-parts":[[2026,3,1]],"date-time":"2026-03-01T00:00:00Z","timestamp":1772323200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-012"},{"start":{"date-parts":[[2026,3,1]],"date-time":"2026-03-01T00:00:00Z","timestamp":1772323200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,3,1]],"date-time":"2026-03-01T00:00:00Z","timestamp":1772323200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-004"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62174149"],"award-info":[{"award-number":["62174149"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100010814","name":"Anhui Provincial Department of Education","doi-asserted-by":"publisher","award":["KJ2021ZD0120"],"award-info":[{"award-number":["KJ2021ZD0120"]}],"id":[{"id":"10.13039\/501100010814","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Microelectronics Journal"],"published-print":{"date-parts":[[2026,3]]},"DOI":"10.1016\/j.mejo.2025.107027","type":"journal-article","created":{"date-parts":[[2025,12,17]],"date-time":"2025-12-17T00:30:55Z","timestamp":1765931455000},"page":"107027","update-policy":"https:\/\/doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":2,"special_numbering":"C","title":["A 14-bit 1.25GS\/s single-channel pipelined ADC with distributed differential reference voltage buffer and hybrid mixed-signal foreground and background calibration"],"prefix":"10.1016","volume":"169","author":[{"given":"Zhenhai","family":"Chen","sequence":"first","affiliation":[]},{"given":"Cheng","family":"Jin","sequence":"additional","affiliation":[]},{"given":"Xiaobo","family":"Su","sequence":"additional","affiliation":[]},{"given":"Yindan","family":"Jiang","sequence":"additional","affiliation":[]},{"given":"Dejin","family":"Zhou","sequence":"additional","affiliation":[]},{"given":"Ruifang","family":"Tie","sequence":"additional","affiliation":[]},{"given":"Danping","family":"Yang","sequence":"additional","affiliation":[]},{"given":"Yan","family":"Xue","sequence":"additional","affiliation":[]},{"given":"Hong","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Yongshen","family":"Yin","sequence":"additional","affiliation":[]},{"given":"Zongguang","family":"Yu","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/j.mejo.2025.107027_b1","series-title":"2010 IEEE International Solid-State Circuits Conference -","first-page":"292","article-title":"A 16b 250 MS\/s IF-sampling pipelined A\/D converter with background calibration","author":"Ali","year":"2010"},{"key":"10.1016\/j.mejo.2025.107027_b2","series-title":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","first-page":"276","article-title":"A 13b 4gs\/s digitally assisted dynamic 3-stage asynchronous pipelined-sar adc","author":"Vaz","year":"2017"},{"key":"10.1016\/j.mejo.2025.107027_b3","series-title":"2016 IEEE Symposium on VLSI Circuits","first-page":"1","article-title":"A 14-bit 2.5 GS\/s and 5GS\/s RF sampling ADC with background calibration and dither","author":"Ali","year":"2016"},{"issue":"6","key":"10.1016\/j.mejo.2025.107027_b4","first-page":"2961","article-title":"A 14-bit 4 GS\/s two-way interleaved pipelined ADC with aperture error tunning","volume":"71","author":"Yang","year":"2024","journal-title":"IEEE Trans. Circuits Syst. II: Express Briefs"},{"key":"10.1016\/j.mejo.2025.107027_b5","doi-asserted-by":"crossref","DOI":"10.1016\/j.mejo.2025.106795","article-title":"A 14-bit 2.6 GS\/s RF sampling pipelined ADC in 28 nm CMOS","volume":"164","author":"Zhang","year":"2025","journal-title":"Microelectron. J.","ISSN":"https:\/\/id.crossref.org\/issn\/1879-2391","issn-type":"print"},{"issue":"12","key":"10.1016\/j.mejo.2025.107027_b6","doi-asserted-by":"crossref","first-page":"2857","DOI":"10.1109\/JSSC.2014.2361339","article-title":"A 14 bit 1 GS\/s RF sampling pipelined ADC with background calibration","volume":"49","author":"Ali","year":"2014","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2025.107027_b7","article-title":"A 1.25-gs\/s 14-bit pipelined adc using a current-feedback flipped input buffer and large dither technique to achieve high linearity","volume":"advpub","author":"Li","year":"2024","journal-title":"IEICE Electronics Express"},{"issue":"11","key":"10.1016\/j.mejo.2025.107027_b8","doi-asserted-by":"crossref","DOI":"10.1587\/elex.18.20210171","article-title":"A 14bit 500 MS\/s 85.62 dBc SFDR 66.29 dB SNDR SHA-less pipelined ADC with a stable and high-linearity input buffer and aperture-error calibration in 40 nm CMOS","volume":"18","author":"Chen","year":"2021","journal-title":"IEICE Electron. Express"},{"issue":"11","key":"10.1016\/j.mejo.2025.107027_b9","doi-asserted-by":"crossref","first-page":"2568","DOI":"10.1109\/TVLSI.2019.2923704","article-title":"A low-power low-cost on-chip digital background calibration for pipelined ADCs","volume":"27","author":"Peng","year":"2019","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst.","ISSN":"https:\/\/id.crossref.org\/issn\/1557-9999","issn-type":"print"},{"issue":"3","key":"10.1016\/j.mejo.2025.107027_b10","first-page":"809","article-title":"A 16b 120 MS\/s pipelined ADC using an auxiliary-capacitor-based calibration technique achieving 90.5 dB SFDR in 0.18 um CMOS","volume":"69","author":"Liu","year":"2022","journal-title":"IEEE Trans. Circuits Syst. II: Express Briefs"},{"issue":"3","key":"10.1016\/j.mejo.2025.107027_b11","first-page":"357","article-title":"Background calibration of comparator offsets in SHA-less pipelined ADCs","volume":"66","author":"Zhu","year":"2019","journal-title":"IEEE Trans. Circuits Syst. II: Express Briefs"},{"key":"10.1016\/j.mejo.2025.107027_b12","doi-asserted-by":"crossref","first-page":"503","DOI":"10.1007\/s10470-009-9451-2","article-title":"An 80-MS\/s 14-bit pipelined ADC featuring 83 dB SFDR","volume":"63","author":"Ye","year":"2010","journal-title":"Analog Integr. Circuits Signal Process."},{"issue":"2","key":"10.1016\/j.mejo.2025.107027_b13","doi-asserted-by":"crossref","first-page":"641","DOI":"10.1109\/TCSI.2020.3037295","article-title":"A 91.0-dB SFDR single-coarse dual-fine pipelined-SAR ADC with split-based background calibration in 28-nm CMOS","volume":"68","author":"Cao","year":"2021","journal-title":"IEEE Trans. Circuits Syst. I. Regul. Pap."},{"issue":"4","key":"10.1016\/j.mejo.2025.107027_b14","doi-asserted-by":"crossref","first-page":"1041","DOI":"10.1109\/JSSC.2009.2014701","article-title":"A low power 6-bit flash ADC with reference voltage and common-mode calibration","volume":"44","author":"Chen","year":"2009","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"12","key":"10.1016\/j.mejo.2025.107027_b15","doi-asserted-by":"crossref","first-page":"1931","DOI":"10.1109\/4.972143","article-title":"A 3-v 340-mW 14-b 75-Msample\/s CMOS ADC with 85-dB SFDR at nyquist input","volume":"36","author":"Yang","year":"2001","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"8","key":"10.1016\/j.mejo.2025.107027_b16","doi-asserted-by":"crossref","first-page":"1846","DOI":"10.1109\/JSSC.2006.875291","article-title":"A 14-bit 125 MS\/s IF\/RF sampling pipelined ADC with 100 dB SFDR and 50 fs jitter","volume":"41","author":"Ali","year":"2006","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2025.107027_b17","series-title":"High-performance, low-noise reference generators","author":"Ali","year":"2007"},{"key":"10.1016\/j.mejo.2025.107027_b18","series-title":"2020 IEEE Asia Pacific Conference on Circuits and Systems","first-page":"82","article-title":"A low power reference voltage buffer and high density unit capacitor in a 12b 200 MS\/s SAR ADC","author":"He","year":"2020"},{"key":"10.1016\/j.mejo.2025.107027_b19","series-title":"2017 24th IEEE International Conference on Electronics, Circuits and Systems","first-page":"17","article-title":"Analysis of the settling behavior of an external reference voltage source for a 16 bit and 200 MS\/s pipeline analog-to-digital converter","author":"Loehr","year":"2017"},{"issue":"1","key":"10.1016\/j.mejo.2025.107027_b20","doi-asserted-by":"crossref","first-page":"62","DOI":"10.1080\/00207217.2012.682486","article-title":"A CMOS switch-capacitor 14-bit 100 Msps pipeline ADC with over 90 dB SFDR","volume":"100","author":"Cai","year":"2013","journal-title":"Int. J. Electron."},{"issue":"2","key":"10.1016\/j.mejo.2025.107027_b21","doi-asserted-by":"crossref","first-page":"456","DOI":"10.1109\/JSSC.2024.3437168","article-title":"A 2-GS\/s time-interleaved ADC with embedded background calibrations and a novel reference buffer for reduced inter-channel crosstalk","volume":"60","author":"Ricci","year":"2025","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"12","key":"10.1016\/j.mejo.2025.107027_b22","doi-asserted-by":"crossref","first-page":"3305","DOI":"10.1109\/JSSC.2009.2032636","article-title":"A 16-bit, 125 MS\/s, 385 mW, 78.7 dB SNR CMOS pipeline ADC","volume":"44","author":"Devarajan","year":"2009","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"12","key":"10.1016\/j.mejo.2025.107027_b23","doi-asserted-by":"crossref","first-page":"2613","DOI":"10.1109\/JSSC.2008.2006309","article-title":"A 14-b 100-MS\/s pipelined ADC with a merged SHA and first MDAC","volume":"43","author":"Lee","year":"2008","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"13","key":"10.1016\/j.mejo.2025.107027_b24","doi-asserted-by":"crossref","DOI":"10.1587\/elex.15.20180481","article-title":"A 12 bit 120 MS\/s SHA-less pipeline ADC with capacitor mismatch error calibration","volume":"15","author":"Zhou","year":"2018","journal-title":"IEICE Electron. Express"},{"issue":"12","key":"10.1016\/j.mejo.2025.107027_b25","doi-asserted-by":"crossref","first-page":"3210","DOI":"10.1109\/JSSC.2020.3023882","article-title":"A 12-b 18-GS\/s RF sampling ADC with an integrated wideband track-and-hold amplifier and background calibration","volume":"55","author":"Ali","year":"2020","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2025.107027_b26","series-title":"2021 IEEE 14th International Conference on ASIC","first-page":"1","article-title":"An input buffer for 4 GS\/s 14-b time-interleaved ADC","author":"Zhang","year":"2021"},{"key":"10.1016\/j.mejo.2025.107027_b27","series-title":"2023 21st IEEE Interregional NEWCAS Conference","first-page":"1","article-title":"A novel push-pull input buffer for wideband ADCs with improved high-frequency linearity","author":"Scaletti","year":"2023"},{"key":"10.1016\/j.mejo.2025.107027_b28","series-title":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","first-page":"1","article-title":"A low power 16-bit 125ms\/s pipeline adc with 100db sfdr","author":"Zhou","year":"2024"},{"issue":"12","key":"10.1016\/j.mejo.2025.107027_b29","doi-asserted-by":"crossref","first-page":"2613","DOI":"10.1109\/JSSC.2010.2074650","article-title":"A 16-bit 100 to 160 ms\/s sige bicmos pipelined adc with 100 dbfs sfdr","volume":"45","author":"Payne","year":"2010","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"10.1016\/j.mejo.2025.107027_b30","series-title":"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers","first-page":"466","article-title":"A 14b 2.5gs\/s 8-way-interleaved pipelined adc with background calibration and digital dynamic linearity correction","author":"Setterberg","year":"2013"}],"container-title":["Microelectronics Journal"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1879239125004771?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1879239125004771?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2026,1,30]],"date-time":"2026-01-30T21:33:51Z","timestamp":1769808831000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S1879239125004771"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,3]]},"references-count":30,"alternative-id":["S1879239125004771"],"URL":"https:\/\/doi.org\/10.1016\/j.mejo.2025.107027","relation":{},"ISSN":["1879-2391"],"issn-type":[{"value":"1879-2391","type":"print"}],"subject":[],"published":{"date-parts":[[2026,3]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"A 14-bit 1.25GS\/s single-channel pipelined ADC with distributed differential reference voltage buffer and hybrid mixed-signal foreground and background calibration","name":"articletitle","label":"Article Title"},{"value":"Microelectronics Journal","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/j.mejo.2025.107027","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"article","name":"content_type","label":"Content Type"},{"value":"\u00a9 2025 Elsevier Ltd. All rights are reserved, including those for text and data mining, AI training, and similar technologies.","name":"copyright","label":"Copyright"}],"article-number":"107027"}}