{"id":"https://openalex.org/W2060943953","doi":"https://doi.org/10.1109/tii.2013.2239302","title":"High-Level Synthesis for Accelerating the FPGA Implementation of Computationally Demanding Control Algorithms for Power Converters","display_name":"High-Level Synthesis for Accelerating the FPGA Implementation of Computationally Demanding Control Algorithms for Power Converters","publication_year":2013,"publication_date":"2013-08-01","ids":{"openalex":"https://openalex.org/W2060943953","doi":"https://doi.org/10.1109/tii.2013.2239302","mag":"2060943953"},"language":"en","primary_location":{"id":"doi:10.1109/tii.2013.2239302","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tii.2013.2239302","pdf_url":null,"source":{"id":"https://openalex.org/S184777250","display_name":"IEEE Transactions on Industrial Informatics","issn_l":"1551-3203","issn":["1551-3203","1941-0050"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Industrial Informatics","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111804980","display_name":"D. Navarro","orcid":null},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Denis Navarro","raw_affiliation_strings":["Department of Electronic Engineering and Communications, University of Zaragoza, Zaragoza, Spain","[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering and Communications, University of Zaragoza, Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]},{"raw_affiliation_string":"[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]","institution_ids":["https://openalex.org/I255234318"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052365580","display_name":"\u00d3scar Luc\u00eda","orcid":"https://orcid.org/0000-0002-1284-9007"},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Oscar Lucia","raw_affiliation_strings":["[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]"],"affiliations":[{"raw_affiliation_string":"[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]","institution_ids":["https://openalex.org/I255234318"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033479456","display_name":"L.A. Barrag\u00e1n","orcid":"https://orcid.org/0000-0003-4633-4551"},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Luis A. Barragan","raw_affiliation_strings":["Department of Electronic Engineering and Communications, University of Zaragoza, Zaragoza, Spain","[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering and Communications, University of Zaragoza, Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]},{"raw_affiliation_string":"[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]","institution_ids":["https://openalex.org/I255234318"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055331775","display_name":"I. Urriza","orcid":"https://orcid.org/0000-0002-6881-4209"},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Isidro Urriza","raw_affiliation_strings":["Department of Electronic Engineering and Communications, University of Zaragoza, Zaragoza, Spain","[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering and Communications, University of Zaragoza, Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]},{"raw_affiliation_string":"[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]","institution_ids":["https://openalex.org/I255234318"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026480253","display_name":"Oscar A. Jimenez Gordillo","orcid":"https://orcid.org/0000-0002-3500-9289"},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Oscar Jimenez","raw_affiliation_strings":["Department of Electronic Engineering and Communications, University of Zaragoza, Zaragoza, Spain","[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering and Communications, University of Zaragoza, Zaragoza, Spain","institution_ids":["https://openalex.org/I255234318"]},{"raw_affiliation_string":"[Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain]","institution_ids":["https://openalex.org/I255234318"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5111804980"],"corresponding_institution_ids":["https://openalex.org/I255234318"],"apc_list":null,"apc_paid":null,"fwci":9.5969,"has_fulltext":false,"cited_by_count":78,"citation_normalized_percentile":{"value":0.98390724,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":"9","issue":"3","first_page":"1371","last_page":"1379"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10228","display_name":"Multilevel Inverters and Converters","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10228","display_name":"Multilevel Inverters and Converters","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10175","display_name":"Advanced DC-DC Converters","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7776928544044495},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.720626175403595},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.6483239531517029},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.6367219686508179},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6303156614303589},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49232280254364014},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.4471820890903473},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4291732907295227},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3831259310245514},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.32598304748535156},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.302979052066803},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.28852230310440063}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7776928544044495},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.720626175403595},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.6483239531517029},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.6367219686508179},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6303156614303589},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49232280254364014},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.4471820890903473},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4291732907295227},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3831259310245514},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32598304748535156},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.302979052066803},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.28852230310440063},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tii.2013.2239302","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tii.2013.2239302","pdf_url":null,"source":{"id":"https://openalex.org/S184777250","display_name":"IEEE Transactions on Industrial Informatics","issn_l":"1551-3203","issn":["1551-3203","1941-0050"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Industrial Informatics","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":43,"referenced_works":["https://openalex.org/W1965274418","https://openalex.org/W1984139818","https://openalex.org/W1987462995","https://openalex.org/W1994059316","https://openalex.org/W2002633518","https://openalex.org/W2003631319","https://openalex.org/W2009714459","https://openalex.org/W2012144291","https://openalex.org/W2031416662","https://openalex.org/W2032432078","https://openalex.org/W2040973344","https://openalex.org/W2043199747","https://openalex.org/W2058338062","https://openalex.org/W2059869930","https://openalex.org/W2069657447","https://openalex.org/W2093842169","https://openalex.org/W2094998159","https://openalex.org/W2098739261","https://openalex.org/W2098893648","https://openalex.org/W2100183523","https://openalex.org/W2107954277","https://openalex.org/W2117599570","https://openalex.org/W2119199553","https://openalex.org/W2129788823","https://openalex.org/W2130035841","https://openalex.org/W2138066871","https://openalex.org/W2138357184","https://openalex.org/W2146973278","https://openalex.org/W2147163354","https://openalex.org/W2150127484","https://openalex.org/W2150562785","https://openalex.org/W2151142962","https://openalex.org/W2151992336","https://openalex.org/W2152221504","https://openalex.org/W2153048289","https://openalex.org/W2157302418","https://openalex.org/W2165615855","https://openalex.org/W2166029537","https://openalex.org/W2168308580","https://openalex.org/W2169303105","https://openalex.org/W2171594843","https://openalex.org/W2197058145","https://openalex.org/W4240691156"],"related_works":["https://openalex.org/W2787803743","https://openalex.org/W2140882033","https://openalex.org/W2130097981","https://openalex.org/W2056509023","https://openalex.org/W2017506008","https://openalex.org/W2057648092","https://openalex.org/W1732210391","https://openalex.org/W2547383453","https://openalex.org/W2105664689","https://openalex.org/W3147787617"],"abstract_inverted_index":{"Recent":[0],"advances":[1],"in":[2,158,182],"power":[3,39,66,95,187],"electronic":[4],"converters":[5,67,96],"highly":[6],"rely":[7],"on":[8],"the":[9,58,74,82,89,105,117,122,126,131,159],"development":[10,61],"of":[11,62,84],"new":[12,180],"control":[13,20,63,132,161],"algorithms.":[14],"These":[15],"implementations":[16,34,43],"often":[17,49],"require":[18],"complex":[19],"architectures":[21],"featuring":[22],"microprocessors,":[23],"digital":[24,46,184],"signal":[25],"processors,":[26],"and":[27,60,121,130,144,146],"field-programmable":[28],"gate":[29],"arrays":[30],"(FPGAs).":[31],"Whereas":[32],"software":[33],"are":[35,48,148],"feasible":[36],"for":[37,65,81,93,186],"most":[38],"electronics":[40],"practitioners,":[41],"FPGA":[42],"with":[44,57],"ad-hoc":[45],"hardware":[47,127],"a":[50,85,109,137,164,170,179],"challenging":[51],"design":[52,59,83,166,185],"task.":[53],"This":[54],"paper":[55],"deals":[56],"systems":[64],"using":[68,97],"high-level":[69,110,172],"synthesis":[70,142,173],"tools.":[71],"In":[72],"particular,":[73],"Xilinx":[75],"Vivado":[76],"HLS":[77],"tool":[78,123],"is":[79],"evaluated":[80],"computationally":[86],"demanding":[87],"application,":[88],"real-time":[90],"load":[91],"estimation":[92],"resonant":[94],"parametric":[98],"identification":[99,118],"methods.":[100],"The":[101,155],"proposed":[102],"methodology":[103],"allows":[104,136],"designer":[106],"to":[107,115,151],"use":[108],"description":[111],"language,":[112],"e.g.,":[113],"C,":[114],"describe":[116],"algorithm":[119],"functionality,":[120],"automatically":[124,149],"generates":[125],"floating-point":[128],"data-path":[129],"unit.":[133],"Besides,":[134],"it":[135],"fast":[138],"design-space":[139],"exploration":[140],"through":[141],"directives,":[143],"pipelining":[145],"parallelization":[147],"performed":[150,157],"meet":[152],"timing":[153],"constraints.":[154],"evaluation":[156],"study-case":[160],"architecture":[162],"shows":[163],"significant":[165],"complexity":[167],"reduction.":[168],"As":[169],"consequence,":[171],"tools":[174],"should":[175],"be":[176],"considered":[177],"as":[178],"paradigm":[181],"accelerating":[183],"conversion":[188],"systems.":[189]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":10},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":8},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":11},{"year":2014,"cited_by_count":14},{"year":2013,"cited_by_count":8}],"updated_date":"2026-04-17T18:11:37.981687","created_date":"2025-10-10T00:00:00"}