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CERN Document Server 找到 22 笔记录  开始上页13 - 22  跳到记录: 检索需时 1.05 秒. 
13.
Radiation-Tolerant All-Digital Clock Generators for High Energy Physics / Biereigel, Stefan
The main focus of the presented research is the development and experimental study of radiation-tolerant clock generation circuits intended for applications in high energy physics (HEP) [...]
CERN-THESIS-2022-139 doi:10.26127/BTUOpen-6088. - 215.

14.
Book cover lpGBT documentation : release
12 Aug 2024. - 359 p.

15.
Strategic R&D Programme on Technologies for Future Experiments - Annual Report 2021 / Aglieri Rinella, Gianluca
This report summarises the activities and main achievements of the CERN strategic R&D programme on technologies for future experiments during the year 2021..
CERN-EP-RDET-2022-006 - 126.


10.17181/CERN-EP-RDET-2022-006
16.
Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS / Biereigel, Stefan (CERN ; Leuven U. ; Brandenburg Tech. U.) ; Kulis, Szymon (CERN) ; Moreira, Paulo (CERN) ; Kölpin, Alexander (Hamburg, Tech. U.) ; Leroux, Paul (Leuven U.) ; Prinzie, Jeffrey (Leuven U.)
This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (PLL) and Clock and Data Recovery (CDR) circuit for wireline communication applications. Several radiation hardening techniques are proposed to achieve state-of-the-art immunity to SingleEvent Effects (SEEs) up to 62.5 MeV cm$^{2}$ mg$^{−1}$ as well as tolerance to the Total Ionizing Dose (TID) exceeding 1.5 Grad. The LC Digitally Controlled Oscillator (DCO) is implemented without MOS varactors, avoiding the use of a highly SEE sensitive circuit element. [...]
2021 - 16 p. - Published in : Electronics 10 (2021) 2741
17.
Radiation-Tolerant Digitally Controlled Ring Oscillator in 65-nm CMOS / Biereigel, Stefan (CERN ; Leuven U. ; Brandenburg Tech. U.) ; Kulis, Szymon (CERN) ; Leroux, Paul (Leuven U.) ; Moreira, Paulo (CERN) ; Prinzie, Jeffrey (Leuven U.)
This article presents a radiation-tolerant digitally controlled complementary metal–oxide–semiconductor (CMOS) ring oscillator design suitable for all-digital phase-locked loop (ADPLL) implementations. To address the challenges presented by harsh radiation environments, a wide tuning range oscillator architecture is presented with superior single-event effect (SEE) tolerance. [...]
2022 - 9 p. - Published in : IEEE Trans. Nucl. Sci. 69 (2022) 17-25 Fulltext: PDF;
18.
Single-Event Effect Responses of Integrated Planar Inductors in 65-nm CMOS / Biereigel, Stefan (CERN ; Leuven U. ; Brandenburg Tech. U.) ; Kulis, Szymon (CERN) ; Leroux, Paul (Leuven U.) ; Moreira, Paulo (CERN) ; Kolpin, Alexander (Hamburg, Tech. U.) ; Prinzie, Jeffrey (Leuven U.)
This article describes a previously unreported single-event radiation effect in spiral inductors manufactured in a commercial CMOS technology when subjected to ionizing radiation. Inductors play a major role as the component determining the frequency of LC tank oscillators, which is why any radiation effect in these passive components can have a detrimental impact on the performance of clock generation circuits. [...]
2021 - 11 p. - Published in : IEEE Trans. Nucl. Sci. 68 (2021) 2587-2597 Fulltext: PDF;
19.
Strategic R&D Programme on Technologies for Future Experiments - Annual Report 2020 / Aglieri, Gianluca
This report summarises the activities and achievements of the strategic R&D programme on technologies for future experiments in the year 2020..
CERN-EP-RDET-2021-001 - 2020. - 68.


10.17181/CERN-EP-RDET-2021-001
20.
A High-resolution, Wide-range, Radiation-hard Clock Phase-shifter in a 65 nm CMOS Technology / Kulis, Szymon (CERN) ; Yang, Dongxu (Dallas U.) ; Ghong, Datao (Dallas U.) ; Fonseca, Jose (CERN) ; Biereigel, Stefan (CERN) ; Ye, Jingbo (Dallas U.) ; Moreira, Paulo (CERN)
The design and characterization results of a high-resolution phase-shifter are presented. The phase-shifter is designed with radiation hardening techniques and fabricated in 65 nm CMOS technology. [...]
IEEE, 2019 - 4 p. - Published in : 10.23919/MIXDES.2019.8787202
In : 26th International Conference on Mixed Design of Integrated Circuits and System, Rzeszow, Poland, 27 - 29 Jun 2019, pp.147-150
21.
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit With High Speed Feed Forward Correction in 65 nm CMOS / Biereigel, Stefan (Leuven U.) ; Kulis, Szymon (CERN) ; Leitao, Pedro (CERN) ; Francisco, Rui (CERN) ; Moreira, Paulo (CERN) ; Leroux, Paul (Leuven U.) ; Prinzie, Jeffrey (Leuven U.)
A fault tolerant, radiation hardened Clock and Data Recovery (CDR) architecture is presented for high-energy physics and space applications. The CDR employs a novel soft-error tolerant Voltage Controlled Oscillator (VCO) and includes a high-speed feed-forward path, which stabilizes the CDR by compensating for an additional pole introduced in the VCO in order to harden it against ionizing particles. [...]
2019 - 9 p. - Published in : IEEE Trans. Circuits Theor. 67 (2019) 1438-1446
22.
The lpGBT PLL and CDR Architecture, Performance and SEE Robustness / Biereigel, Stefan (Brandenburg Tech. U. ; Leuven U. ; CERN) ; Kulis, Szymon (CERN) ; Francisco, Rui (CERN) ; Leitao, Pedro Vicente (CERN) ; Leroux, Paul (Leuven U.) ; Moreira, Paulo (CERN) ; Prinzie, Jeffrey (Leuven U.)
We present the design, architecture and experimental results of the low jitter Clock and Data Recovery (CDR) and Phase Locked Loop (PLL) circuit in the Low-Power Gigabit Transceiver (lpGBT) ASIC. This circuit includes a low noise radiation-tolerant integrated LC-oscillator with a nominal frequency of 5.12 GHz to support a 10.24 Gbps uplink and a 2.56 Gbps downlink CDR. [...]
SISSA, 2020 - 5 p. - Published in : PoS TWEPP2019 (2020) 034 Fulltext: PDF;
In : TWEPP 2019 Topical Workshop on Electronics for Particle Physics, Santiago De Compostela, Spain, 2 - 6 Sep 2019, pp.034

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