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CASES 2006: Seoul, Korea
- Seongsoo Hong, Wayne H. Wolf, Krisztián Flautner, Taewhan Kim:
Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006. ACM 2006, ISBN 1-59593-543-6 - Liang-Gee Chen
:
Dances with multimedia: embedded video codec design. 1
Modeling and simulation
- Hiroshi Nakashima, Masahiro Konishi, Takashi Nakada:
An accurate and efficient simulation-based analysis for worst case interruption delay. 2-12 - Won So, Alexander G. Dean:
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP. 13-23 - John Cavazos, Christophe Dubach, Felix V. Agakov, Edwin V. Bonilla, Michael F. P. O'Boyle, Grigori Fursin, Olivier Temam:
Automatic performance model construction for the fast software exploration of new hardware designs. 24-34
Short presentations with posters I
- Dong-Heon Jung, Sung-Hwan Bae, Jaemok Lee, Soo-Mook Moon, Jong Kuk Park:
Supporting precise garbage collection in Java Bytecode-to-C ahead-of-time compiler for embedded systems. 35-42 - Stephen Hines, David B. Whalley, Gary S. Tyson:
Adapting compilation techniques to enhance the packing of instructions into registers. 43-53 - Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, Paul Klein, Allen R. Hefner, Bruce L. Jacob:
Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study. 54-64 - Hans-Peter Löb, Rainer Buchty, Wolfgang Karl:
A network agent for diagnosis and analysis of real-time Ethernet networks. 65-73 - Rachid Seghir
Memory optimization by counting points in integer transformations of parametric polytopes. 74-82 - Ka-Ming Keung, Akhilesh Tyagi:
State space reconfigurability: an implementation architecture for self modifying finite automata. 83-92 - Arran Derbyshire, Tobias Becker
Incremental elaboration for run-time reconfigurable hardware designs. 93-102 - Taeho Kgil, Trevor N. Mudge:
FlashCache: a NAND flash memory file cache for low power web servers. 103-112
Compilation
- Mats Brorsson, Mikael Collin:
Adaptive and flexible dictionary code compression for embedded applications. 113-124 - Lan S. Bai, Lei Yang, Robert P. Dick:
Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems. 125-135 - Hyunchul Park, Kevin Fan, Manjunath Kudlur, Scott A. Mahlke:
Modulo graph embedding: mapping applications onto coarse-grained reconfigurable architectures. 136-146 - Nathan Clark, Amir Hormati, Scott A. Mahlke, Sami Yehia:
Scalable subgraph mapping for acyclic computation accelerators. 147-157
Architecture/power
- Jason George, Bo Marr, Bilge Saglam Akgul, Krishna V. Palem:
Probabilistic arithmetic and energy efficient embedded signal processing. 158-168 - Chengmo Yang, Alex Orailoglu:
Power efficient branch prediction through early identification of branch addresses. 169-178 - Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stuart Biles
Reducing energy of virtual cache synonym lookup using bloom filters. 179-189 - Lukasz Strozek, David M. Brooks:
Efficient architectures through application clustering and architectural heterogeneity. 190-200
Memory systems
- Bernhard Scholz, Bernd Burgstaller, Jingling Xue
Minimizing bank selection instructions for partitioned memory architecture. 201-211 - Yoonseo Choi, Hwansoo Han:
Protected heap sharing for memory-constrained java environments. 212-222 - Bernhard Egger
A dynamic code placement technique for scratchpad memory using postpass optimization. 223-233 - Seon-Yeong Park, Dawoon Jung, Jeong-Uk Kang, Jinsoo Kim, Joonwon Lee:
CFLRU: a replacement algorithm for flash memory. 234-241
Short presentations with posters II
- Paolo Bonzini, Laura Pozzi:
Code transformation strategies for extensible embedded processors. 242-252 - Neil C. Audsley, Michael Ward:
Syntax-driven implementation of software programming language control constructs and expressions on FPGAs. 253-260 - Kim M. Hazelwood, Artur Klauser
A dynamic binary instrumentation engine for the ARM architecture. 261-270 - Manuel Carro
High-level languages for small devices: a case study. 271-281 - John Gilbert, David M. Abrahamson:
Adaptive object code compression. 282-292 - Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis:
Limitations of special-purpose instructions for similarity measurements in media SIMD extensions. 293-303 - Chinnakrishnan S. Ballapuram, Kiran Puttaswamy, Gabriel H. Loh, Hsien-Hsin S. Lee:
Entropy-based low power data TLB design. 304-311 - Charles Hardnett, Krishna V. Palem, Yogesh Chobe:
Compiler optimization of embedded applications for an adaptive SoC architecture. 312-322
Multithreading and multiprocessing
- Greg Hoover, Forrest Brewer
Extensible control architectures. 323-333 - Duo Liu, Bei Hua, Xianghui Hu, Xinan Tang:
High-performance packet classification algorithm for many-core and multithreaded network processor. 334-344 - Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi, Timothy Sherwood
Improving the performance and power efficiency of shared helpers in CMPs. 345-356 - Greg Hoover, Forrest Brewer
A case study of multi-threading in the embedded space. 357-367
Low power
- Mark Hempstead, Gu-Yeon Wei, David M. Brooks:
Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations. 368-378 - Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochocki, Xiaobo Sharon Hu
Methods for power optimization in distributed embedded systems with real-time requirements. 379-388 - Noel Eisley, Vassos Soteriou
High-level power analysis for multi-core chips. 389-400
Robustness
- Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitra
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures. 401-410 - Kyoungwoo Lee, Aviral Shrivastava
Mitigating soft error failures for multimedia applications by selective data protection. 411-420 - Jason A. Blome, Shantanu Gupta, Shuguang Feng, Scott A. Mahlke:
Cost-efficient soft error protection for embedded microprocessors. 421-431
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