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22nd EUROMICRO 1996: Prague, Czech Republic
- 22rd EUROMICRO Conference '96, Beyond 2000: Hardware and Software Design Strategies, September 2-5, 1996, Prague, Czech Republic. IEEE Computer Society 1996, ISBN 0-8186-7487-3
System-Level Design
- Lech Józwiak, Sien-An Ong:
Quality-Driven Decision Making Methodology for System-Level Design. 8-18 - Jeroen Voeten, P. H. A. van der Putten, M. P. J. Stevens:
Behaviour-Preserving Transformations in SHE: A Formal Approach to Architecture Design. 19-27 - Ghassan Al Hayek, Yves Le Traon, Chantal Robach:
Considering Test Economics in the Process of Hardware/Software Partitioning. 28-
Multiprocessor Architectures
- Anna M. del Corral, José M. Llabería:
Increasing the Effective Memory Bandwidth in Multivector Processors. 38-45 - István Vassányi, István Erényi:
Implementation of Processor Cells for Array Algorithms on FPGAs. 46-50 - Aziz Can Yuceturk, Bernd Klauer, Stefan Zickenheiner, Ronald Charles Moore, Klaus Waldschmidt:
Mapping of Neural Networks onto Data Flow Graphs. 51-
Real time
- Alberto García-Martínez, Jesús Fernández-Conde
, Ángel Viña:
A Comprehensive Approach in Performance Evaluation for Modern Real-Time Operating Systems. 61-68 - Joshua Etkin, José Fridman:
An Algorithm for Scheduling Prioritized Tasks in a Hard Real-Time Environment. 69-76 - Steven Bradley, William Henderson, David Kendall, Adrian Robson, Stephen Hawkes:
A Formal Design and Implementation Method for Real-Time Embedded Systems. 77-
Design Methodologies and Tools
- Reinhard Rauscher:
A Design Assistant for Scheduling of Design Decisions. 88-95 - João M. S. Alcântara, Carlo E. T. de Oliveira, Manuel L. Anido:
A Novel Circuit Extraction Tool Based on X-Spans and Y-Spans. 96-103 - Karlheinz Agsteiner, Dieter Monjau, Sören Schulze:
Automating System-Level Design: From Specification to Architecture. 104-
Optimization
- Dominique De Vito, Olivier Michel:
Effective SIMD Code Generation for the High-Level Declarative Data-Parallel Language 8 1/2. 114-119 - Genésio Gomes da Cruz Neto, Ricardo Massa Ferreira Lima, Rafael Dueire Lins, André L. M. Santos:
Optimising Pseudoknotin FCMC. 120-126 - Alexander S. Antonov, Vladimir V. Voevodin:
Application of the V-Ray Technology for Optimization of the TRFD and FL052 Perfect Club Benchmarks to CRAY Y-MP and CRAY T3D Supercomputers. 127-
Development of Control Systems
- Eero Lassila:
A Macro Expansion Approach to Embedded Processor Code Generation. 136-142 - Jan Hlavicka, Stanislav Racek, Pavel Smrha:
Functional Validation of Fault-Tolerant Asynchronous Algorithms. 143-150 - Miroslav Svéda:
A Prototyping Technique with an Asychronous Specification Language. 151-157 - Oliver Hammerschmidt, Thomas Doersam:
Software Engineering in Control Using Objects and Services. 158-
Formal Methods for Hardware Design
- Sheetanshu L. Pandey, Kothanda R. Subramanian, Philip A. Wilsey:
A Semantic Model of VHDL for Validating Rewriting Algebras. 167-176 - Corrie Huijs:
A Graph Rewriting Approach for Transformational Design of Digital Systems. 177-184 - Peter Grün, Petru Eles, Krzysztof Kuchcinski, Zebo Peng:
Automatic Parallelization of a Petri Net-Based Design Representation for High-Level Synthesis. 185-192 - B. Antal, György Csertán, István Majzik, Andrea Bondavalli
Reachability and Timing Analysis in Data Flow Networks: A Case Study. 193-
Performance Engineering
- Christoph Siegelin, Ciaran O'Donnell, Ulrich Finger:
Efficient Simulation of Multiprocessors through Finite State Machines. 202-206 - Roberto Giorgi, Cosimo Antonio Prete, Luigi M. Ricciardi, Gianpaolo Prina:
A Hybrid Approach to Trace Generation for Performance Evaluation of Shared-Bus Multiprocessors. 207-214 - José M. García, A. Flores:
A Novel Approach to Improve the Performance of Interconnection Networks with Hot - Spots. 215-222 - Leszek Borzemski
A Load Balancing System for Windows NT Networks. 223-
Usability Engineering
- Jan Vanthienen, Stephan Poelmans:
A General Framework for Positioning, Evaluating and Selecting the New Generation of Development Tools. 233-241 - Cecilia Inés Sosa Arias, Beatriz Mascia Daltrini:
A Multi-Agent Environment for User Interface Design. 242-247 - Nomusa Dlodlo, Carl Bamford:
Separating Application Functionality from the User Interface in a Distributed Environment. 248-
Logic Synthesis
- Reinhard Rauscher, Dieter Klawan, Hans-Jürgen Bandelt:
Results Given by a New Evaluation System for Placement and Routing Heuristics. 259-266 - Reinhard Rauscher, Andreas Krause:
A System for Heuristic Modifications on PLA - Specifications. 267-274 - Hans-Georg Martin:
Retiming for Circuits with Enable Registers. 275-
Fault Tolerance
- Charles Changli Chin, Shang-Rong Tsai:
Transparency in a Replicated Network File System. 285-291 - Andrew M. Tyrrell:
Recovery Blocks and Algorithm-Based Fault Tolerance. 292-
Specification and Validation
- Yong Sun, Hongji Yang:
Communication Mechanism Independent Protocol Specification Based on CSP: A Case Study. 303-310 - István Majzik:
Software Monitoring and Debugging Using Compressed Signature Sequences. 311-318 - Souâd Taouil-Traverson, Sylvie Vignes:
Preliminary Analysis Cycle for B-Method Software Development. 319-
Testing
- Janusz Sosnowski, A. Kusmierczyk:
Pseudorandom versus Deterministic Testing of Intel 80x86 Processors. 329-336 - Ghassan Al Hayek, Chantal Robach:
On the Adequacy of Deriving Hardware Test Data from the Behavioral Specification. 337-342 - João Carlos Cunha, João Gabriel Silva:
DELFIM: Error Detection by Thin Memory Protection. 343-350 - Roberto Bevacqua, Luca Guerrazzi, Franco Fummi:
SCAN/BIST Techniques for Decreasing Test Storage and their implications to Test Pattern Generation. 351-
Dependable Systems
- Katerina Goseva-Popstojanova
N-Version Programming: A Unified Modeling Approach. 363-370 - Oum-El-Kheir Benkahla, F. Chevassu, B. Remy, Chantal Robach:
Performance Evaluation of Testing Strategies in Parallel Systems. 371-378 - Tamás Bartha:
Effective Approximate Fault Diagnosis of Systems with Inhomogeneous Test Invalidation. 379-
High-Speed Networks
- Aristotel Tentov, Aksenti L. Grnarov:
Performance Analysis of Packet Switching Interconnection Networks with Finite Buffers. 390-396 - Hoyoung Hwang, Hyoungjun Kim, Yanghee Choi, Chongsang Kim:
Multicast Routing Algorithms for Manhattan Street Network. 397-404 - Pertti Raatikainen, Teleste Oy, Juha Zidbeck:
Performance Comparison of Experimented Switching Architectures for ATM. 405-411 - Minho Song, Yanghee Choi, Chongsang Kim:
Connection Rerouting Method for General Application to Connection-Oriented Mobile Communication Net works. 412-
Memory Issues
- Morten Kjelsø, Mark Gooch, Simon Jones:
Design and Performance of a Main Memory Hardware Data Compressor. 423-430 - Pablo Ibáñez
Performance Assessment of Contents Management in Multilevel On-Chip Caches. 431-440 - Kanad Ghose, Kiran Raghavendra Desai, Peter M. Kogge:
Using Method Lookup Caches and Register Windowing to Speed Up Dynamically-Bound Object-Oriented Applications. 441-
Distributed Systems
- Elena Pagani, Gian Paolo Rossi:
Comparing Performances and Quality of Service of Group Communication Protocols. 451-458 - Giacomo Cabri, Antonio Corradi, Franco Zambonelli:
Experience of Adaptive Replication in Distributed File Systems. 459-466 - Han-Suk Choi, Jae Soo Yoo, Ok-Bae Chang:
A New Control Service Model Based on CORBA for Distributed Multimedia Objects. 467-
Formal Specification and Multimedia
- Stefan Fischer, Jacek Wytrebowicz
Hardware/Software Co-Design of Communication Protocols. 476-483 - Chie Dou:
Formal Specification of Communication Protocols Based on a Timed-SDL: Validation and Performance Prospects. 484-491 - Mohamed Bettaz, Mourad Maouche, Kamel Barkaoui:
Formal Specification of Communication Protocols with Object-Based ECATNets. 492-
Co-Processors
- Adam Postula, David Abramson, Paul Logothetis:
The Design of a Specialised Processor for the Simulation of Sintering A. Postula. 501-508 - Johan Stärner, Joakim Adomat, John Furunäs, Lennart Lindh:
Real-Time Scheduling Co-Processor in Hardware for Single and Multiprocessor Systems. 509-512 - Alexandre R. S. Romariz, P. U. A. Ferreira, J. V. Campêlo Jr., Marcio L. Graciano Jr., José C. da Costa:
Design of a Hybrid Digital-Analog Neural Co-Processor for Signal Processing. 513-519 - Vassilliy Tchoumatchenko, Tania Vassileva, P. Gurov:
An FPGA-Based Square-Root Co-Processor. 520-
Image Processing
- Petr Zemánek:
Parallel Set Operations with Visual Data. 529-536 - Richard Canham, Stephen L. Smith, Andrew M. Tyrrell:
Parallel Approaches to the Segmentation of Free-Hand Drawings. 537-
Parallel Software Engineering
- John Yiannis Cotronis:
Efficient Program Composition on Parix by the Ensemble Methodology. 545-552 - Casiano Rodríguez, José L. Roda
Paradigms for Parallel Dynamic Programming. 553-
Operating System and Network Support
- Anastasio Molano, Alberto García-Martínez, Ángel Viña:
The Design and Implementation of a Multimedia Storage Server to Support Video-on-Demand Applications. 564-571 - Robert Hess, Tino Hutschenreuther, Ralf Lehmann, Alexander Schill:
Architecture and Implementation for Scalable Transfer of Live Videos in Multimedia Applications. 572-580 - Jocelyne Farhat-Gissler, Isabelle M. Demeure:
Automatic Scheduling of Applications with Temporal QoS Constraints: A Case Study. 581-
Novel Processor Architectures
- Winfried Grünewald, Theo Ungerer:
Towards Extremely Fast Context Switching in a Block-Multithreaded Processor. 592-599 - Christian Piguet, Thierry Schneider, Jean-Marc Masgonty, Claude Arm, Serge Durand, M. Stegers:
Low-Power Embedded Microprocessor Design. 600-605 - Kanad Ghose, Pavel Vasek:
A Fast Capability Extension to a RISC Architecture. 606-
Operational Considerations
- Roberto Baldoni, Michel Raynal, Ravi Prakash, Mukesh Singhal:
Broadcast with Time and Causality Constraints for Multimedia Applications. 617-624 - Tino Pyssysalo, Leo Ojala:
Causal Modeling of a Video-on-Demand System Using Predicate/Transition Net Formalism. 625-632 - Ernst W. Biersack, Frédéric Thiesse:
Statistical Admission Control in Video Servers with Variable Bit-Rate Streams and Constant Time Length Retrieva. 633-
Superscalar Architectures
- Roger Collins, Gordon B. Steven:
Instruction Scheduling for a Superscalar Architecture. 643-650 - Eliseu M. Chaves Filho, Edil S. T. Fernandes, Andrew Wolfe:
Load Balancing in Superscalar Architectures. 651-
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