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6th FDL 2003: Frankfurt, Germany
- Forum on specification and Design Languages, FDL 2003, September 23-26, 2003, Frankfurt, Germany, Proceedings. ECSI 2003
AMS-1: IP and Reuse
- Fabien Mieyeville
, Matthieu Briere, Ian O'Connor, Frédéric Gaffiot, Gilles Jacquemod:
A VHDL-AMS library of hierarchical optoelectronic device models. 7-19 - T. Cuenin, Olivier Romain, Patrick Garda:
Design and Modelling of an I2C Bus Controller. 19-31 - Rachid Guelaz, Djilali Kourtiche, Mustapha Nadi:
A behavioural description with VHDL-AMS of a piezo-ceramic ultrasound transducer based on the Redwood's model. 32-44
AMS-2: System Level Desing
- C. Isaia, Tom J. Kazmierski:
SystemC - a powerful system-level modelling platform for digital and mixed-signal hardware/software co-design. 45-54 - Massimo Conti, Marco Caldari, Simone Orcioni, Giorgio Biagetti:
Analog Circuit Modeling in SystemC. 54-65 - Tom J. Kazmierski, Hessa Al-Junaid:
Synchronization of analogue and digital solvers in mixed-signal simulation on a SystemC platform. 65-72 - Karsten Einwich, Peter Schwarz:
SystemC-AMS Steps towards an Implementation. 72-81
AMS-3: Modelling Technigues
- Wilhelm Heupke, Christoph Grimm, Klaus Waldschmidt:
A New Method for Modeling and Analysis of Accuracy and Tolerances in Mixed-Signal Systems. 82-90 - Yannick Hervé:
Simple Models for Complex Systems : A-FSM Template. 90-98 - Joachim Haase:
Rules for Analog and Mixed-Signal VHDL-AMS Modeling. 98-108 - Guillaume Monnerie, Noëlle Lewis, Dominique Dallet, Hervé Levi, M. Robbe:
Modelling of transient noise sources with VHDL-AMS and normative spectral interpretation. 108-120
AMS-4: Sigma/Delta Converters
- Rafael Castro-López, José M. de la Rosa, R. Romay, Rocío del Río, Fernando Medeiro, Francisco V. Fernández:
Description Languages and Tools for the Behavioural Simulation of SD Modulators: a Comparative Survey. 121-133 - Alex Doboli, Hua Tang, Hui Zhang:
Towards High-Level Synthesis of Analog and Mixed-Signal Systems from VHDL-AMS Specifications. 133-141 - Ahmed Fakhfakh, Mourad Loulou, Nesrine Ksentini, Nouri Masmoudi, Jean-Jacques Charlot:
VHDL-AMS Behavioural Modelling of a Switched Current Sigma-Delta Modulator. 141-150
AMS-5: Desing Methodologies
- Faress Tissafi-Drissi, Ian O'Connor, Fabien Mieyeville, Frédéric Gaffiot:
Hierarchical synthesis of high-speed CMOS photoreceiver front-ends using a multi-domain behavioural description language. 151-163 - Fazrena A. Hamid, Tom J. Kazmierski:
FIST - a VHDL-AMS based architectural synthesis strategy for integrated high-frequency analogue filters. 163-175 - François Marc, B. Mongellaz, Yves Danto:
Reliability simulation of electronic circuits with VHDL-AMS. 175-184
AMS-6: Praktical Applications
- Jean Oudinot, G. Overton, Aitor Endemaño Isasi, Marc P. Y. Desmulliez, Jean-Yves Fourniols, Sylvaine Muratet:
Micromotor Simulation with VHDL-AMS. 185-197 - Martin Stark, Jan-Hendrik Oetjens, Wolfgang Rosenstiel:
A Seamless Simulink Based System Desing Flow for Automotive Applications. 197-204 - A. F. Noullet, F. Healey, O. Tico, R. Santonja, J.-C. Mboli, T. Nouguier:
VerilogAMS language used in the Top-Down Methodology for wireless integrated circuit designs. 204-213
UML-1: UML for HW/SW Codesign
- Ian Oliver, Michele Marchetti:
Towards a Conceptual Framework for UML to Hardware Description Language Mappings. 214-226 - Antonio Minosi, Srinivas Mankan, Aris Martinola, Francesco Balzarini, Atanas N. Kostadinov, Mauro Prevostini:
UML-based Specifications of an Embedded System oriented to HW/SW partitioning: a case study. 226-238 - Claudia Spircu, Thomas Gentnet, Heiko Beyer:
A UML Approach for Modeling the Components of a Test System for Integrated Circuits. 238-250
UML-2: Transformations and Code Generation
- Dag Björklund, Johan Lilius, Ivan Porres:
A Unified Approach to Code Generation from Behavioral Diagrams. 251-263 - Engelbert Hubbers, Martijn Oostdijk:
Generating JML Specifications from UML State Diagrams. 263-274 - Cédric Dumoulin, Jean-Luc Dekeyser, Boris Kokoszko, S. Pulon, G. Cristau:
Interoperability between Design and Simulation Tools using Model Transformation Techniques. 274-285
UML-3: Model Driven Architekture
- Dominik Fröhlich, Bernd Steinbach, Thomas Beierlein:
UML-Based Co-Design for Run-Time Reconfigurable Architectures. 285-297 - Ivan Kurtev, Klaas van den Berg, Mehmet Aksit:
UML to XML-Schema Transformation: a Case Study in Managing Alternative Model Transformations in MDA. 297-309 - Pierre Boulet, Jean-Luc Dekeyser, Cédric Dumoulin, Philippe Marquet:
MDA for SoC Design, Intensive Signal Processing Experiment. 309-317
UML-4: Real Time and System Level Modelling
- Jinfeng Huang, Jeroen Voeten, Andre Ventevogel, Leo J. van Bokhoven:
Platform-independent Design for Embedded Real-time Systems . 318-330 - Mark Verhappen, Jeroen Voeten, P. H. A. van der Putten:
Traversing the Fundamental System-Level Design Gap Using Modeling Patterns. 330-342 - Trung Hieu Phan, Sébastien Gérard, François Terrier:
Real-time system modeling with ACCORD/UML methodology: Illustration through an automotive case study. 342-354 - Grzegorz Labiak:
From UML statecharts to FPGA - the HiCoS approach. FDL 2003: 354-364 - Leandro Soares Indrusiak, Ricardo Reis, Manfred Glesner:
Supporting Consistency Control between Functional and Structural Views in Interface-based Design Models. 364-373
LFM-1: Property Specification and Analysis
- Jürgen Ruf, Prakash Mohan Peranandam, Thomas Kropf, Wolfgang Rosenstiel:
Using Symbolic Simulation for Bounded Property Checking. 374-385 - George Logothetis, Klaus Schneider, C. Metzler:
Exact Low-Level Runtime Analysis of Synchronous Programs for Formal Verification of Real-Time Systems. 385-405 - Yuhong Zhao:
Intuitive Representations for Temporal Logic Formulas. 405-414 - Andrei Karatkevich:
Deadlock Analysis in Statecharts. 414-425
LFM-2: Formal Specification in Application
- Werner Haas, T. Bürner, Stefan Gossens, Ulrich Heinkel:
Formal Specification of a 40GBit/s Sonet/SDH ASIC. 426-435 - Dominique Cansell, Dominique Méry, Cyril Proch:
Proof-based design of a microelectronic architecture for MPEG-2 bit-rate measurement . 435-447 - Marco Fischer, André Windisch, Stefan Förster, Burkhard Balser, Dieter Monjau:
A New Time Extension to phi-Calculus based on Time Consuming Transition Semantics. 447-456 - Anaheed Ayoub, Ayman M. Wahba, Ashraf M. Salem, Mohamed A. Sheirah:
TCTL-Based Verification of Industrial Processes. 456-468
LFM-3: System Desing under Formal Aspects
- Jan Romberg, Christoph Grimm:
Refinement of Hybrid Systems from Formal Models to Design Languages. 469-481 - Dominique Borrione, Menouer Boubekeur:
Modeling CHP descriptions in Labeled Transitions Systems for an efficient formal validation of asynchronous circuit specifications. 481-492 - Mauricio Ayala-Rincón, Ricardo P. Jacobi, Carlos H. Llanos, Reiner W. Hartenstein:
Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing. 492-504
LFM-4: Formal Refinement
- Colin F. Snook, Kim Sandström:
Using UML-B and U2B for formal refinement of digital components1. 505-515 - Alexander Krupp, Wolfgang Müller:
Combining Formal Refinement and Model Checking for Real-Time Systems Verification. 515-525 - Stefan Förster, Marco Fischer, Dieter Monjau, André Windisch, Burkhard Balser:
Process Algebraic Specification, Refinement, and Verification of Embedded Systems. 525-536 - J. Fogel:
Compositional Proof Rules for Hierarchical Timed Automata. 536-547
CSD-1: System Specification
- Lluís Ribas
On Hardware Description in ECL. 548-557 - Chris Sullivan, Jeff Jussel:
Software-Compiled System Desing: a methodology based approach to the specification & desing of Programmable SoC. 557-565 - Fernando Herrera, Pablo Sánchez, Eugenio Villar
Modeling of CSP, KPN and SR Systems with SystemC. 572-583 - Jean Paul Calvez, Rocco Le Moigne, Olivier Pasquier:
A Graphical Tool for System-Level Modeling and Simulation with SystemC. 583-593 - Christoph Jaeschke, Bodo Hoppe, Wolfram Sauer:
A Tool-Set for Table Based Direct Behavioral Configuration of C++ Models. 593-605 - Ivan Jeukens, Marius Strum:
Exploring Models of Computation through Static Analysis. 605-616
CSD-2: Languages in Media + Projects
- U. Badelt, H. Kühl, Martin Radetzki:
sciPROVE: C++ Based Verification Environment for IP and SoC Design1. 617-627 - Axel G. Braun, Thorsten Schubert, Martin Stark, Karsten Haug, Joachim Gerlach, Wolfgang Rosenstiel:
Case Study: SystemC-Based Design of an Industrial Exposure Control Unit1. 627-636
CSD-3: High Level Verification and Test Generation
- Avi Ziv:
Functional Verification Environment for Object-oriented Hardware Designs. 637-646 - Daniel Große, Rolf Drechsler, Lothar Linhard, Gerhard Angst:
Efficient Automatic Visualization of SystemC Designs. 646-658 - Alessandro Fin, Franco Fummi:
LAERTE++: an Object Oriented High-level TPG for SystemC Designs. 658-668
CSD-4: Desing for Verification
CSD-5: System Desing
- Fabio Salice, William Fornaciari, Luigi Pomante, Donatella Sciuto:
An Internal Representation Model for System-Level Co-Design of Heterogeneous Multiprocessor Embedded System. FDL 2003: 669-680 - Maziar Goudarzi, Shaahin Hessabi, Alan Mycroft:
Object-Oriented ASIP Design and Synthesis. 680-692 - Massimo Conti, Marco Caldari, Simone Orcioni:
Dynamic Power Management of an AMBA-based Platform in SystemC. 692-704 - Jérôme Chevalier, Mathieu Rondonneau, Olivier Benny, Guy Bois, El Mostapha Aboulhamid, François R. Boyer:
SPACE: A Hardware/Software SystemC Modeling Platform Including an RTOS. 704-716 - Ole Blaurock:
C-model integration and software development using system-level simulation at TLM in a SystemC-based desing flow. 716-719 - Marco Caldari, Massimo Conti, Paolo Crippa, Simone Orcioni, Claudio Turchetti:
Design and Power Analysis in SysteC of an I2C Bus Driver. 719-727 - Péter Arató, Bence Csák:
Hardware Definition Based on Standard C-language Source Code. 727-736
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