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HPEC 2022: Waltham, MA, USA
- IEEE High Performance Extreme Computing Conference, HPEC 2022, Waltham, MA, USA, September 19-23, 2022. IEEE 2022, ISBN 978-1-6654-9786-2
- Shaoxian Xu, Minkang Wu, Long Zheng, Zhiyuan Shao, Xiangyu Ye, Xiaofei Liao, Hai Jin:
Towards Fast GPU-based Sparse DNN Inference: A Hybrid Compute Model. 1-7 - Shachi Khadilkar, Martin Margala:
Optimizing open-source FPGA CAD tools. 1-4 - Sadasivan Shankar
, Albert Reuther:
Trends in Energy Estimates for Computing in AI/Machine Learning Accelerators, Supercomputers, and Compute-Intensive Applications. 1-8 - Lisa J. K. Durbeck, Peter Athanas:
Kalman Filter Driven Estimation of Community Structure in Time Varying Graphs. 1-7 - Clayton J. Faber, Steven D. Harris
Challenges Designing for FPGAs Using High-Level Synthesis. 1-7 - Shomik Verma, Shivam Kajale, Rafael Gómez-Bombarelli:
Machine learning for accurate and fast bandgap prediction of solid-state materials. 1-2 - Bingyi Zhang, Akhilesh R. Jaiswal, Clynn Mathew, Ravi Teja Lakkireddy, Ajey P. Jacob, Sasindu Wijeratne, Viktor K. Prasanna:
Modeling the Energy Efficiency of GEMM using Optical Random Access Memory. 1-7 - Chansup Byun, William Arcand, David Bestor, Bill Bergeron, Vijay Gadepally, Michael Houle, Matthew Hubbell, Hayden Jananthan, Michael Jones, Kurt Keville, Anna Klein, Peter Michaleas, Lauren Milechin, Guillermo Morales, Julie Mullen, Andrew Prout, Albert Reuther, Antonio Rosa, Siddharth Samsi, Charles Yee, Jeremy Kepner:
pPython for Parallel Python Programming. 1-6 - Shaofen Chen, Haiyan Lin, Wenjin Huang, Yihua Huang:
Hardware Design and Implementation of Classic McEliece Post-Quantum Cryptosystem Based on FPGA. 1-6 - Shamminuj Aktar
Quantum Netlist Compiler (QNC). 1-7 - Rushi Patel, Pouya Haghi, Shweta Jain, Andriy Kot, Venkata Krishnan, Mayank Varia, Martin C. Herbordt
Distributed Hardware Accelerated Secure Joint Computation on the COPA Framework. 1-7 - Bheema Lakshmi Pradeep, Rishu Anand, Pavan Vadakattu, Syed Azeemuddin, Aquibuddin Ahmed:
Design and Implementation of a Real-time Parallel FFT for a Direction-Finding System on an FPGA. 1-7 - Ariel Luna, Yair Levy, Gregory Simco, Wei Li:
Proposed Empirical Assessment of Remote Workers' Cyberslacking and Computer Security Posture to Assess Organizational Cybersecurity Risks. 1-2 - Sansriti Ranjan, Dakota Fulp, Jon C. Calhoun:
Exploring the Impacts of Software Cache Configuration for In-line Compressed Arrays. 1-7 - Jianshen Liu
Processing Particle Data Flows with SmartNICs. 1-8 - Andrew Wood, Moshik Hershcovitch, Ilias Ennmouri, Weiyu Zong, Saurav Chennuri, Sarel Cohen, Swaminathan Sundararaman, Daniel G. Waddington, Sang (Peter) Chin:
Towards Fast Crash-Consistent Cluster Checkpointing. 1-8 - Dimitris Floros, Tiancheng Liu, Nikos Pitsianis, Xiaobai Sun:
Fast Graph Algorithms for Superpixel Segmentation. 1-8 - Tyler Trigg, Chad R. Meiners, Sandeep Pisharody, Hayden Jananthan, Michael Jones, Adam Michaleas
Hypersparse Network Flow Analysis of Packets with GraphBLAS. 1-7 - Ismael Boureima, Manish Bhattarai, Maksim Ekin Eren, Nick Solovyev, Hristo N. Djidjev, Boian S. Alexandrov:
Distributed Out-of-Memory SVD on CPU/GPU Architectures. 1-8 - Benoît Dupont de Dinechin:
Computing In-Place FFTs with SIMD Lane Slicing. 1-7 - Alan Nussbaum, Byron Keel, William Dale Blair, Umakishore Ramachandran:
Real-Time Software Architecture for EM-Based Radar Signal Processing and Tracking. 1-7 - Larry T. Pileggi, Siyuan Chen, Keshav Harisrikanth, Guanglin Xu, Ken Mai, Franz Franchetti:
A High Throughput Hardware Accelerator for FFTW Codelets: A First Look. 1-7 - Emilia Grzesiak, Jennifer Sloboda, Ho Chit Siu:
Predicting Ankle Moment Trajectory with Adaptive Weighted Ensemble of LSTM Networks. 1-7 - Kholoud Mahmoud, Randa Ahmed, Karim Ayman, Mostafa Aymau, Waleed Taie, Yasser Ibrahim, Hassan Mostafa, Khaled Salah:
Towards a Generic UVM. 1-6 - Connor Kenyon, Collin D. Capano:
Apple Silicon Performance in Scientific Computing. 1-10 - Zhaoyang Han, Yiyue Jiang, Rahul Mushini, John Dooley, Miriam Leeser:
Hardware Software Codesign of Applications on the Edge: Accelerating Digital PreDistortion for Wireless Communications. 1-6 - David Brigada, Maximilian Merfeld, Kara Warner:
GPU-Accelerated High-Bandwidth Radar Centroiding. 1-6 - Seunghwa Kang, Joseph Nke, Brad Rees:
Analyzing Multi-trillion Edge Graphs on Large GPU Clusters: A Case Study with PageRank. 1-7 - Cameron Ibrahim, Danylo Lykov
Constructing Optimal Contraction Trees for Tensor Network Quantum Circuit Simulation. 1-8 - Chenxu Niu
Kv2vec: A Distributed Representation Method for Key-value Pairs from Metadata Attributes. 1-7 - Maron Schlemon, Martin Schulz
Resource-Constrained Optimizations For Synthetic Aperture Radar On-Board Image Processing. 1-8 - Zaidao Mei, Mark Barnell, Qinru Qiu:
Unsupervised Adaptation of Spiking Networks in a Gradual Changing Environment. 1-7 - Mark Barnell, Courtney Raymond, Steven Smiley, Darrek Isereau, Daniel Brown:
Ultra Low-Power Deep Learning Applications at the Edge with Jetson Orin AGX Hardware. 1-4 - Daniel Curtis Wilson, Ioannis Ch. Paschalidis, Ayse K. Coskun:
Site-Wide HPC Data Center Demand Response. 1-7 - William F. Ellersick:
How to Prevent a Sick ASIC. 1-6 - Letian Zhao, Qizhe Wu, Xiaotian Wang, Teng Tian, Wei Wu, Xi Jin:
HuGraph: Acceleration of GCN Training on Heterogeneous FPGA Clusters with Quantization. 1-7 - Matthew L. Weiss, Joseph McDonald, David Bestor, Charles Yee, Daniel Edelman, Michael Jones, Andrew Prout, Andrew Bowne, Lindsey McEvoy, Vijay Gadepally, Siddharth Samsi:
An Evaluation of Low Overhead Time Series Preprocessing Techniques for Downstream Machine Learning. 1-6 - Nathan C. Frey, Baolin Li, Joseph McDonald, Dan Zhao, Michael Jones, David Bestor, Devesh Tiwari, Vijay Gadepally, Siddharth Samsi:
Benchmarking Resource Usage for Efficient Distributed Deep Learning. 1-8 - Hayden Jananthan, Lauren Milechin, Michael Jones, William Arcand, William Bergeron, David Bestor, Chansup Byun, Michael Houle, Matthew Hubbell, Vijay Gadepally, Anna Klein, Peter Michaleas, Guillermo Morales, Julie Mullen, Andrew Prout, Albert Reuther, Antonio Rosa, Siddharth Samsi, Charles Yee, Jeremy Kepner:
Python Implementation of the Dynamic Distributed Dimensional Data Model. 1-8 - Piotr Luszczek, Cade Brown:
Surrogate ML/AI Model Benchmarking for FAIR Principles' Conformance. 1-5 - Ian Bogle, George M. Slota:
Achieving Speedups for Distributed Graph Biconnectivity. 1-7 - Zifan Carl Guo, William S. Moses:
Enabling Transformers to Understand Low-Level Programs. 1-9 - Samuel Thomas, Jiwon Choe, Ofir Gordon, Erez Petrank, Tali Moreshet, Maurice Herlihy, R. Iris Bahar
Towards Hardware Accelerated Garbage Collection with Near-Memory Processing. 1-6 - Po-Hao Chen, Pouya Haghi, Jae Yoon Chung
The Viability of Using Online Prediction to Perform Extra Work while Executing BSP Applications. 1-7 - Mehmet Güngör
Optimizing Designs Using Several Types of Memories on Modern FPGAs. 1-7 - Qingru Zeng, Quanxin Li, Baoze Zhao, Han Jiao, Yihua Huang:
Hardware Design and Implementation of Post-Quantum Cryptography Kyber. 1-6 - Wali Mohammad Abdullah, David Awosoga
Efficient Calculation of Triangle Centrality in Big Data Networks. 1-7 - Nicklaus Przybylski, William M. Jones, Nathan DeBardeleben:
Online Detection and Classification of State Transitions of Multivariate Shock and Vibration Data. 1-7 - Jiezhong He, Zhouyang Liu, Yixin Chen, Hengyue Pan, Zhen Huang, Dongsheng Li:
FAST: A Scalable Subgraph Matching Framework over Large Graphs. 1-7 - Paul Sathre, Atharva Gondhalekar, Wu-chun Feng:
Edge-Connected Jaccard Similarity for Graph Link Prediction on FPGA. 1-10 - Shuai Lu, Jun Chu, Xu T. Liu
Im2win: Memory Efficient Convolution On SIMD Architectures. 1-7 - Baolin Li, Tirthak Patel
DASH: Scheduling Deep Learning Workloads on Multi-Generational GPU-Accelerated Clusters. 1-7 - Tsung-Wei Huang:
Enhancing the Performance Portability of Heterogeneous Circuit Analysis Programs. 1-2 - Prithvi Velicheti, Sivani Pentapati, Suresh Purini:
Systolic Array based FPGA accelerator for Yolov3-tiny. 1-2 - Yufei Sun, Long Zheng, Qinggang Wang, Xiangyu Ye, Yu Huang, Pengcheng Yao, Xiaofei Liao, Hai Jin:
Accelerating Sparse Deep Neural Network Inference Using GPU Tensor Cores. 1-7 - Marwan F. Abdelatti, Manbir Sodhi
A Multi-GPU Parallel Genetic Algorithm For Large-Scale Vehicle Routing Problems. 1-8 - Karim Youssef, Niteya Shah, Maya B. Gokhale, Roger Pearce, Wu-chun Feng:
AutoPager: Auto-tuning Memory-Mapped I/O Parameters in Userspace. 1-7 - Karim Youssef, Abdullah Al Raqibul Islam, Keita Iwabuchi, Wu-chun Feng, Roger Pearce:
Optimizing Performance and Storage of Memory-Mapped Persistent Data Structures. 1-7 - Ivan Kawaminami, Arminda Estrada, Youssef Elsakkary, Hayden Jananthan, Aydin Buluç
Large Scale Enrichment and Statistical Cyber Characterization of Network Traffic. 1-7 - Michael Beebe, Brody Williams, Stephen Devaney, John D. Leidel, Yong Chen, Steve Poole:
RaiderSTREAM: Adapting the STREAM Benchmark to Modern HPC Systems. 1-7 - Guanglin Xu, James C. Hoe, Franz Franchetti:
Flexible Hardware Accelerator Design Generation with Spiral. 1-7 - Wei Wu, Letian Zhao, Qizhe Wu, Xiaotian Wang, Teng Tian, Xi Jin:
An SSD-Based Accelerator for Singular Value Decomposition Recommendation Algorithm on Edge. 1-5 - Joseph McDonald, James M. Kurdzo
Performance Estimation for Efficient Image Segmentation Training of Weather Radar Algorithms. 1-7 - Wissam M. Sid-Lakhdar, Mohsen Aznaveh, Piotr Luszczek, Jack J. Dongarra:
Deep Gaussian process with multitask and transfer learning for performance optimization. 1-7 - Adam Michaleas
Parallel Computing with DNA Forensics Data. 1-7 - Michael Mandulak, Ruochen Hu, George M. Slota:
Explicit Ordering Refinement for Accelerating Irregular Graph Analysis. 1-8 - Jessica Ray, Chad R. Meiners:
Enabling Novel In-Memory Computation Algorithms to Address Next-Generation Throughput Constraints on SWaP- Limited Platforms. 1-7 - Albert Reuther, Peter Michaleas, Michael Jones, Vijay Gadepally, Siddharth Samsi, Jeremy Kepner:
AI and ML Accelerator Survey and Trends. 1-10 - Utkarsh Rajput, Chris Elrod, Yingbo Ma, Konstantin Althaus, Christopher Rackauckas:
Parallelizing Explicit and Implicit Extrapolation Methods for Ordinary Differential Equations. 1-9 - Hamdy Abdelkhalik, Yehia Arafa, Nandakishore Santhi
Demystifying the Nvidia Ampere Architecture through Microbenchmarking and Instruction-level Analysis. 1-8 - Mohammad Shafaet Islam, Qiqi Wang:
A Hierarchical Jacobi Iteration for Structured Matrices on GPUs using Shared Memory. 1-7 - Li Zeng
HTC: Hybrid vertex-parallel and edge-parallel Triangle Counting. 1-7 - S. Biplab Raut:
Performance speedup of Quantum Espresso using optimized AOCL-FFTW. 1-4 - Timothy J. Stavenger
C2QA - Bosonic Qiskit. 1-8 - Benjamin Fenelon, Lars A. Gjesteby, Webster Guan, Juhyuk Park, Kwanghun Chung, Laura J. Brattain:
A Scalable Inference Pipeline for 3D Axon Tracing Algorithms. 1-6 - Conghui Luo, Wenjin Huang, Dehao Xiang, Yihua Huang:
A High-performance Deployment Framework for Pipelined CNN Accelerators with Flexible DSE Strategy. 1-8 - Wesley Brewer, Joel Bretheim
Scalable Interactive Autonomous Navigation Simulations on HPC. 1-7 - Pengmiao Zhang, Rajgopal Kannan, Xiangzhi Tong, Anant V. Nori, Viktor K. Prasanna:
SHARP: Software Hint-Assisted Memory Access Prediction for Graph Analytics. 1-8 - Michael Jones, Jeremy Kepner, Daniel Andersen, Aydin Buluç
GraphBLAS on the Edge: Anonymized High Performance Streaming of Network Traffic. 1-8 - Oded Green, Corey Nolet, Joe Eaton:
Generating Permutations Using Hash Tables. 1-7 - Sasindu Wijeratne, Akhilesh R. Jaiswal, Ajey P. Jacob, Bingyi Zhang, Viktor K. Prasanna:
Performance Modeling Sparse MTTKRP Using Optical Static Random Access Memory on FPGA. 1-7 - Sayan Ghosh:
Improved Distributed-memory Triangle Counting by Exploiting the Graph Structure. 1-6 - Hyungro Lee
Sparse Deep Neural Network Inference Using Different Programming Models. 1-6 - Atharva Gondhalekar, Thomas Twomey, Wu-chun Feng:
On the Characterization of the Performance-Productivity Gap for FPGA. 1-8 - Essa Imhmed
Evaluation of a Novel Scratchpad Memory through Compiler Supported Simulation. 1-7 - Matthew Penn, Chris Milroy:
Powering Practical Performance: Accelerated Numerical Computing in Pure Python. 1-5 - Ghazanfar Ali, Sridutt Bhalachandra, Nicholas J. Wright, Mert Side, Yong Chen:
Optimal GPU Frequency Selection using Multi-Objective Approaches for HPC Systems. 1-7 - Tian Ye, Rajgopal Kannan, Viktor K. Prasanna:
FPGA Acceleration of Fully Homomorphic Encryption over the Torus. 1-7 - Matthew Curtis-Maury, Yash Trivedi:
HashTag: Fast Lookup in a Persistent Memory File System. 1-7 - Tsung-Wei Huang, Leslie Hwang:
Task-Parallel Programming with Constrained Parallelism. 1-7 - Kelsie Edie, Kurt Keville, Lauren Milechin, Chris Hill:
SuperCloud Lite in the Cloud - lightweight, secure, self-service, on-demand mechanisms for creating customizable research computing environments. 1-8
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last updated on 2025-01-24 17:02 CET by the dblp team
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