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Marco Pasotti
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2020 – today
- 2024
- [j9]Riccardo Vignali
, Riccardo Zurla, Marco Pasotti
Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1650-1655 (2024) - [c27]L. Pistolesi, Artem Glukhov, Amadeo de Gracia Herranz, M. Lopez-Vallejo, Marcella Carissimi, Marco Pasotti, Pier Luigi Rolandi, Andrea Redaelli, I. Muñoz-Martín, S. Bianchi, Andrea Bonfanti, Daniele Ielmini:
Drift Compensation in Multilevel PCM for in-Memory Computing Accelerators. IRPS 2024: 1-4 - [c26]Andrea Lico, Alessio Antolini, Francesco Zavalloni, Eleonora Franchi Scarselli, Riccardo Zurla, Marco Pasotti:
A Bit-Line Biasing Circuit for Analog In-Memory Computing Based on Phase Change Memory. PRIME 2024: 1-4 - [c25]Riccardo Vignali, Gianluca Ricotti, Riccardo Zurla, Marco Pasotti, Alessandro Cabrini:
Impact of Input Encoding and ADC Resolution on Matrix-Vector Multiplication Accuracy. PRIME 2024: 1-4 - [c24]Francesco Zavalloni, Alessio Antolini, Mattia Luigi Torres, A. Nicolosi, F. D'Angelo, Andrea Lico, Eleonora Franchi Scarselli, Marco Pasotti:
Drift-Tolerant Implementation of a Neural Network on a PCM-Based Analog In-Memory Computing Unit for Motor Control Applications. PRIME 2024: 1-4 - 2023
- [j8]Alessio Antolini
Combined HW/SW Drift and Variability Mitigation for PCM-Based Analog In-Memory Computing for Neural Network Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 395-407 (2023) - 2022
- [j7]Said Quqa
Phase Change Memories in Smart Sensing Solutions for Structural Health Monitoring. J. Comput. Civ. Eng. 36(4) (2022) - [c23]Alessio Antolini
An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation. ESSCIRC 2022: 109-112 - [c22]Marcella Carissimi, Chantal Auricchio, Emanuela Calvetti, Laura Capecchi, Mattia Luigi Torres, Stefano Zanchi, P. Gupta, Riccardo Zurla, Alessandro Cabrini, Daniele Gallinari, Fabio Disegni, Massimo Borghi, Elisabetta Palumbo, Andrea Redaelli
An Extended Temperature Range ePCM Memory in 90-nm BCD for Smart Power Applications. ESSCIRC 2022: 373-376 - [c21]Carmine Paolino, Alessio Antolini
Phase-Change Memory in Neural Network Layers with Measurements-based Device Models. ISCAS 2022: 1536-1540 - [c20]Alessio Antolini
Phase-change memory cells characterization in an analog in-memory computing perspective. PRIME 2022: 233-236 - 2021
- [c19]Carmine Paolino, Alessio Antolini
Compressed Sensing by Phase Change Memories: Coping with Encoder non-Linearities. ISCAS 2021: 1-5 - 2020
- [c18]Riccardo Zurla, Alessandro Cabrini, Marco Pasotti, Guido Torelli:
Enhanced Compensation for Voltage Regulators Based on Three-Stage CMOS Operational Amplifiers for Large Capacitive Loads. ISCAS 2020: 1-5 - [c17]Vivek Tyagi, Vikas Rana, Laura Capecchi, Marcella Carissimi, Marco Pasotti:
Power Efficient Sense Amplifier For Emerging Non Volatile Memories. VLSID 2020: 7-12
2010 – 2019
- 2019
- [j6]Riccardo Zurla
Current Tracking Technique Enabling 1-Bit/Cell Storage in Ge-Rich Phase Change Memory. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1728-1732 (2019) - [c16]Marcella Carissimi, Ritesh Mukherjee, Vivek Tyagi, Fabio Disegni, Davide Manfrè, Cesare Torti, Daniele Gallinari, Sandro Rossi, Andrea Gambero, Donatella Brambilla, Paola Zuliani, Riccardo Zurla
2-Mb Embedded Phase Change Memory With 16-ns Read Access Time and 5-Mb/s Write Throughput in 90-nm BCD Technology for Automotive Applications. ESSCIRC 2019: 135-138 - [c15]Flavio Giovanni Volpe, Alessandro Cabrini, Marco Pasotti, Guido Torelli:
Drift induced rigid current shift in Ge-Rich GST Phase Change Memories in Low Resistance State. ICECS 2019: 418-421 - [c14]Riccardo Zurla
Enhanced Multiple-Output Programmable Current Pulse Generator. ISCAS 2019: 1-5 - [c13]Vivek Tyagi, Vikas Rana, Laura Capecchi, Marcella Carissimi, Riccardo Zurla
Current DAC Based -40dB PSRR Configurable Output LDO in BCD Technology. VLSID 2019: 317-322 - 2018
- [j5]Marco Pasotti
A 32-KB ePCM for Real-Time Data Processing in Automotive and Smart Power Applications. IEEE J. Solid State Circuits 53(7): 2114-2125 (2018) - [j4]Vikas Rana
Row decoder for embedded Phase Change Memory using low voltage transistors. Microelectron. J. 81: 117-122 (2018) - 2017
- [c12]Marco Pasotti, Marcella Carissimi, Chantal Auricchio, Donatella Brambilla, Emanuela Calvetti, Laura Capecchi, Luigi Croce, Daniele Gallinari, Cristina Mazzaglia, Vikas Rana, Riccardo Zurla
A 32KB 18ns random access time embedded PCM with enhanced program throughput for automotive and smart power applications. ESSCIRC 2017: 320-323 - [c11]Vikas Rana, Marco Pasotti, F. Desantis:
Single charge-pump generating high positive and negative voltages driving common load. VLSI-SoC 2017: 1-6 - 2016
- [c10]Riccardo Zurla
Enhanced voltage buffer compensation technique for two-stage CMOS operational amplifiers. ICECS 2016: 121-124 - 2011
- [j3]Guido De Sandre, Luca Bettini, Alessandro Pirola, Lionel Marmonier, Marco Pasotti, Massimo Borghi, Paolo Mattavelli
A 4 Mb LV MOS-Selected Embedded Phase Change Memory in 90 nm Standard CMOS Technology. IEEE J. Solid State Circuits 46(1): 52-63 (2011) - 2010
- [c9]Guido De Sandre, Luca Bettini, Alessandro Pirola, Lionel Marmonier, Marco Pasotti, Massimo Borghi, Paolo Mattavelli
A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput. ISSCC 2010: 268-269
2000 – 2009
- 2008
- [c8]Guido De Sandre, Luca Bettini, Emanuela Calvetti, G. Giacomi, Marco Pasotti, Massimo Borghi, Paola Zuliani, Roberto Annunziata, I. Tortorelli, Fabio Pellizzer, Roberto Bez:
Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applications. ESSCIRC 2008: 198-201 - 2006
- [j2]Davide Baderna, Alessandro Cabrini, Marco Pasotti, Guido Torelli:
Power efficiency evaluation in Dickson and voltage doubler charge pump topologies. Microelectron. J. 37(10): 1128-1135 (2006) - 2005
- [c7]Alessandro Cabrini, Guido De Sandre, Laura Gobbi, Piero Malcovati
A 1 V, 26 μW extended temperature range band-gap reference in 130-nm CMOS technology. ESSCIRC 2005: 503-506 - [c6]Davide Baderna, Alessandro Cabrini, Guido De Sandre, Francesco De Santis, Marco Pasotti, Andrea Rossini, Guido Torelli:
A 1.2 V sense amplifier for high-performance embeddable NOR flash memories. ISCAS (2) 2005: 1266-1269 - [c5]Davide Baderna, Alessandro Cabrini, Guido Torelli, Marco Pasotti:
Efficiency comparison between doubler and Dickson charge pumps. ISCAS (2) 2005: 1891-1894 - [c4]Carlo Roma, Pierluigi Daglio, Guido De Sandre, Marco Pasotti, Marco Poles:
How Circuit Analysis and Yield Optimization Can Be Used To Detect Circuit Limitations Before Silicon Results. ISQED 2005: 107-112 - 2003
- [j1]Roberto Pelliconi, David Iezzi, Andrea Baroni, Marco Pasotti, Pier Luigi Rolandi:
Power efficient charge pump in deep submicron standard CMOS technology. IEEE J. Solid State Circuits 38(6): 1068-1071 (2003) - [c3]Michele Borgatti, Lorenzo Cali, Guido De Sandre, Benoit Forêt, David Iezzi, Francesco Lertora, Gilberto Muzzi, Marco Pasotti, Marco Poles, Pier Luigi Rolandi:
A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory. DAC 2003: 691-695 - [c2]Michele Quarantelli, Marco Poles, Marco Pasotti, Pier Luigi Rolandi:
A high compliance CMOS current source for low voltage applications. ISCAS (1) 2003: 425-428
1990 – 1999
- 1999
- [c1]Marco Pasotti, Pier Luigi Rolandi, Roberto Canegallo, Danilo Gerna, Giovanni Guaitini, Frank Lhermet, Alan Kramer:
Analog sense amplifiers for high density NOR flash memories. CICC 1999: 247-250
Coauthor Index
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